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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Simon Glassca831f42016-01-18 20:19:17 -07002/*
3 * Copyright (c) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
Simon Glassca831f42016-01-18 20:19:17 -07005 */
6
7#ifndef __pch_h
8#define __pch_h
9
Simon Glasscd93d622020-05-10 11:40:13 -060010#include <linux/bitops.h>
Simon Glass1ff4f322016-01-18 20:19:18 -070011#define PCH_RCBA 0xf0
12
13#define BIOS_CTRL_BIOSWE BIT(0)
14
Simon Glass1260f8c2019-02-16 20:24:51 -070015/* All the supported PCH ioctls */
16enum pch_req_t {
Simon Glass67b0cda2019-02-16 20:24:52 -070017 /* Returns HDA config info if Azalia V1CTL enabled, -ENOENT if not */
18 PCH_REQ_HDA_CONFIG,
19
Simon Glassb69b6032019-04-25 21:59:01 -060020 /* Fills out a struct pch_pmbase_info if available */
21 PCH_REQ_PMBASE_INFO,
22
Simon Glass1260f8c2019-02-16 20:24:51 -070023 PCH_REQ_TEST1, /* Test requests for sandbox driver */
24 PCH_REQ_TEST2,
25 PCH_REQ_TEST3,
26
27 PCH_REQ_COUNT, /* Number of ioctrls supported */
28};
29
30/**
Simon Glassb69b6032019-04-25 21:59:01 -060031 * struct pch_pmbase_info - Information filled in by PCH_REQ_PMBASE_INFO
32 *
33 * @pmbase: IO address of power-management controller
34 * @gpio0_en_ofs: Offset of GPIO0 enable register
35 * @pm1_sts_ofs: Offset of status register
36 * @pm1_cnt_ofs: Offset of control register
37 */
38struct pch_pmbase_info {
39 u16 base;
40 u8 gpio0_en_ofs;
41 u8 pm1_sts_ofs;
42 u8 pm1_cnt_ofs;
43};
44
45/**
Simon Glass1260f8c2019-02-16 20:24:51 -070046 * struct pch_ops - Operations for the Platform Controller Hub
47 *
48 * Consider using ioctl() to add rarely used or driver-specific operations.
49 */
Simon Glassca831f42016-01-18 20:19:17 -070050struct pch_ops {
51 /**
Bin Meng3e389d82016-02-01 01:40:42 -080052 * get_spi_base() - get the address of SPI base
Simon Glassca831f42016-01-18 20:19:17 -070053 *
54 * @dev: PCH device to check
55 * @sbasep: Returns address of SPI base if available, else 0
56 * @return 0 if OK, -ve on error (e.g. there is no SPI base)
57 */
Bin Meng3e389d82016-02-01 01:40:42 -080058 int (*get_spi_base)(struct udevice *dev, ulong *sbasep);
Simon Glassca831f42016-01-18 20:19:17 -070059
60 /**
Simon Glassca831f42016-01-18 20:19:17 -070061 * set_spi_protect() - set whether SPI flash is protected or not
62 *
63 * @dev: PCH device to adjust
64 * @protect: true to protect, false to unprotect
65 *
66 * @return 0 on success, -ENOSYS if not implemented
67 */
68 int (*set_spi_protect)(struct udevice *dev, bool protect);
Bin Meng384980c2016-02-01 01:40:43 -080069
70 /**
71 * get_gpio_base() - get the address of GPIO base
72 *
73 * @dev: PCH device to check
74 * @gbasep: Returns address of GPIO base if available, else 0
75 * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
76 */
77 int (*get_gpio_base)(struct udevice *dev, u32 *gbasep);
Bin Meng79d4eb62016-02-01 01:40:45 -080078
79 /**
80 * get_io_base() - get the address of IO base
81 *
82 * @dev: PCH device to check
83 * @iobasep: Returns address of IO base if available, else 0
84 * @return 0 if OK, -ve on error (e.g. there is no IO base)
85 */
86 int (*get_io_base)(struct udevice *dev, u32 *iobasep);
Simon Glass1260f8c2019-02-16 20:24:51 -070087
88 /**
89 * ioctl() - perform misc read/write operations
90 *
91 * This is a catch-all operation intended to avoid adding lots of
92 * methods to this uclass, of which few are commonly used. Uncommon
93 * operations that pertain only to a few devices in this uclass should
94 * use this method instead of adding new methods.
95 *
96 * @dev: PCH device to check
97 * @req: PCH request ID
98 * @data: Input/output data
99 * @size: Size of input data (and maximum size of output data)
100 * @return size of output data on sucesss, -ve on error
101 */
102 int (*ioctl)(struct udevice *dev, enum pch_req_t req, void *data,
103 int size);
Simon Glassca831f42016-01-18 20:19:17 -0700104};
105
106#define pch_get_ops(dev) ((struct pch_ops *)(dev)->driver->ops)
107
108/**
Bin Meng3e389d82016-02-01 01:40:42 -0800109 * pch_get_spi_base() - get the address of SPI base
Simon Glassca831f42016-01-18 20:19:17 -0700110 *
111 * @dev: PCH device to check
112 * @sbasep: Returns address of SPI base if available, else 0
113 * @return 0 if OK, -ve on error (e.g. there is no SPI base)
114 */
Bin Meng3e389d82016-02-01 01:40:42 -0800115int pch_get_spi_base(struct udevice *dev, ulong *sbasep);
Simon Glassca831f42016-01-18 20:19:17 -0700116
117/**
Simon Glassca831f42016-01-18 20:19:17 -0700118 * set_spi_protect() - set whether SPI flash is protected or not
119 *
120 * @dev: PCH device to adjust
121 * @protect: true to protect, false to unprotect
122 *
123 * @return 0 on success, -ENOSYS if not implemented
124 */
125int pch_set_spi_protect(struct udevice *dev, bool protect);
126
Bin Meng384980c2016-02-01 01:40:43 -0800127/**
128 * pch_get_gpio_base() - get the address of GPIO base
129 *
130 * @dev: PCH device to check
131 * @gbasep: Returns address of GPIO base if available, else 0
132 * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
133 */
134int pch_get_gpio_base(struct udevice *dev, u32 *gbasep);
135
Bin Meng79d4eb62016-02-01 01:40:45 -0800136/**
137 * pch_get_io_base() - get the address of IO base
138 *
139 * @dev: PCH device to check
140 * @iobasep: Returns address of IO base if available, else 0
141 * @return 0 if OK, -ve on error (e.g. there is no IO base)
142 */
143int pch_get_io_base(struct udevice *dev, u32 *iobasep);
144
Simon Glass1260f8c2019-02-16 20:24:51 -0700145/**
146 * pch_ioctl() - perform misc read/write operations
147 *
148 * This is a catch-all operation intended to avoid adding lots of
149 * methods to this uclass, of which few are commonly used. Uncommon
150 * operations that pertain only to a few devices in this uclass should
151 * use this method instead of adding new methods.
152 *
153 * @dev: PCH device to check
154 * @req: PCH request ID
155 * @data: Input/output data
156 * @size: Size of input data (and maximum size of output data)
157 * @return size of output data on sucesss, -ve on error
158 */
159int pch_ioctl(struct udevice *dev, ulong req, void *data, int size);
160
Simon Glassca831f42016-01-18 20:19:17 -0700161#endif