blob: 4a5c31dbf78d06c50ede6bc2ae4f35c6c30dc56b [file] [log] [blame]
wdenk3d3befa2004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2003
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
12 *
13 * (C) Copyright 2004
14 * ARM Ltd.
15 * Philippe Robin, <philippe.robin@arm.com>
16 *
17 * See file CREDITS for list of people who contributed to this
18 * project.
19 *
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
29 *
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 * MA 02111-1307 USA
34 */
35
36#include <common.h>
Ben Warren7194ab82009-10-04 22:37:03 -070037#include <netdev.h>
wdenk3d3befa2004-03-14 15:06:13 +000038
Wolfgang Denkd87080b2006-03-31 18:32:53 +020039DECLARE_GLOBAL_DATA_PTR;
40
wdenk3d3befa2004-03-14 15:06:13 +000041#if defined(CONFIG_SHOW_BOOT_PROGRESS)
42void show_boot_progress(int progress)
43{
44 printf("Boot reached stage %d\n", progress);
45}
46#endif
47
48#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
49
wdenk3d3befa2004-03-14 15:06:13 +000050/*
51 * Miscellaneous platform dependent initialisations
52 */
53
Stefano Babicd3882982011-06-24 03:04:38 +000054int board_early_init_f (void)
wdenk3d3befa2004-03-14 15:06:13 +000055{
wdenk3d3befa2004-03-14 15:06:13 +000056 /*
57 * set clock frequency:
58 * VERSATILE_REFCLK is 32KHz
59 * VERSATILE_TIMCLK is 1MHz
60 */
61 *(volatile unsigned int *)(VERSATILE_SCTL_BASE) |=
62 ((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) |
63 (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel));
64
Stefano Babicd3882982011-06-24 03:04:38 +000065 return 0;
66}
67
68int board_init (void)
69{
wdenk3d3befa2004-03-14 15:06:13 +000070 /* arch number of Versatile Board */
wdenk731215e2004-10-10 18:41:04 +000071 gd->bd->bi_arch_number = MACH_TYPE_VERSATILE_PB;
wdenk3d3befa2004-03-14 15:06:13 +000072
73 /* adress of boot parameters */
74 gd->bd->bi_boot_params = 0x00000100;
75
wdenkbc54f302004-07-11 18:10:30 +000076 gd->flags = 0;
77
wdenk3d3befa2004-03-14 15:06:13 +000078 icache_enable ();
79
wdenk3d3befa2004-03-14 15:06:13 +000080 return 0;
81}
82
83
84int misc_init_r (void)
85{
86 setenv("verify", "n");
87 return (0);
88}
89
90/******************************
91 Routine:
92 Description:
93******************************/
wdenk3d3befa2004-03-14 15:06:13 +000094int dram_init (void)
95{
Stefano Babicd3882982011-06-24 03:04:38 +000096 /* dram_init must store complete ramsize in gd->ram_size */
Stefano Babic689d0fa2011-08-29 22:49:54 +000097 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
Stefano Babicd3882982011-06-24 03:04:38 +000098 PHYS_SDRAM_1_SIZE);
wdenk3d3befa2004-03-14 15:06:13 +000099 return 0;
100}
Ben Warren7194ab82009-10-04 22:37:03 -0700101
102#ifdef CONFIG_CMD_NET
103int board_eth_init(bd_t *bis)
104{
105 int rc = 0;
106#ifdef CONFIG_SMC91111
107 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
108#endif
109 return rc;
110}
111#endif