blob: ecd9efe8fc6de038953126d56c9054cf8364eda4 [file] [log] [blame]
Michael Schwingen10c97872011-05-23 00:00:09 +02001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
25OUTPUT_ARCH (arm)
26ENTRY (_start)
27SECTIONS
28{
29 . = 0x00000000;
30
31 . = ALIGN (4);
32 .text : {
33 arch/arm/cpu/ixp/start.o(.text*)
34 net/libnet.o(.text*)
35 board/dvlhost/libdvlhost.o(.text*)
36 arch/arm/cpu/ixp/libixp.o(.text*)
37 drivers/serial/libserial.o(.text*)
38
39 . = env_offset;
40 common/env_embedded.o(.ppcenv)
41 *(.text*)
42 }
43
44 . = ALIGN (4);
45 .rodata : {
46 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
47 }
48 . = ALIGN (4);
49 .data : {
50 *(.data*)
51 }
52 . = ALIGN (4);
53 .got : {
54 *(.got)
55 }
56 . =.;
Michael Schwingen10c97872011-05-23 00:00:09 +020057
Marek Vasut55675142012-10-12 10:27:03 +000058 . = ALIGN(4);
59 .u_boot_list : {
Albert ARIBAUDef123c52013-02-25 00:59:00 +000060 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut55675142012-10-12 10:27:03 +000061 }
62
Michael Schwingen10c97872011-05-23 00:00:09 +020063 . = ALIGN (4);
Benoît Thébaudeau7086e912013-04-11 09:35:46 +000064
65 __image_copy_end = .;
66
Michael Schwingen10c97872011-05-23 00:00:09 +020067 .rel.dyn : {
68 __rel_dyn_start = .;
69 *(.rel*)
70 __rel_dyn_end = .;
71 }
72
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +000073 _end = .;
74
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +000075/*
76 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
77 * __bss_base and __bss_limit are for linker only (overlay ordering)
78 */
79
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +000080 .bss_start __rel_dyn_start (OVERLAY) : {
81 KEEP(*(.__bss_start));
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +000082 __bss_base = .;
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +000083 }
84
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +000085 .bss __bss_base (OVERLAY) : {
Michael Schwingen10c97872011-05-23 00:00:09 +020086 *(.bss*)
87 . = ALIGN(4);
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +000088 __bss_limit = .;
Michael Schwingen10c97872011-05-23 00:00:09 +020089 }
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +000090 .bss_end __bss_limit (OVERLAY) : {
91 KEEP(*(.__bss_end));
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +000092 }
93
Albert ARIBAUD09d81182013-06-11 14:17:31 +020094 /DISCARD/ : { *(.dynsym) }
Michael Schwingen10c97872011-05-23 00:00:09 +020095 /DISCARD/ : { *(.dynstr*) }
96 /DISCARD/ : { *(.dynamic*) }
97 /DISCARD/ : { *(.plt*) }
98 /DISCARD/ : { *(.interp*) }
99 /DISCARD/ : { *(.gnu*) }
100}