wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | * |
| 23 | * |
| 24 | * Modified By Conn Clark to work with Esteem 192E 7/31/00 |
| 25 | * |
| 26 | */ |
| 27 | |
| 28 | #include <common.h> |
| 29 | #include <mpc8xx.h> |
| 30 | |
| 31 | /* ------------------------------------------------------------------------- */ |
| 32 | |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 33 | #define _NOT_USED_ 0xFFFFFFFF |
| 34 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 35 | const uint sdram_table[] = { |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 36 | /* |
| 37 | * Single Read. (Offset 0 in UPMA RAM) |
| 38 | * |
| 39 | * active, NOP, read, precharge, NOP */ |
| 40 | 0x0F27CC04, 0x0EAECC04, 0x00B98C04, 0x00F74C00, |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 41 | 0x11FFCC05, /* last */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 42 | /* |
| 43 | * SDRAM Initialization (offset 5 in UPMA RAM) |
| 44 | * |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 45 | * This is no UPM entry point. The following definition uses |
| 46 | * the remaining space to establish an initialization |
| 47 | * sequence, which is executed by a RUN command. |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 48 | * NOP, Program |
| 49 | */ |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 50 | 0x0F0A8C34, 0x1F354C37, /* last */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 51 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 52 | _NOT_USED_, /* Not used */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 53 | |
| 54 | /* |
| 55 | * Burst Read. (Offset 8 in UPMA RAM) |
| 56 | * active, NOP, read, NOP, NOP, NOP, NOP, NOP */ |
| 57 | 0x0F37CC04, 0x0EFECC04, 0x00FDCC04, 0x00FFCC00, |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 58 | 0x00FFCC00, 0x01FFCC00, 0x0FFFCC00, 0x1FFFCC05, /* last */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 59 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 60 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 61 | /* |
| 62 | * Single Write. (Offset 18 in UPMA RAM) |
| 63 | * active, NOP, write, NOP, precharge, NOP */ |
| 64 | 0x0F27CC04, 0x0EAE8C00, 0x01BD4C04, 0x0FFB8C04, |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 65 | 0x0FF74C04, 0x1FFFCC05, /* last */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 66 | _NOT_USED_, _NOT_USED_, |
| 67 | /* |
| 68 | * Burst Write. (Offset 20 in UPMA RAM) |
| 69 | * active, NOP, write, NOP, NOP, NOP, NOP, NOP */ |
| 70 | 0x0F37CC04, 0x0EFE8C00, 0x00FD4C00, 0x00FFCC00, |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 71 | 0x00FFCC00, 0x01FFCC04, 0x0FFFCC04, 0x1FFFCC05, /* last */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 72 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 73 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 74 | /* |
| 75 | * Refresh (Offset 30 in UPMA RAM) |
| 76 | * precharge, NOP, auto_ref, NOP, NOP, NOP */ |
| 77 | 0x0FF74C34, 0x0FFACCB4, 0x0FF5CC34, 0x0FFFCC34, |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 78 | 0x0FFFCCB4, 0x1FFFCC35, /* last */ |
| 79 | _NOT_USED_, _NOT_USED_, |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 80 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 81 | /* |
| 82 | * Exception. (Offset 3c in UPMA RAM) |
| 83 | */ |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 84 | 0x0FFB8C00, 0x1FF74C03, /* last */ |
| 85 | _NOT_USED_, _NOT_USED_ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 86 | }; |
| 87 | |
| 88 | /* ------------------------------------------------------------------------- */ |
| 89 | |
| 90 | |
| 91 | /* |
| 92 | * Check Board Identity: |
| 93 | */ |
| 94 | |
| 95 | int checkboard (void) |
| 96 | { |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 97 | puts ("Board: Esteem 192E\n"); |
| 98 | return (0); |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 99 | } |
| 100 | |
| 101 | /* ------------------------------------------------------------------------- */ |
| 102 | |
| 103 | |
| 104 | long int initdram (int board_type) |
| 105 | { |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 106 | volatile immap_t *immap = (immap_t *) CFG_IMMR; |
| 107 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
| 108 | long int size_b0, size_b1; |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 109 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 110 | /* |
| 111 | * Explain frequency of refresh here |
| 112 | */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 113 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 114 | memctl->memc_mptpr = 0x0200; /* divide by 32 */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 115 | |
wdenk | cd37d9e | 2004-02-10 00:03:41 +0000 | [diff] [blame] | 116 | memctl->memc_mamr = 0x18003112; /*CFG_MAMR_8COL; */ /* 0x18005112 TODO: explain here */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 117 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 118 | upmconfig (UPMA, (uint *) sdram_table, |
| 119 | sizeof (sdram_table) / sizeof (uint)); |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 120 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 121 | /* |
| 122 | * Map cs 2 and 3 to the SDRAM banks 0 and 1 at |
| 123 | * preliminary addresses - these have to be modified after the |
| 124 | * SDRAM size has been determined. |
| 125 | */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 126 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 127 | memctl->memc_or2 = CFG_OR2_PRELIM; /* not defined yet */ |
| 128 | memctl->memc_br2 = CFG_BR2_PRELIM; |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 129 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 130 | memctl->memc_or3 = CFG_OR3_PRELIM; |
| 131 | memctl->memc_br3 = CFG_BR3_PRELIM; |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 132 | |
| 133 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 134 | /* perform SDRAM initializsation sequence */ |
| 135 | memctl->memc_mar = 0x00000088; |
| 136 | memctl->memc_mcr = 0x80004830; /* SDRAM bank 0 execute 8 refresh */ |
| 137 | memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 138 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 139 | memctl->memc_mcr = 0x80006830; /* SDRAM bank 1 execute 8 refresh */ |
| 140 | memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 141 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 142 | memctl->memc_mamr = CFG_MAMR_8COL; /* 0x18803112 start refresh timer TODO: explain here */ |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 143 | |
| 144 | /* printf ("banks 0 and 1 are programed\n"); */ |
| 145 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 146 | /* |
| 147 | * Check Bank 0 Memory Size for re-configuration |
| 148 | * |
| 149 | */ |
Wolfgang Denk | 77ddac9 | 2005-10-13 16:45:02 +0200 | [diff] [blame] | 150 | size_b0 = get_ram_size ( (long *)SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE); |
| 151 | size_b1 = get_ram_size ( (long *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE); |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 152 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 153 | printf ("\nbank 0 size %lu\nbank 1 size %lu\n", size_b0, size_b1); |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 154 | |
| 155 | /* printf ("bank 1 size %u\n",size_b1); */ |
| 156 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 157 | if (size_b1 == 0) { |
| 158 | /* |
| 159 | * Adjust refresh rate if bank 0 isn't stuffed |
| 160 | */ |
| 161 | memctl->memc_mptpr = 0x0400; /* divide by 64 */ |
| 162 | memctl->memc_br3 &= 0x0FFFFFFFE; |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 163 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 164 | /* |
| 165 | * Adjust OR2 for size of bank 0 |
| 166 | */ |
| 167 | memctl->memc_or2 |= 7 * size_b0; |
| 168 | } else { |
| 169 | if (size_b0 < size_b1) { |
| 170 | memctl->memc_br2 &= 0x00007FFE; |
| 171 | memctl->memc_br3 &= 0x00007FFF; |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 172 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 173 | /* |
| 174 | * Adjust OR3 for size of bank 1 |
| 175 | */ |
| 176 | memctl->memc_or3 |= 15 * size_b1; |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 177 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 178 | /* |
| 179 | * Adjust OR2 for size of bank 0 |
| 180 | */ |
| 181 | memctl->memc_or2 |= 15 * size_b0; |
| 182 | memctl->memc_br2 += (size_b1 + 1); |
| 183 | } else { |
| 184 | memctl->memc_br3 &= 0x00007FFE; |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 185 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 186 | /* |
| 187 | * Adjust OR2 for size of bank 0 |
| 188 | */ |
| 189 | memctl->memc_or2 |= 15 * size_b0; |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 190 | |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 191 | /* |
| 192 | * Adjust OR3 for size of bank 1 |
| 193 | */ |
| 194 | memctl->memc_or3 |= 15 * size_b1; |
| 195 | memctl->memc_br3 += (size_b0 + 1); |
| 196 | } |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 197 | } |
wdenk | c83bf6a | 2004-01-06 22:38:14 +0000 | [diff] [blame] | 198 | |
| 199 | /* before leaving set all unused i/o pins to outputs */ |
| 200 | |
| 201 | /* |
| 202 | * --*Unused Pin List*-- |
| 203 | * |
| 204 | * group/port bit number |
| 205 | * IP_B 0,1,3,4,5 Taken care of in pcmcia-cs-x.x.xx |
| 206 | * PA 5,7,8,9,14,15 |
| 207 | * PB 22,23,31 |
| 208 | * PC 4,5,6,7,10,11,12,13,14,15 |
| 209 | * PD 5,6,7 |
| 210 | * |
| 211 | */ |
| 212 | |
| 213 | /* |
| 214 | * --*Pin Used for I/O List*-- |
| 215 | * |
| 216 | * port input bit number output bit number either |
| 217 | * PB 18,26,27 |
| 218 | * PD 3,4 8,9,10,11,12,13,14,15 |
| 219 | * |
| 220 | */ |
| 221 | |
| 222 | immap->im_ioport.iop_papar &= ~0x05C3; /* set pins as io */ |
| 223 | immap->im_ioport.iop_padir |= 0x05C3; /* set pins as output */ |
| 224 | immap->im_ioport.iop_paodr &= 0x0008; /* config pins 9 & 14 as normal outputs */ |
| 225 | immap->im_ioport.iop_padat |= 0x05C3; /* set unused pins as high */ |
| 226 | |
| 227 | immap->im_cpm.cp_pbpar &= ~0x00001331; /* set unused port b pins as io */ |
| 228 | immap->im_cpm.cp_pbdir |= 0x00001331; /* set unused port b pins as output */ |
| 229 | immap->im_cpm.cp_pbodr &= ~0x00001331; /* config bits 18,22,23,26,27 & 31 as normal outputs */ |
| 230 | immap->im_cpm.cp_pbdat |= 0x00001331; /* set T/E LED, /NV_CS, & /POWER_ADJ_CS and the rest to a high */ |
| 231 | |
| 232 | immap->im_ioport.iop_pcpar &= ~0x0F3F; /* set unused port c pins as io */ |
| 233 | immap->im_ioport.iop_pcdir |= 0x0F3F; /* set unused port c pins as output */ |
| 234 | immap->im_ioport.iop_pcso &= ~0x0F3F; /* clear special purpose bit for unused port c pins for clarity */ |
| 235 | immap->im_ioport.iop_pcdat |= 0x0F3F; /* set unused port c pins high */ |
| 236 | |
| 237 | immap->im_ioport.iop_pdpar &= 0xE000; /* set pins as io */ |
| 238 | immap->im_ioport.iop_pddir &= 0xE000; /* set bit 3 & 4 as inputs */ |
| 239 | immap->im_ioport.iop_pddir |= 0x07FF; /* set bits 5 - 15 as outputs */ |
| 240 | immap->im_ioport.iop_pddat = 0x0055; /* set alternating pattern on test port */ |
| 241 | |
| 242 | return (size_b0 + size_b1); |
wdenk | 16f2170 | 2002-08-26 21:58:50 +0000 | [diff] [blame] | 243 | } |