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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / a45fa436854a4116c19dd8794c9b033a3cf117bc / . / arch / arm / cpu / tegra114-common / pinmux.c
blob: 5076717592eb2682f236a3312ebd89d17e4d4c4b [file] [log] [blame]
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]1/*
2 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17/* Tegra114 pin multiplexing functions */
18
19#include <common.h>
20#include <asm/io.h>
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]21#include <asm/arch/pinmux.h>
22
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]23/* Convenient macro for defining pin group properties */
24#define PIN(pg_name, vdd, f0, f1, f2, f3, iod) \
25 { \
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]26 .funcs = { \
27 PMUX_FUNC_ ## f0, \
28 PMUX_FUNC_ ## f1, \
29 PMUX_FUNC_ ## f2, \
30 PMUX_FUNC_ ## f3, \
31 }, \
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]32 }
33
34/* Input and output pins */
35#define PINI(pg_name, vdd, f0, f1, f2, f3) \
36 PIN(pg_name, vdd, f0, f1, f2, f3, INPUT)
37#define PINO(pg_name, vdd, f0, f1, f2, f3) \
38 PIN(pg_name, vdd, f0, f1, f2, f3, OUTPUT)
39
Tom Warren8b7776b2013-03-01 14:38:20 -0700[diff] [blame]40/* A pin group number which is not used */
41#define PIN_RESERVED \
42 PIN(NONE, NONE, INVALID, INVALID, INVALID, INVALID, NONE)
43
Stephen Warrene2969952014-03-21 12:28:54 -0600[diff] [blame]44static const struct tegra_pingroup_desc tegra114_pingroups[PINGRP_COUNT] = {
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]45 /* NAME VDD f0 f1 f2 f3 */
46 PINI(ULPI_DATA0, BB, SPI3, HSI, UARTA, ULPI),
47 PINI(ULPI_DATA1, BB, SPI3, HSI, UARTA, ULPI),
48 PINI(ULPI_DATA2, BB, SPI3, HSI, UARTA, ULPI),
49 PINI(ULPI_DATA3, BB, SPI3, HSI, UARTA, ULPI),
50 PINI(ULPI_DATA4, BB, SPI2, HSI, UARTA, ULPI),
51 PINI(ULPI_DATA5, BB, SPI2, HSI, UARTA, ULPI),
52 PINI(ULPI_DATA6, BB, SPI2, HSI, UARTA, ULPI),
53 PINI(ULPI_DATA7, BB, SPI2, HSI, UARTA, ULPI),
54 PINI(ULPI_CLK, BB, SPI1, SPI5, UARTD, ULPI),
55 PINI(ULPI_DIR, BB, SPI1, SPI5, UARTD, ULPI),
56 PINI(ULPI_NXT, BB, SPI1, SPI5, UARTD, ULPI),
57 PINI(ULPI_STP, BB, SPI1, SPI5, UARTD, ULPI),
58 PINI(DAP3_FS, BB, I2S2, SPI5, DISPA, DISPB),
59 PINI(DAP3_DIN, BB, I2S2, SPI5, DISPA, DISPB),
60 PINI(DAP3_DOUT, BB, I2S2, SPI5, DISPA, DISPB),
61 PINI(DAP3_SCLK, BB, I2S2, SPI5, DISPA, DISPB),
62 PINI(GPIO_PV0, BB, USB, RSVD2, RSVD3, RSVD4),
63 PINI(GPIO_PV1, BB, RSVD1, RSVD2, RSVD3, RSVD4),
64 PINI(SDMMC1_CLK, SDMMC1, SDMMC1, CLK12, RSVD3, RSVD4),
65 PINI(SDMMC1_CMD, SDMMC1, SDMMC1, SPDIF, SPI4, UARTA),
66 PINI(SDMMC1_DAT3, SDMMC1, SDMMC1, SPDIF, SPI4, UARTA),
67 PINI(SDMMC1_DAT2, SDMMC1, SDMMC1, PWM0, SPI4, UARTA),
68 PINI(SDMMC1_DAT1, SDMMC1, SDMMC1, PWM1, SPI4, UARTA),
69 PINI(SDMMC1_DAT0, SDMMC1, SDMMC1, RSVD2, SPI4, UARTA),
Tom Warren8b7776b2013-03-01 14:38:20 -0700[diff] [blame]70 PIN_RESERVED, /* Reserved by t114: 0x3060 - 0x3064 */
71 PIN_RESERVED,
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]72 PINI(CLK2_OUT, SDMMC1, EXTPERIPH2, RSVD2, RSVD3, RSVD4),
73 PINI(CLK2_REQ, SDMMC1, DAP, RSVD2, RSVD3, RSVD4),
Tom Warren8b7776b2013-03-01 14:38:20 -0700[diff] [blame]74 PIN_RESERVED, /* Reserved by t114: 0x3070 - 0x310c */
75 PIN_RESERVED,
76 PIN_RESERVED,
77 PIN_RESERVED,
78 PIN_RESERVED,
79 PIN_RESERVED,
80 PIN_RESERVED,
81 PIN_RESERVED,
82 PIN_RESERVED,
83 PIN_RESERVED,
84 PIN_RESERVED,
85 PIN_RESERVED,
86 PIN_RESERVED,
87 PIN_RESERVED,
88 PIN_RESERVED,
89 PIN_RESERVED,
90 PIN_RESERVED,
91 PIN_RESERVED,
92 PIN_RESERVED,
93 PIN_RESERVED,
94 PIN_RESERVED,
95 PIN_RESERVED,
96 PIN_RESERVED,
97 PIN_RESERVED,
98 PIN_RESERVED,
99 PIN_RESERVED,
100 PIN_RESERVED,
101 PIN_RESERVED,
102 PIN_RESERVED,
103 PIN_RESERVED,
104 PIN_RESERVED,
105 PIN_RESERVED,
106 PIN_RESERVED,
107 PIN_RESERVED,
108 PIN_RESERVED,
109 PIN_RESERVED,
110 PIN_RESERVED,
111 PIN_RESERVED,
112 PIN_RESERVED,
113 PIN_RESERVED,
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]114 PINI(HDMI_INT, LCD, RSVD1, RSVD2, RSVD3, RSVD4),
115 PINI(DDC_SCL, LCD, I2C4, RSVD2, RSVD3, RSVD4),
116 PINI(DDC_SDA, LCD, I2C4, RSVD2, RSVD3, RSVD4),
Tom Warren8b7776b2013-03-01 14:38:20 -0700[diff] [blame]117 PIN_RESERVED, /* Reserved by t114: 0x311c - 0x3160 */
118 PIN_RESERVED,
119 PIN_RESERVED,
120 PIN_RESERVED,
121 PIN_RESERVED,
122 PIN_RESERVED,
123 PIN_RESERVED,
124 PIN_RESERVED,
125 PIN_RESERVED,
126 PIN_RESERVED,
127 PIN_RESERVED,
128 PIN_RESERVED,
129 PIN_RESERVED,
130 PIN_RESERVED,
131 PIN_RESERVED,
132 PIN_RESERVED,
133 PIN_RESERVED,
134 PIN_RESERVED,
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]135 PINI(UART2_RXD, UART, UARTB, SPDIF, UARTA, SPI4),
136 PINI(UART2_TXD, UART, UARTB, SPDIF, UARTA, SPI4),
137 PINI(UART2_RTS_N, UART, UARTA, UARTB, RSVD3, SPI4),
138 PINI(UART2_CTS_N, UART, UARTA, UARTB, RSVD3, SPI4),
139 PINI(UART3_TXD, UART, UARTC, RSVD2, RSVD3, SPI4),
140 PINI(UART3_RXD, UART, UARTC, RSVD2, RSVD3, SPI4),
141 PINI(UART3_CTS_N, UART, UARTC, SDMMC1, DTV, SPI4),
142 PINI(UART3_RTS_N, UART, UARTC, PWM0, DTV, DISPA),
143 PINI(GPIO_PU0, UART, OWR, UARTA, RSVD3, RSVD4),
144 PINI(GPIO_PU1, UART, RSVD1, UARTA, RSVD3, RSVD4),
145 PINI(GPIO_PU2, UART, RSVD1, UARTA, RSVD3, RSVD4),
146 PINI(GPIO_PU3, UART, PWM0, UARTA, DISPA, DISPB),
147 PINI(GPIO_PU4, UART, PWM1, UARTA, DISPA, DISPB),
148 PINI(GPIO_PU5, UART, PWM2, UARTA, DISPA, DISPB),
149 PINI(GPIO_PU6, UART, PWM3, UARTA, USB, DISPB),
150 PINI(GEN1_I2C_SDA, UART, I2C1, RSVD2, RSVD3, RSVD4),
151 PINI(GEN1_I2C_SCL, UART, I2C1, RSVD2, RSVD3, RSVD4),
152 PINI(DAP4_FS, UART, I2S3, RSVD2, DTV, RSVD4),
153 PINI(DAP4_DIN, UART, I2S3, RSVD2, RSVD3, RSVD4),
154 PINI(DAP4_DOUT, UART, I2S3, RSVD2, DTV, RSVD4),
155 PINI(DAP4_SCLK, UART, I2S3, RSVD2, RSVD3, RSVD4),
156 PINI(CLK3_OUT, UART, EXTPERIPH3, RSVD2, RSVD3, RSVD4),
157 PINI(CLK3_REQ, UART, DEV3, RSVD2, RSVD3, RSVD4),
158 PINI(GMI_WP_N, GMI, RSVD1, NAND, GMI, GMI_ALT),
159 PINI(GMI_IORDY, GMI, SDMMC2, RSVD2, GMI, TRACE),
160 PINI(GMI_WAIT, GMI, SPI4, NAND, GMI, DTV),
161 PINI(GMI_ADV_N, GMI, RSVD1, NAND, GMI, TRACE),
162 PINI(GMI_CLK, GMI, SDMMC2, NAND, GMI, TRACE),
163 PINI(GMI_CS0_N, GMI, RSVD1, NAND, GMI, USB),
164 PINI(GMI_CS1_N, GMI, RSVD1, NAND, GMI, SOC),
165 PINI(GMI_CS2_N, GMI, SDMMC2, NAND, GMI, TRACE),
166 PINI(GMI_CS3_N, GMI, SDMMC2, NAND, GMI, GMI_ALT),
167 PINI(GMI_CS4_N, GMI, USB, NAND, GMI, TRACE),
168 PINI(GMI_CS6_N, GMI, NAND, NAND_ALT, GMI, SPI4),
169 PINI(GMI_CS7_N, GMI, NAND, NAND_ALT, GMI, SDMMC2),
170 PINI(GMI_AD0, GMI, RSVD1, NAND, GMI, RSVD4),
171 PINI(GMI_AD1, GMI, RSVD1, NAND, GMI, RSVD4),
172 PINI(GMI_AD2, GMI, RSVD1, NAND, GMI, RSVD4),
173 PINI(GMI_AD3, GMI, RSVD1, NAND, GMI, RSVD4),
174 PINI(GMI_AD4, GMI, RSVD1, NAND, GMI, RSVD4),
175 PINI(GMI_AD5, GMI, RSVD1, NAND, GMI, SPI4),
176 PINI(GMI_AD6, GMI, RSVD1, NAND, GMI, SPI4),
177 PINI(GMI_AD7, GMI, RSVD1, NAND, GMI, SPI4),
178 PINI(GMI_AD8, GMI, PWM0, NAND, GMI, DTV),
179 PINI(GMI_AD9, GMI, PWM1, NAND, GMI, CLDVFS),
180 PINI(GMI_AD10, GMI, PWM2, NAND, GMI, CLDVFS),
181 PINI(GMI_AD11, GMI, PWM3, NAND, GMI, USB),
182 PINI(GMI_AD12, GMI, SDMMC2, NAND, GMI, RSVD4),
183 PINI(GMI_AD13, GMI, SDMMC2, NAND, GMI, RSVD4),
184 PINI(GMI_AD14, GMI, SDMMC2, NAND, GMI, DTV),
185 PINI(GMI_AD15, GMI, SDMMC2, NAND, GMI, DTV),
186 PINI(GMI_A16, GMI, UARTD, TRACE, GMI, GMI_ALT),
187 PINI(GMI_A17, GMI, UARTD, RSVD2, GMI, TRACE),
188 PINI(GMI_A18, GMI, UARTD, RSVD2, GMI, TRACE),
189 PINI(GMI_A19, GMI, UARTD, SPI4, GMI, TRACE),
190 PINI(GMI_WR_N, GMI, RSVD1, NAND, GMI, SPI4),
191 PINI(GMI_OE_N, GMI, RSVD1, NAND, GMI, SOC),
192 PINI(GMI_DQS, GMI, SDMMC2, NAND, GMI, TRACE),
193 PINI(GMI_RST_N, GMI, NAND, NAND_ALT, GMI, RSVD4),
194 PINI(GEN2_I2C_SCL, GMI, I2C2, RSVD2, GMI, RSVD4),
195 PINI(GEN2_I2C_SDA, GMI, I2C2, RSVD2, GMI, RSVD4),
196 PINI(SDMMC4_CLK, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4),
197 PINI(SDMMC4_CMD, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4),
198 PINI(SDMMC4_DAT0, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
199 PINI(SDMMC4_DAT1, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
200 PINI(SDMMC4_DAT2, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
201 PINI(SDMMC4_DAT3, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
202 PINI(SDMMC4_DAT4, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
203 PINI(SDMMC4_DAT5, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
204 PINI(SDMMC4_DAT6, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
205 PINI(SDMMC4_DAT7, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4),
Tom Warren8b7776b2013-03-01 14:38:20 -0700[diff] [blame]206 PIN_RESERVED, /* Reserved by t114: 0x3280 */
Tom Warrenb3b6ddf2013-03-13 15:00:54 -0700[diff] [blame]207 PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT3, RSVD4),
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]208 PINI(GPIO_PCC1, CAM, I2S4, RSVD2, RSVD3, RSVD4),
209 PINI(GPIO_PBB0, CAM, I2S4, VI, VI_ALT1, VI_ALT3),
210 PINI(CAM_I2C_SCL, CAM, VGP1, I2C3, RSVD3, RSVD4),
211 PINI(CAM_I2C_SDA, CAM, VGP2, I2C3, RSVD3, RSVD4),
212 PINI(GPIO_PBB3, CAM, VGP3, DISPA, DISPB, RSVD4),
213 PINI(GPIO_PBB4, CAM, VGP4, DISPA, DISPB, RSVD4),
214 PINI(GPIO_PBB5, CAM, VGP5, DISPA, DISPB, RSVD4),
215 PINI(GPIO_PBB6, CAM, VGP6, DISPA, DISPB, RSVD4),
216 PINI(GPIO_PBB7, CAM, I2S4, RSVD2, RSVD3, RSVD4),
217 PINI(GPIO_PCC2, CAM, I2S4, RSVD2, RSVD3, RSVD4),
218 PINI(JTAG_RTCK, SYS, RTCK, RSVD2, RSVD3, RSVD4),
219 PINI(PWR_I2C_SCL, SYS, I2CPWR, RSVD2, RSVD3, RSVD4),
220 PINI(PWR_I2C_SDA, SYS, I2CPWR, RSVD2, RSVD3, RSVD4),
221 PINI(KB_ROW0, SYS, KBC, RSVD2, DTV, RSVD4),
222 PINI(KB_ROW1, SYS, KBC, RSVD2, DTV, RSVD4),
223 PINI(KB_ROW2, SYS, KBC, RSVD2, DTV, SOC),
224 PINI(KB_ROW3, SYS, KBC, DISPA, RSVD3, DISPB),
225 PINI(KB_ROW4, SYS, KBC, DISPA, SPI2, DISPB),
226 PINI(KB_ROW5, SYS, KBC, DISPA, SPI2, DISPB),
227 PINI(KB_ROW6, SYS, KBC, DISPA, RSVD3, DISPB),
228 PINI(KB_ROW7, SYS, KBC, RSVD2, CLDVFS, UARTA),
229 PINI(KB_ROW8, SYS, KBC, RSVD2, RSVD3, UARTA),
230 PINI(KB_ROW9, SYS, KBC, RSVD2, RSVD3, UARTA),
231 PINI(KB_ROW10, SYS, KBC, RSVD2, RSVD3, UARTA),
Tom Warren8b7776b2013-03-01 14:38:20 -0700[diff] [blame]232 PIN_RESERVED, /* Reserved by t114: 0x32e8 - 0x32f8 */
233 PIN_RESERVED,
234 PIN_RESERVED,
235 PIN_RESERVED,
236 PIN_RESERVED,
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]237 PINI(KB_COL0, SYS, KBC, USB, SPI2, EMC_DLL),
238 PINI(KB_COL1, SYS, KBC, RSVD2, SPI2, EMC_DLL),
239 PINI(KB_COL2, SYS, KBC, RSVD2, SPI2, RSVD4),
240 PINI(KB_COL3, SYS, KBC, DISPA, PWM2, UARTA),
241 PINI(KB_COL4, SYS, KBC, OWR, SDMMC3, UARTA),
242 PINI(KB_COL5, SYS, KBC, RSVD2, SDMMC1, RSVD4),
243 PINI(KB_COL6, SYS, KBC, RSVD2, SPI2, RSVD4),
244 PINI(KB_COL7, SYS, KBC, RSVD2, SPI2, RSVD4),
245 PINI(CLK_32K_OUT, SYS, BLINK, SOC, RSVD3, RSVD4),
246 PINI(SYS_CLK_REQ, SYS, SYSCLK, RSVD2, RSVD3, RSVD4),
247 PINI(CORE_PWR_REQ, SYS, PWRON, RSVD2, RSVD3, RSVD4),
248 PINI(CPU_PWR_REQ, SYS, CPU, RSVD2, RSVD3, RSVD4),
249 PINI(PWR_INT_N, SYS, PMI, RSVD2, RSVD3, RSVD4),
250 PINI(CLK_32K_IN, SYS, CLK, RSVD2, RSVD3, RSVD4),
251 PINI(OWR, SYS, OWR, RSVD2, RSVD3, RSVD4),
252 PINI(DAP1_FS, AUDIO, I2S0, HDA, GMI, RSVD4),
253 PINI(DAP1_DIN, AUDIO, I2S0, HDA, GMI, RSVD4),
254 PINI(DAP1_DOUT, AUDIO, I2S0, HDA, GMI, RSVD4),
255 PINI(DAP1_SCLK, AUDIO, I2S0, HDA, GMI, RSVD4),
256 PINI(CLK1_REQ, AUDIO, DAP, DAP1, RSVD3, RSVD4),
257 PINI(CLK1_OUT, AUDIO, EXTPERIPH1, DAP2, RSVD3, RSVD4),
258 PINI(SPDIF_IN, AUDIO, SPDIF, USB, RSVD3, RSVD4),
259 PINI(SPDIF_OUT, AUDIO, SPDIF, RSVD2, RSVD3, RSVD4),
260 PINI(DAP2_FS, AUDIO, I2S1, HDA, RSVD3, RSVD4),
261 PINI(DAP2_DIN, AUDIO, I2S1, HDA, RSVD3, RSVD4),
262 PINI(DAP2_DOUT, AUDIO, I2S1, HDA, RSVD3, RSVD4),
263 PINI(DAP2_SCLK, AUDIO, I2S1, HDA, RSVD3, RSVD4),
Tom Warren8b7776b2013-03-01 14:38:20 -0700[diff] [blame]264 PINI(DVFS_PWM, AUDIO, SPI6, CLDVFS, RSVD3, RSVD4),
265 PINI(GPIO_X1_AUD, AUDIO, SPI6, RSVD2, RSVD3, RSVD4),
266 PINI(GPIO_X3_AUD, AUDIO, SPI6, SPI1, RSVD3, RSVD4),
267 PINI(DVFS_CLK, AUDIO, SPI6, CLDVFS, RSVD3, RSVD4),
268 PINI(GPIO_X4_AUD, AUDIO, RSVD1, SPI1, SPI2, DAP2),
269 PINI(GPIO_X5_AUD, AUDIO, RSVD1, SPI1, SPI2, RSVD4),
270 PINI(GPIO_X6_AUD, AUDIO, SPI6, SPI1, SPI2, RSVD4),
271 PINI(GPIO_X7_AUD, AUDIO, RSVD1, SPI1, SPI2, RSVD4),
272 PIN_RESERVED, /* Reserved by t114: 0x3388 - 0x338c */
273 PIN_RESERVED,
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]274 PINI(SDMMC3_CLK, SDMMC3, SDMMC3, RSVD2, RSVD3, SPI3),
275 PINI(SDMMC3_CMD, SDMMC3, SDMMC3, PWM3, UARTA, SPI3),
276 PINI(SDMMC3_DAT0, SDMMC3, SDMMC3, RSVD2, RSVD3, SPI3),
277 PINI(SDMMC3_DAT1, SDMMC3, SDMMC3, PWM2, UARTA, SPI3),
278 PINI(SDMMC3_DAT2, SDMMC3, SDMMC3, PWM1, DISPA, SPI3),
279 PINI(SDMMC3_DAT3, SDMMC3, SDMMC3, PWM0, DISPB, SPI3),
Tom Warren8b7776b2013-03-01 14:38:20 -0700[diff] [blame]280 PIN_RESERVED, /* Reserved by t114: 0x33a8 - 0x33dc */
281 PIN_RESERVED,
282 PIN_RESERVED,
283 PIN_RESERVED,
284 PIN_RESERVED,
285 PIN_RESERVED,
286 PIN_RESERVED,
287 PIN_RESERVED,
288 PIN_RESERVED,
289 PIN_RESERVED,
290 PIN_RESERVED,
291 PIN_RESERVED,
292 PIN_RESERVED,
293 PIN_RESERVED,
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]294 PINI(HDMI_CEC, SYS, CEC, SDMMC3, RSVD3, SOC),
295 PINI(SDMMC1_WP_N, SDMMC1, SDMMC1, CLK12, SPI4, UARTA),
Tom Warren8b7776b2013-03-01 14:38:20 -0700[diff] [blame]296 PINI(SDMMC3_CD_N, SYS, SDMMC3, OWR, RSVD3, RSVD4),
297 PINI(GPIO_W2_AUD, AUDIO, SPI6, RSVD2, SPI2, I2C1),
298 PINI(GPIO_W3_AUD, AUDIO, SPI6, SPI1, SPI2, I2C1),
299 PINI(USB_VBUS_EN0, LCD, USB, RSVD2, RSVD3, RSVD4),
300 PINI(USB_VBUS_EN1, LCD, USB, RSVD2, RSVD3, RSVD4),
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]301 PINI(SDMMC3_CLK_LB_IN, SDMMC3, SDMMC3, RSVD2, RSVD3, RSVD4),
Tom Warren8b7776b2013-03-01 14:38:20 -0700[diff] [blame]302 PINI(SDMMC3_CLK_LB_OUT, SDMMC3, SDMMC3, RSVD2, RSVD3, RSVD4),
303 PIN_RESERVED, /* Reserved by t114: 0x3404 */
Tom Warrene23bb6a2013-01-28 13:32:10 +0000[diff] [blame]304 PINO(RESET_OUT_N, SYS, RSVD1, RSVD2, RSVD3, RESET_OUT_N),
305};
Stephen Warrene2969952014-03-21 12:28:54 -0600[diff] [blame]306const struct tegra_pingroup_desc *tegra_soc_pingroups = tegra114_pingroups;