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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / dfb42fc95df6b5908fb593db9132018233430fe9 / . / board / avionic-design / common / pinmux-config-tamonten-ng.h
blob: 69515d2106129f4d44078ff3fc08cfdbcea13fa1 [file] [log] [blame]
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]1/*
2 * (C) Copyright 2013
3 * Avionic Design GmbH <www.avionic-design.de>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef _PINMUX_CONFIG_TAMONTEN_NG_H_
9#define _PINMUX_CONFIG_TAMONTEN_NG_H_
10
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]11#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]12 { \
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]13 .pingrp = PINGRP_##_pingrp, \
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]14 .func = PMUX_FUNC_##_mux, \
15 .pull = PMUX_PULL_##_pull, \
16 .tristate = PMUX_TRI_##_tri, \
17 .io = PMUX_PIN_##_io, \
18 .lock = PMUX_PIN_LOCK_DEFAULT, \
19 .od = PMUX_PIN_OD_DEFAULT, \
20 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
21 }
22
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]23#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]24 { \
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]25 .pingrp = PINGRP_##_pingrp, \
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]26 .func = PMUX_FUNC_##_mux, \
27 .pull = PMUX_PULL_##_pull, \
28 .tristate = PMUX_TRI_##_tri, \
29 .io = PMUX_PIN_##_io, \
30 .lock = PMUX_PIN_LOCK_##_lock, \
31 .od = PMUX_PIN_OD_##_od, \
32 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
33 }
34
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]35#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]36 { \
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]37 .pingrp = PINGRP_##_pingrp, \
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]38 .func = PMUX_FUNC_##_mux, \
39 .pull = PMUX_PULL_##_pull, \
40 .tristate = PMUX_TRI_##_tri, \
41 .io = PMUX_PIN_##_io, \
42 .lock = PMUX_PIN_LOCK_##_lock, \
43 .od = PMUX_PIN_OD_DEFAULT, \
44 .ioreset = PMUX_PIN_IO_RESET_##_ioreset \
45 }
46
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]47#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]48 { \
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]49 .drvgrp = PDRIVE_PINGROUP_##_drvgrp, \
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]50 .slwf = _slwf, \
51 .slwr = _slwr, \
52 .drvup = _drvup, \
53 .drvdn = _drvdn, \
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]54 .lpmd = PMUX_LPMD_##_lpmd, \
55 .schmt = PMUX_SCHMT_##_schmt, \
56 .hsm = PMUX_HSM_##_hsm, \
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]57 }
58
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]59static struct pmux_pingrp_config tamonten_ng_pinmux_common[] = {
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]60 /* SDMMC1 pinmux */
61 DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT),
62 DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, UP, NORMAL, INPUT),
63 DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, UP, NORMAL, INPUT),
64 DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, UP, NORMAL, INPUT),
65 DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, UP, NORMAL, INPUT),
66 DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, UP, NORMAL, INPUT),
67
68 /* SDMMC3 pinmux */
69 DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT),
70 DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, UP, NORMAL, INPUT),
71 DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, UP, NORMAL, INPUT),
72 DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, UP, NORMAL, INPUT),
73 DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, UP, NORMAL, INPUT),
74 DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, UP, NORMAL, INPUT),
75 DEFAULT_PINMUX(SDMMC3_DAT4, SDMMC3, UP, NORMAL, INPUT),
76 DEFAULT_PINMUX(SDMMC3_DAT5, SDMMC3, UP, NORMAL, INPUT),
77 DEFAULT_PINMUX(SDMMC3_DAT6, SDMMC3, UP, NORMAL, INPUT),
78 DEFAULT_PINMUX(SDMMC3_DAT7, SDMMC3, UP, NORMAL, INPUT),
79 DEFAULT_PINMUX(GMI_IORDY, RSVD1, UP, NORMAL, INPUT),
80 DEFAULT_PINMUX(GMI_CS6_N, RSVD1, UP, NORMAL, INPUT),
81
82 /* SDMMC4 pinmux */
83 LV_PINMUX(SDMMC4_CLK, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
84 LV_PINMUX(SDMMC4_CMD, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
85 LV_PINMUX(SDMMC4_DAT0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
86 LV_PINMUX(SDMMC4_DAT1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
87 LV_PINMUX(SDMMC4_DAT2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
88 LV_PINMUX(SDMMC4_DAT3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
89 LV_PINMUX(SDMMC4_DAT4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
90 LV_PINMUX(SDMMC4_DAT5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
91 LV_PINMUX(SDMMC4_DAT6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
92 LV_PINMUX(SDMMC4_DAT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
93 LV_PINMUX(SDMMC4_RST_N, RSVD1, DOWN, NORMAL, INPUT, DISABLE, DISABLE),
94
95 /* I2C1 pinmux */
96 I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
97 I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
98
99 /* I2C2 pinmux */
100 I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
101 I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
102
103 /* I2C3 pinmux */
104 I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
105 I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
106
107 /* I2C4 pinmux */
108 I2C_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
109 I2C_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
110
111 /* Power I2C pinmux */
112 I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
113 I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
114
115 /* UART1 */
116 DEFAULT_PINMUX(ULPI_DATA0, UARTA, NORMAL, NORMAL, OUTPUT),
117 DEFAULT_PINMUX(ULPI_DATA1, UARTA, NORMAL, NORMAL, INPUT),
118
119 /* UART2 */
120 DEFAULT_PINMUX(UART2_RXD, UARTB, NORMAL, NORMAL, INPUT),
121 DEFAULT_PINMUX(UART2_TXD, UARTB, NORMAL, NORMAL, OUTPUT),
122
123 /* UART3 */
124 DEFAULT_PINMUX(UART3_TXD, UARTC, NORMAL, NORMAL, OUTPUT),
125 DEFAULT_PINMUX(UART3_RXD, UARTC, NORMAL, NORMAL, INPUT),
126 DEFAULT_PINMUX(UART3_CTS_N, UARTC, NORMAL, NORMAL, INPUT),
127 DEFAULT_PINMUX(UART3_RTS_N, UARTC, NORMAL, NORMAL, OUTPUT),
128
129 /* UART4 */
130 DEFAULT_PINMUX(ULPI_CLK, UARTD, NORMAL, NORMAL, OUTPUT),
131 DEFAULT_PINMUX(ULPI_DIR, UARTD, UP, NORMAL, INPUT),
132 DEFAULT_PINMUX(ULPI_NXT, UARTD, NORMAL, NORMAL, INPUT),
133 DEFAULT_PINMUX(ULPI_STP, UARTD, NORMAL, NORMAL, OUTPUT),
134
135 /* DAP */
136 DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, INPUT),
137
138 /* I2S1 */
139 DEFAULT_PINMUX(DAP2_FS, I2S1, NORMAL, NORMAL, INPUT),
140 DEFAULT_PINMUX(DAP2_DIN, I2S1, NORMAL, NORMAL, INPUT),
141 DEFAULT_PINMUX(DAP2_DOUT, I2S1, NORMAL, NORMAL, INPUT),
142 DEFAULT_PINMUX(DAP2_SCLK, I2S1, NORMAL, NORMAL, INPUT),
143
144 /* SPDIF */
145 DEFAULT_PINMUX(SPDIF_IN, SPDIF, NORMAL, NORMAL, INPUT),
146 DEFAULT_PINMUX(SPDIF_OUT, SPDIF, NORMAL, NORMAL, OUTPUT),
147
148 /* I2S2 */
149 DEFAULT_PINMUX(DAP3_FS, I2S2, NORMAL, NORMAL, INPUT),
150 DEFAULT_PINMUX(DAP3_DIN, I2S2, NORMAL, NORMAL, INPUT),
151 DEFAULT_PINMUX(DAP3_DOUT, I2S2, NORMAL, NORMAL, INPUT),
152 DEFAULT_PINMUX(DAP3_SCLK, I2S2, NORMAL, NORMAL, INPUT),
153
154 /* DAP4 */
155 DEFAULT_PINMUX(DAP4_FS, I2S3, NORMAL, NORMAL, INPUT),
156 DEFAULT_PINMUX(DAP4_DIN, I2S3, NORMAL, NORMAL, INPUT),
157 DEFAULT_PINMUX(DAP4_SCLK, I2S3, NORMAL, NORMAL, INPUT),
158
159 /* Tamonten GPIO */
160 DEFAULT_PINMUX(GPIO_PV2, RSVD1, NORMAL, NORMAL, OUTPUT),
161 DEFAULT_PINMUX(GPIO_PV3, RSVD1, NORMAL, NORMAL, INPUT),
162 DEFAULT_PINMUX(SPI2_CS1_N, RSVD1, NORMAL, NORMAL, INPUT),
163
164 /* LCD */
165 DEFAULT_PINMUX(LCD_PWR1, DISPA, NORMAL, NORMAL, INPUT),
166 DEFAULT_PINMUX(LCD_PWR2, DISPA, NORMAL, NORMAL, INPUT),
167 DEFAULT_PINMUX(LCD_SDIN, DISPA, NORMAL, NORMAL, INPUT),
168 DEFAULT_PINMUX(LCD_SDOUT, DISPA, NORMAL, NORMAL, INPUT),
169 DEFAULT_PINMUX(LCD_WR_N, DISPA, NORMAL, NORMAL, INPUT),
170 DEFAULT_PINMUX(LCD_CS0_N, DISPA, NORMAL, NORMAL, INPUT),
171 DEFAULT_PINMUX(LCD_DC0, DISPA, NORMAL, NORMAL, INPUT),
172 DEFAULT_PINMUX(LCD_SCK, DISPA, NORMAL, NORMAL, INPUT),
173 DEFAULT_PINMUX(LCD_PWR0, DISPA, NORMAL, NORMAL, INPUT),
174 DEFAULT_PINMUX(LCD_PCLK, DISPA, NORMAL, NORMAL, INPUT),
175 DEFAULT_PINMUX(LCD_DE, DISPA, NORMAL, NORMAL, INPUT),
176 DEFAULT_PINMUX(LCD_HSYNC, DISPA, NORMAL, NORMAL, INPUT),
177 DEFAULT_PINMUX(LCD_VSYNC, DISPA, NORMAL, NORMAL, INPUT),
178 DEFAULT_PINMUX(LCD_D0, DISPA, NORMAL, NORMAL, INPUT),
179 DEFAULT_PINMUX(LCD_D1, DISPA, NORMAL, NORMAL, INPUT),
180 DEFAULT_PINMUX(LCD_D2, DISPA, NORMAL, NORMAL, INPUT),
181 DEFAULT_PINMUX(LCD_D3, DISPA, NORMAL, NORMAL, INPUT),
182 DEFAULT_PINMUX(LCD_D4, DISPA, NORMAL, NORMAL, INPUT),
183 DEFAULT_PINMUX(LCD_D5, DISPA, NORMAL, NORMAL, INPUT),
184 DEFAULT_PINMUX(LCD_D6, DISPA, NORMAL, NORMAL, INPUT),
185 DEFAULT_PINMUX(LCD_D7, DISPA, NORMAL, NORMAL, INPUT),
186 DEFAULT_PINMUX(LCD_D8, DISPA, NORMAL, NORMAL, INPUT),
187 DEFAULT_PINMUX(LCD_D9, DISPA, NORMAL, NORMAL, INPUT),
188 DEFAULT_PINMUX(LCD_D10, DISPA, NORMAL, NORMAL, INPUT),
189 DEFAULT_PINMUX(LCD_D11, DISPA, NORMAL, NORMAL, INPUT),
190 DEFAULT_PINMUX(LCD_D12, DISPA, NORMAL, NORMAL, INPUT),
191 DEFAULT_PINMUX(LCD_D13, DISPA, NORMAL, NORMAL, INPUT),
192 DEFAULT_PINMUX(LCD_D14, DISPA, NORMAL, NORMAL, INPUT),
193 DEFAULT_PINMUX(LCD_D15, DISPA, NORMAL, NORMAL, INPUT),
194 DEFAULT_PINMUX(LCD_D16, DISPA, NORMAL, NORMAL, INPUT),
195 DEFAULT_PINMUX(LCD_D17, DISPA, NORMAL, NORMAL, INPUT),
196 DEFAULT_PINMUX(LCD_D18, DISPA, NORMAL, NORMAL, INPUT),
197 DEFAULT_PINMUX(LCD_D19, DISPA, NORMAL, NORMAL, INPUT),
198 DEFAULT_PINMUX(LCD_D20, DISPA, NORMAL, NORMAL, INPUT),
199 DEFAULT_PINMUX(LCD_D21, DISPA, NORMAL, NORMAL, INPUT),
200 DEFAULT_PINMUX(LCD_D22, DISPA, NORMAL, NORMAL, INPUT),
201 DEFAULT_PINMUX(LCD_D23, DISPA, NORMAL, NORMAL, INPUT),
202 DEFAULT_PINMUX(LCD_CS1_N, DISPA, NORMAL, NORMAL, INPUT),
203 DEFAULT_PINMUX(LCD_M1, DISPA, NORMAL, NORMAL, INPUT),
204 DEFAULT_PINMUX(LCD_DC1, DISPA, NORMAL, NORMAL, INPUT),
205 DEFAULT_PINMUX(CRT_HSYNC, CRT, NORMAL, NORMAL, OUTPUT),
206 DEFAULT_PINMUX(CRT_VSYNC, CRT, NORMAL, NORMAL, OUTPUT),
207
208 /* BT656 */
209 LV_PINMUX(VI_MCLK, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
210 LV_PINMUX(VI_PCLK, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
211 LV_PINMUX(VI_HSYNC, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
212 LV_PINMUX(VI_VSYNC, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
213 LV_PINMUX(VI_D2, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
214 LV_PINMUX(VI_D3, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
215 LV_PINMUX(VI_D4, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
216 LV_PINMUX(VI_D5, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
217 LV_PINMUX(VI_D6, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
218 LV_PINMUX(VI_D7, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
219 LV_PINMUX(VI_D8, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
220 LV_PINMUX(VI_D9, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
221 LV_PINMUX(VI_D11, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
222
223 /* GPIOs */
224 DEFAULT_PINMUX(GPIO_PU5, RSVD1, NORMAL, NORMAL, INPUT),
225 DEFAULT_PINMUX(GPIO_PU6, RSVD1, NORMAL, NORMAL, INPUT),
226 DEFAULT_PINMUX(GMI_AD12, RSVD1, NORMAL, NORMAL, INPUT),
227
228 /* LCD BL */
229 DEFAULT_PINMUX(GMI_AD8, PWM0, NORMAL, NORMAL, OUTPUT),
230 DEFAULT_PINMUX(GMI_AD10, RSVD4, NORMAL, NORMAL, OUTPUT),
231
232 /* SPI4 */
233 DEFAULT_PINMUX(GMI_A16, SPI4, NORMAL, NORMAL, INPUT),
234 DEFAULT_PINMUX(GMI_A17, SPI4, NORMAL, NORMAL, INPUT),
235 DEFAULT_PINMUX(GMI_A18, SPI4, NORMAL, NORMAL, INPUT),
236 DEFAULT_PINMUX(GMI_A19, SPI4, NORMAL, NORMAL, INPUT),
237
238 /* Video input GPIO */
239 DEFAULT_PINMUX(GPIO_PCC1, RSVD1, NORMAL, NORMAL, INPUT),
240 DEFAULT_PINMUX(GPIO_PBB0, RSVD1, NORMAL, NORMAL, INPUT),
241 DEFAULT_PINMUX(GPIO_PBB7, RSVD1, NORMAL, NORMAL, INPUT),
242
243 /* Sensor GPIO */
244 DEFAULT_PINMUX(GPIO_PCC2, RSVD1, NORMAL, NORMAL, INPUT),
245
246 /* JTAG */
247 DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, OUTPUT),
248
249 /* Power controls */
250 DEFAULT_PINMUX(GMI_CS2_N, RSVD1, NORMAL, NORMAL, INPUT),
251
252 /* SPI1 */
253 DEFAULT_PINMUX(SPI1_MOSI, SPI1, NORMAL, NORMAL, INPUT),
254 DEFAULT_PINMUX(SPI1_SCK, SPI1, NORMAL, NORMAL, INPUT),
255 DEFAULT_PINMUX(SPI1_CS0_N, SPI1, NORMAL, NORMAL, INPUT),
256 DEFAULT_PINMUX(SPI1_MISO, SPI1, NORMAL, NORMAL, INPUT),
257
258 /* PMU */
259 DEFAULT_PINMUX(GPIO_PV0, RSVD1, UP, NORMAL, INPUT),
260 DEFAULT_PINMUX(SYS_CLK_REQ, SYSCLK, NORMAL, NORMAL, OUTPUT),
261 DEFAULT_PINMUX(CLK_32K_IN, SYSCLK, NORMAL, NORMAL, INPUT),
262
263 /* PCI */
264 DEFAULT_PINMUX(PEX_L0_PRSNT_N, PCIE, NORMAL, NORMAL, INPUT),
265 DEFAULT_PINMUX(PEX_L0_RST_N, PCIE, NORMAL, NORMAL, OUTPUT),
266 DEFAULT_PINMUX(PEX_L0_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT),
267 DEFAULT_PINMUX(PEX_WAKE_N, PCIE, NORMAL, NORMAL, INPUT),
268 DEFAULT_PINMUX(PEX_L1_PRSNT_N, PCIE, NORMAL, NORMAL, INPUT),
269 DEFAULT_PINMUX(PEX_L1_RST_N, PCIE, NORMAL, NORMAL, OUTPUT),
270 DEFAULT_PINMUX(PEX_L1_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT),
271 DEFAULT_PINMUX(PEX_L2_PRSNT_N, PCIE, NORMAL, NORMAL, INPUT),
272 DEFAULT_PINMUX(PEX_L2_RST_N, PCIE, NORMAL, NORMAL, OUTPUT),
273 DEFAULT_PINMUX(PEX_L2_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT),
274
275 /* HDMI */
276 DEFAULT_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT),
277 DEFAULT_PINMUX(HDMI_INT, RSVD1, NORMAL, TRISTATE, INPUT),
278};
279
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]280static struct pmux_pingrp_config unused_pins_lowpower[] = {
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]281 /* UART1 - NC */
282 DEFAULT_PINMUX(ULPI_DATA2, UARTA, NORMAL, NORMAL, INPUT),
283 DEFAULT_PINMUX(ULPI_DATA3, UARTA, NORMAL, NORMAL, INPUT),
284 DEFAULT_PINMUX(ULPI_DATA4, UARTA, NORMAL, NORMAL, INPUT),
285 DEFAULT_PINMUX(ULPI_DATA5, UARTA, NORMAL, NORMAL, INPUT),
286 DEFAULT_PINMUX(ULPI_DATA6, UARTA, NORMAL, NORMAL, INPUT),
287 DEFAULT_PINMUX(ULPI_DATA7, UARTA, NORMAL, NORMAL, INPUT),
288
289 /* UART2 - NC */
290 DEFAULT_PINMUX(UART2_RTS_N, UARTB, NORMAL, NORMAL, INPUT),
291 DEFAULT_PINMUX(UART2_CTS_N, UARTB, NORMAL, NORMAL, INPUT),
292
293 /* DAP - NC */
294 DEFAULT_PINMUX(CLK1_REQ, RSVD1, NORMAL, NORMAL, INPUT),
295 DEFAULT_PINMUX(CLK3_OUT, RSVD1, NORMAL, NORMAL, INPUT),
296 DEFAULT_PINMUX(CLK3_REQ, RSVD1, NORMAL, NORMAL, INPUT),
297
298 /* DAP4 - NC */
299 DEFAULT_PINMUX(DAP4_DOUT, I2S3, NORMAL, NORMAL, INPUT),
300
301 /* Tamonten GPIO - NC */
302 DEFAULT_PINMUX(CLK2_OUT, EXTPERIPH2, NORMAL, NORMAL, INPUT),
303 DEFAULT_PINMUX(CLK2_REQ, DAP, NORMAL, NORMAL, INPUT),
304
305 /* BT656 - NC */
306 LV_PINMUX(VI_D0, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
307 LV_PINMUX(VI_D1, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
308 LV_PINMUX(VI_D10, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
309
310 /* GPIO - NC */
311 DEFAULT_PINMUX(GPIO_PU0, RSVD1, NORMAL, NORMAL, INPUT),
312 DEFAULT_PINMUX(GPIO_PU1, RSVD1, NORMAL, NORMAL, INPUT),
313 DEFAULT_PINMUX(GPIO_PU2, RSVD1, NORMAL, NORMAL, INPUT),
314 DEFAULT_PINMUX(GPIO_PU3, RSVD1, NORMAL, NORMAL, INPUT),
315 DEFAULT_PINMUX(GPIO_PU4, RSVD1, NORMAL, NORMAL, INPUT),
316
317 /* Video input - NC */
318 DEFAULT_PINMUX(CAM_MCLK, RSVD1, NORMAL, NORMAL, INPUT),
319 DEFAULT_PINMUX(GPIO_PBB3, RSVD1, NORMAL, NORMAL, INPUT),
320 DEFAULT_PINMUX(GPIO_PBB5, RSVD1, NORMAL, NORMAL, INPUT),
321 DEFAULT_PINMUX(GPIO_PBB6, RSVD1, NORMAL, NORMAL, INPUT),
322 DEFAULT_PINMUX(KB_ROW11, RSVD1, NORMAL, NORMAL, INPUT),
323
324 /* KBC keys - NC */
325 DEFAULT_PINMUX(KB_ROW0, KBC, UP, NORMAL, INPUT),
326 DEFAULT_PINMUX(KB_ROW1, KBC, UP, NORMAL, INPUT),
327 DEFAULT_PINMUX(KB_ROW2, KBC, UP, NORMAL, INPUT),
328 DEFAULT_PINMUX(KB_ROW3, KBC, UP, NORMAL, INPUT),
329 DEFAULT_PINMUX(KB_ROW4, KBC, UP, NORMAL, INPUT),
330 DEFAULT_PINMUX(KB_ROW5, KBC, UP, NORMAL, INPUT),
331 DEFAULT_PINMUX(KB_ROW6, KBC, UP, NORMAL, INPUT),
332 DEFAULT_PINMUX(KB_ROW7, KBC, UP, NORMAL, INPUT),
333 DEFAULT_PINMUX(KB_ROW8, KBC, UP, NORMAL, INPUT),
334 DEFAULT_PINMUX(KB_ROW9, KBC, UP, NORMAL, INPUT),
335 DEFAULT_PINMUX(KB_ROW10, KBC, UP, NORMAL, INPUT),
336 DEFAULT_PINMUX(KB_ROW12, KBC, UP, NORMAL, INPUT),
337 DEFAULT_PINMUX(KB_ROW13, KBC, UP, NORMAL, INPUT),
338 DEFAULT_PINMUX(KB_ROW14, KBC, UP, NORMAL, INPUT),
339 DEFAULT_PINMUX(KB_ROW15, KBC, UP, NORMAL, INPUT),
340 DEFAULT_PINMUX(KB_COL0, KBC, UP, NORMAL, INPUT),
341 DEFAULT_PINMUX(KB_COL1, KBC, UP, NORMAL, INPUT),
342 DEFAULT_PINMUX(KB_COL2, KBC, UP, NORMAL, INPUT),
343 DEFAULT_PINMUX(KB_COL3, KBC, UP, NORMAL, INPUT),
344 DEFAULT_PINMUX(KB_COL4, KBC, UP, NORMAL, INPUT),
345 DEFAULT_PINMUX(KB_COL5, KBC, UP, NORMAL, INPUT),
346 DEFAULT_PINMUX(KB_COL6, KBC, UP, NORMAL, INPUT),
347 DEFAULT_PINMUX(KB_COL7, KBC, UP, NORMAL, INPUT),
348
349 /* PMU - NC */
350 DEFAULT_PINMUX(CLK_32K_OUT, RSVD1, NORMAL, NORMAL, INPUT),
351
352 /* Power rails GPIO - NC */
353 DEFAULT_PINMUX(SPI2_SCK, RSVD1, NORMAL, NORMAL, INPUT),
354 DEFAULT_PINMUX(GPIO_PBB4, RSVD1, NORMAL, NORMAL, INPUT),
355
356 /* Others - NC */
357 DEFAULT_PINMUX(GMI_WP_N, RSVD1, NORMAL, NORMAL, INPUT),
358 DEFAULT_PINMUX(GPIO_PV1, RSVD1, NORMAL, NORMAL, INPUT),
359 DEFAULT_PINMUX(GMI_WAIT, NAND, UP, TRISTATE, OUTPUT),
360 DEFAULT_PINMUX(GMI_ADV_N, NAND, NORMAL, TRISTATE, OUTPUT),
361 DEFAULT_PINMUX(GMI_CLK, NAND, NORMAL, TRISTATE, OUTPUT),
362 DEFAULT_PINMUX(GMI_CS3_N, NAND, NORMAL, NORMAL, OUTPUT),
363 DEFAULT_PINMUX(GMI_CS7_N, NAND, UP, NORMAL, INPUT),
364 DEFAULT_PINMUX(GMI_AD0, NAND, NORMAL, TRISTATE, OUTPUT),
365 DEFAULT_PINMUX(GMI_AD1, NAND, NORMAL, TRISTATE, OUTPUT),
366 DEFAULT_PINMUX(GMI_AD2, NAND, NORMAL, TRISTATE, OUTPUT),
367 DEFAULT_PINMUX(GMI_AD3, NAND, NORMAL, TRISTATE, OUTPUT),
368 DEFAULT_PINMUX(GMI_AD4, NAND, NORMAL, TRISTATE, OUTPUT),
369 DEFAULT_PINMUX(GMI_AD5, NAND, NORMAL, TRISTATE, OUTPUT),
370 DEFAULT_PINMUX(GMI_AD6, NAND, NORMAL, TRISTATE, OUTPUT),
371 DEFAULT_PINMUX(GMI_AD7, NAND, NORMAL, TRISTATE, OUTPUT),
372 DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, NORMAL, OUTPUT),
373 DEFAULT_PINMUX(GMI_AD11, NAND, NORMAL, NORMAL, OUTPUT),
374 DEFAULT_PINMUX(GMI_AD13, NAND, UP, NORMAL, INPUT),
375 DEFAULT_PINMUX(GMI_WR_N, NAND, NORMAL, TRISTATE, OUTPUT),
376 DEFAULT_PINMUX(GMI_OE_N, NAND, NORMAL, TRISTATE, OUTPUT),
377 DEFAULT_PINMUX(GMI_DQS, NAND, NORMAL, TRISTATE, OUTPUT),
378};
379
Stephen Warrendfb42fc2014-03-21 12:28:56 -0600[diff] [blame^]380static struct pmux_drvgrp_config tamonten_ng_padctrl[] = {
381 /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
Alban Bedel8f380382013-11-14 10:58:30 +0100[diff] [blame]382 DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
383 SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
384};
385#endif /* _PINMUX_CONFIG_TAMONTEN_NG_H_ */