Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Bluewater Systems Snapper 9G45 module |
| 4 | * |
| 5 | * (C) Copyright 2011 Bluewater Systems |
| 6 | * Author: Andre Renaud <andre@bluewatersys.com> |
| 7 | * Author: Ryan Mallon <ryan@bluewatersys.com> |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
| 13 | /* SoC type is defined in boards.cfg */ |
| 14 | #include <asm/hardware.h> |
| 15 | #include <linux/sizes.h> |
| 16 | |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 17 | /* ARM asynchronous clock */ |
| 18 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ |
| 19 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
| 20 | |
| 21 | /* CPU */ |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 22 | |
| 23 | /* SDRAM */ |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 24 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 |
| 25 | #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */ |
| 26 | #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM + 0x1000 - \ |
| 27 | GENERATED_GBL_DATA_SIZE) |
| 28 | |
| 29 | /* Mem test settings */ |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 30 | |
| 31 | /* NAND Flash */ |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 32 | #define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 33 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 34 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
| 35 | #define CONFIG_SYS_NAND_DBW_8 |
| 36 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ |
| 37 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */ |
| 38 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
| 39 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 |
| 40 | |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 41 | /* UARTs/Serial console */ |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 42 | |
| 43 | /* Boot options */ |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 44 | |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 45 | /* Environment settings */ |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 46 | |
| 47 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 48 | "ethaddr=00:00:00:00:00:00\0" \ |
| 49 | "serial=0\0" \ |
| 50 | "stdout=serial_atmel\0" \ |
| 51 | "stderr=serial_atmel\0" \ |
| 52 | "stdin=serial_atmel\0" \ |
| 53 | "bootlimit=3\0" \ |
| 54 | "loadaddr=0x71000000\0" \ |
| 55 | "board_rev=2\0" \ |
| 56 | "bootfile=/tftpboot/uImage\0" \ |
| 57 | "bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \ |
| 58 | "nfsroot=/export/root\0" \ |
| 59 | "boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \ |
| 60 | "boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \ |
| 61 | "boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \ |
| 62 | "boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \ |
| 63 | "boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \ |
| 64 | "bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \ |
| 65 | "altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0" |
| 66 | |
| 67 | /* Console settings */ |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 68 | |
Andre Renaud | 885fc03 | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 69 | #endif /* __CONFIG_H */ |