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Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +09001/*
2 * Configuation settings for the Renesas Solutions ECOVEC board
3 *
4 * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
5 * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +09009 */
10
11#ifndef __ECOVEC_H
12#define __ECOVEC_H
13
14/*
15 * Address Interface BusWidth
16 *-----------------------------------------
17 * 0x0000_0000 U-Boot 16bit
18 * 0x0004_0000 Linux romImage 16bit
19 * 0x0014_0000 MTD for Linux 16bit
20 * 0x0400_0000 Internal I/O 16/32bit
21 * 0x0800_0000 DRAM 32bit
22 * 0x1800_0000 MFI 16bit
23 */
24
25#undef DEBUG
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090026#define CONFIG_CPU_SH7724 1
Nobuhiro Iwamatsu77fe6e72012-04-18 11:05:20 +090027#define CONFIG_BOARD_LATE_INIT 1
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090028#define CONFIG_ECOVEC 1
29
30#define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
31#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
32
33#define CONFIG_CMD_FLASH
34#define CONFIG_CMD_MEMORY
35#define CONFIG_CMD_NET
36#define CONFIG_CMD_PING
37#define CONFIG_CMD_MII
38#define CONFIG_CMD_NFS
39#define CONFIG_CMD_SDRAM
40#define CONFIG_CMD_ENV
41#define CONFIG_CMD_USB
42#define CONFIG_CMD_FAT
43#define CONFIG_CMD_EXT2
44#define CONFIG_CMD_SAVEENV
45
46#define CONFIG_USB_STORAGE
47#define CONFIG_DOS_PARTITION
48
49#define CONFIG_BAUDRATE 115200
50#define CONFIG_BOOTDELAY 3
51#define CONFIG_BOOTARGS "console=ttySC0,115200"
52
53#define CONFIG_VERSION_VARIABLE
54#undef CONFIG_SHOW_BOOT_PROGRESS
55
56/* I2C */
57#define CONFIG_CMD_I2C
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +090058#define CONFIG_SYS_I2C
59#define CONFIG_SYS_I2C_SH
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090060#define CONFIG_SYS_I2C_SLAVE 0x7F
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +090061#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2
62#define CONFIG_SYS_I2C_SH_BASE0 0xA4470000
63#define CONFIG_SYS_I2C_SH_SPEED0 100000
64#define CONFIG_SYS_I2C_SH_BASE1 0xA4750000
65#define CONFIG_SYS_I2C_SH_SPEED1 100000
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090066#define CONFIG_SH_I2C_DATA_HIGH 4
67#define CONFIG_SH_I2C_DATA_LOW 5
68#define CONFIG_SH_I2C_CLOCK 41666666
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090069
70/* Ether */
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090071#define CONFIG_SH_ETHER 1
72#define CONFIG_SH_ETHER_USE_PORT (0)
73#define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
Nobuhiro Iwamatsue50edf92011-12-01 18:48:38 +000074#define CONFIG_PHY_SMSC 1
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090075#define CONFIG_PHYLIB
76#define CONFIG_BITBANGMII
77#define CONFIG_BITBANGMII_MULTI
Nobuhiro Iwamatsua80a6612012-05-16 10:23:21 +090078#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090079
80/* USB / R8A66597 */
81#define CONFIG_USB_R8A66597_HCD
82#define CONFIG_R8A66597_BASE_ADDR 0xA4D80000
83#define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */
84#define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */
85#define CONFIG_R8A66597_ENDIAN 0x0000 /* little */
86#define CONFIG_SUPERH_ON_CHIP_R8A66597
87
88/* undef to save memory */
89#define CONFIG_SYS_LONGHELP
90/* Monitor Command Prompt */
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090091/* Buffer size for input from the Console */
92#define CONFIG_SYS_CBSIZE 256
93/* Buffer size for Console output */
94#define CONFIG_SYS_PBSIZE 256
95/* max args accepted for monitor commands */
96#define CONFIG_SYS_MAXARGS 16
97/* Buffer size for Boot Arguments passed to kernel */
98#define CONFIG_SYS_BARGSIZE 512
99/* List of legal baudrate settings for this board */
100#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
101
102/* SCIF */
103#define CONFIG_SCIF_CONSOLE 1
104#define CONFIG_SCIF 1
105#define CONFIG_CONS_SCIF0 1
106
107/* Suppress display of console information at boot */
108#undef CONFIG_SYS_CONSOLE_INFO_QUIET
109#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
110#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
111
112/* SDRAM */
113#define CONFIG_SYS_SDRAM_BASE (0x88000000)
114#define CONFIG_SYS_SDRAM_SIZE (256 * 1024 * 1024)
115#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
116
117#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
118#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024)
119/* Enable alternate, more extensive, memory test */
120#undef CONFIG_SYS_ALT_MEMTEST
121/* Scratch address used by the alternate memory test */
122#undef CONFIG_SYS_MEMTEST_SCRATCH
123
124/* Enable temporary baudrate change while serial download */
125#undef CONFIG_SYS_LOADS_BAUD_CHANGE
126
127/* FLASH */
128#define CONFIG_FLASH_CFI_DRIVER 1
129#define CONFIG_SYS_FLASH_CFI
130#undef CONFIG_SYS_FLASH_QUIET_TEST
131#define CONFIG_SYS_FLASH_EMPTY_INFO
132#define CONFIG_SYS_FLASH_BASE (0xA0000000)
133#define CONFIG_SYS_MAX_FLASH_SECT 512
134
135/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
136#define CONFIG_SYS_MAX_FLASH_BANKS 1
137#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
138
139/* Timeout for Flash erase operations (in ms) */
140#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
141/* Timeout for Flash write operations (in ms) */
142#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
143/* Timeout for Flash set sector lock bit operations (in ms) */
144#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
145/* Timeout for Flash clear lock bit operations (in ms) */
146#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
147
148/*
149 * Use hardware flash sectors protection instead
150 * of U-Boot software protection
151 */
152#undef CONFIG_SYS_FLASH_PROTECTION
153#undef CONFIG_SYS_DIRECT_FLASH_TFTP
154
155/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
156#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
157/* Monitor size */
158#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
159/* Size of DRAM reserved for malloc() use */
160#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +0900161#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
162
163/* ENV setting */
164#define CONFIG_ENV_IS_IN_FLASH
165#define CONFIG_ENV_OVERWRITE 1
166#define CONFIG_ENV_SECT_SIZE (128 * 1024)
167#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
168#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
169/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
170#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
171#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
172
173/* Board Clock */
174#define CONFIG_SYS_CLK_FREQ 41666666
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +0900175#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
176#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +0900177#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +0900178
179#endif /* __ECOVEC_H */