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Heiko Schocherc0dcece2013-08-19 16:39:01 +02001/*
2 * siemens rut
3 * (C) Copyright 2013 Siemens Schweiz AG
4 * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * U-Boot file:/include/configs/am335x_evm.h
8 *
9 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13
14#ifndef __CONFIG_RUT_H
15#define __CONFIG_RUT_H
16
17#define CONFIG_SIEMENS_RUT
18#define MACH_TYPE_RUT 4316
19#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_RUT
20
21#include "siemens-am33x-common.h"
22
23#define CONFIG_SYS_MPUCLK 600
24#define RUT_IOCTRL_VAL 0x18b
25#define DDR_PLL_FREQ 303
26
27 /* Physical Memory Map */
28#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */
29
30/* I2C Configuration */
31#define CONFIG_SYS_I2C_SPEED 100000
32
33#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
34#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
35#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */
36#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */
37
38#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200
39
Heiko Schocherc0dcece2013-08-19 16:39:01 +020040#define CONFIG_PHY_NATSEMI
41
42#define CONFIG_FACTORYSET
43
Heiko Schocherc0dcece2013-08-19 16:39:01 +020044/* Watchdog */
45#define WATCHDOG_TRIGGER_GPIO 14
46
47#ifndef CONFIG_SPL_BUILD
48
Heiko Schocher61159b72015-06-16 14:59:34 +020049/* Use common default */
50#define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_V1
51
Heiko Schocherc0dcece2013-08-19 16:39:01 +020052/* Default env settings */
53#define CONFIG_EXTRA_ENV_SETTINGS \
54 "hostname=rut\0" \
Heiko Schocher6b3943f2016-06-07 08:55:45 +020055 "ubi_off=2048\0"\
Samuel Egli56eb3da2013-11-04 14:05:03 +010056 "nand_img_size=0x500000\0" \
57 "splashpos=m,m\0" \
Heiko Schocherc0dcece2013-08-19 16:39:01 +020058 "optargs=fixrtc --no-log consoleblank=0 \0" \
Heiko Schocher61159b72015-06-16 14:59:34 +020059 CONFIG_ENV_SETTINGS_V1 \
60 CONFIG_ENV_SETTINGS_NAND_V1 \
Heiko Schocherc0dcece2013-08-19 16:39:01 +020061 "mmc_dev=0\0" \
62 "mmc_root=/dev/mmcblk0p2 rw\0" \
63 "mmc_root_fs_type=ext4 rootwait\0" \
64 "mmc_load_uimage=" \
65 "mmc rescan; " \
66 "setenv bootfile uImage;" \
67 "fatload mmc ${mmc_dev} ${kloadaddr} ${bootfile}\0" \
68 "loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
69 "importbootenv=echo Importing environment from mmc ...; " \
70 "env import -t $loadaddr $filesize\0" \
71 "mmc_args=run bootargs_defaults;" \
72 "mtdparts default;" \
73 "setenv bootargs ${bootargs} " \
74 "root=${mmc_root} ${mtdparts}" \
75 "rootfstype=${mmc_root_fs_type} ip=${ip_method} " \
76 "eth=${ethaddr} " \
77 "\0" \
78 "mmc_boot=run mmc_args; " \
79 "run mmc_load_uimage; " \
80 "bootm ${kloadaddr}\0" \
81 ""
82
83#ifndef CONFIG_RESTORE_FLASH
84/* set to negative value for no autoboot */
Heiko Schocherc0dcece2013-08-19 16:39:01 +020085
86#define CONFIG_BOOTCOMMAND \
87 "if mmc rescan; then " \
88 "echo SD/MMC found on device ${mmc_dev};" \
89 "if run loadbootenv; then " \
90 "echo Loaded environment from ${bootenv};" \
91 "run importbootenv;" \
92 "fi;" \
93 "if test -n $uenvcmd; then " \
94 "echo Running uenvcmd ...;" \
95 "run uenvcmd;" \
96 "fi;" \
97 "if run mmc_load_uimage; then " \
98 "run mmc_args;" \
99 "bootm ${kloadaddr};" \
100 "fi;" \
101 "fi;" \
102 "run nand_boot;" \
Samuel Egli56eb3da2013-11-04 14:05:03 +0100103 "reset;"
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200104
105#else
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200106
107#define CONFIG_BOOTCOMMAND \
108 "setenv autoload no; " \
109 "dhcp; " \
110 "if tftp 80000000 debrick.scr; then " \
111 "source 80000000; " \
112 "fi"
113#endif
114
115#endif /* CONFIG_SPL_BUILD */
116
117#ifdef CONFIG_SPL_BUILD
118#undef CONFIG_HW_WATCHDOG
119#endif
120
121#define CONFIG_VIDEO
122#if defined(CONFIG_VIDEO)
123#define CONFIG_VIDEO_DA8XX
124#define CONFIG_CFB_CONSOLE
125#define CONFIG_VGA_AS_SINGLE_DEVICE
126#define CONFIG_SPLASH_SCREEN
127#define CONFIG_SPLASH_SCREEN_ALIGN
128#define CONFIG_VIDEO_LOGO
129#define CONFIG_VIDEO_BMP_RLE8
130#define CONFIG_VIDEO_BMP_LOGO
131#define CONFIG_CMD_BMP
132#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE
133
134#define CONFIG_SPI
135#define CONFIG_OMAP3_SPI
136
137#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */
138#define CONFIG_ARCH_EARLY_INIT_R
139#define CONFIG_FORMIKE
Samuel Egli56eb3da2013-11-04 14:05:03 +0100140#define DISPL_PLL_SPREAD_SPECTRUM
141#define CONFIG_SYS_CONSOLE_BG_COL 0xff
142#define CONFIG_SYS_CONSOLE_FG_COL 0x00
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200143#endif
144
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200145#endif /* ! __CONFIG_RUT_H */