Guennadi Liakhovetski | b5dc9b3 | 2008-04-14 10:53:12 +0200 | [diff] [blame] | 1 | /* |
2 | * January 2004 - Changed to support H4 device | ||||
3 | * Copyright (c) 2004 Texas Instruments | ||||
4 | * | ||||
5 | * (C) Copyright 2002 | ||||
Detlev Zundel | 792a09e | 2009-05-13 10:54:10 +0200 | [diff] [blame] | 6 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
Guennadi Liakhovetski | b5dc9b3 | 2008-04-14 10:53:12 +0200 | [diff] [blame] | 7 | * |
Wolfgang Denk | 3765b3e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Guennadi Liakhovetski | b5dc9b3 | 2008-04-14 10:53:12 +0200 | [diff] [blame] | 9 | */ |
10 | |||||
11 | OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") | ||||
12 | OUTPUT_ARCH(arm) | ||||
13 | ENTRY(_start) | ||||
14 | SECTIONS | ||||
15 | { | ||||
16 | . = 0x00000000; | ||||
17 | |||||
18 | . = ALIGN(4); | ||||
19 | .text : | ||||
20 | { | ||||
Albert ARIBAUD | d026dec | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 21 | *(.__image_copy_start) |
Guennadi Liakhovetski | d23ff68 | 2008-04-03 17:04:22 +0200 | [diff] [blame] | 22 | /* WARNING - the following is hand-optimized to fit within */ |
23 | /* the sector layout of our flash chips! XXX FIXME XXX */ | ||||
24 | |||||
Masahiro Yamada | e2906a5 | 2013-11-11 14:36:00 +0900 | [diff] [blame^] | 25 | arch/arm/cpu/arm1136/start.o (.text*) |
26 | board/freescale/mx31ads/built-in.o (.text*) | ||||
27 | arch/arm/lib/built-in.o (.text*) | ||||
28 | net/built-in.o (.text*) | ||||
29 | drivers/mtd/built-in.o (.text*) | ||||
Guennadi Liakhovetski | d23ff68 | 2008-04-03 17:04:22 +0200 | [diff] [blame] | 30 | |
31 | . = DEFINED(env_offset) ? env_offset : .; | ||||
Benoît Thébaudeau | 1a9a91d | 2013-04-11 09:36:03 +0000 | [diff] [blame] | 32 | common/env_embedded.o(.text*) |
Guennadi Liakhovetski | d23ff68 | 2008-04-03 17:04:22 +0200 | [diff] [blame] | 33 | |
Benoît Thébaudeau | 1a9a91d | 2013-04-11 09:36:03 +0000 | [diff] [blame] | 34 | *(.text*) |
Guennadi Liakhovetski | b5dc9b3 | 2008-04-14 10:53:12 +0200 | [diff] [blame] | 35 | } |
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 36 | . = ALIGN(4); |
Benoît Thébaudeau | 1a9a91d | 2013-04-11 09:36:03 +0000 | [diff] [blame] | 37 | .rodata : { *(.rodata*) } |
Guennadi Liakhovetski | b5dc9b3 | 2008-04-14 10:53:12 +0200 | [diff] [blame] | 38 | |
39 | . = ALIGN(4); | ||||
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 40 | .data : { |
Benoît Thébaudeau | 1a9a91d | 2013-04-11 09:36:03 +0000 | [diff] [blame] | 41 | *(.data*) |
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 42 | } |
Guennadi Liakhovetski | b5dc9b3 | 2008-04-14 10:53:12 +0200 | [diff] [blame] | 43 | |
44 | . = ALIGN(4); | ||||
Guennadi Liakhovetski | b5dc9b3 | 2008-04-14 10:53:12 +0200 | [diff] [blame] | 45 | |
46 | . = ALIGN(4); | ||||
Marek Vasut | 5567514 | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 47 | .u_boot_list : { |
Albert ARIBAUD | ef123c5 | 2013-02-25 00:59:00 +0000 | [diff] [blame] | 48 | KEEP(*(SORT(.u_boot_list*))); |
Marek Vasut | 5567514 | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 49 | } |
Guennadi Liakhovetski | b5dc9b3 | 2008-04-14 10:53:12 +0200 | [diff] [blame] | 50 | |
51 | . = ALIGN(4); | ||||
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 52 | |
Albert ARIBAUD | d026dec | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 53 | .image_copy_end : |
54 | { | ||||
55 | *(.__image_copy_end) | ||||
56 | } | ||||
Stefano Babic | b736e4b | 2012-10-10 21:11:41 +0000 | [diff] [blame] | 57 | |
Albert ARIBAUD | 47bd65e | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 58 | .rel_dyn_start : |
59 | { | ||||
60 | *(.__rel_dyn_start) | ||||
61 | } | ||||
62 | |||||
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 63 | .rel.dyn : { |
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 64 | *(.rel*) |
Albert ARIBAUD | 47bd65e | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 65 | } |
66 | |||||
67 | .rel_dyn_end : | ||||
68 | { | ||||
69 | *(.__rel_dyn_end) | ||||
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 70 | } |
71 | |||||
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 72 | _end = .; |
73 | |||||
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 74 | /* |
75 | * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c | ||||
76 | * __bss_base and __bss_limit are for linker only (overlay ordering) | ||||
77 | */ | ||||
78 | |||||
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 79 | .bss_start __rel_dyn_start (OVERLAY) : { |
80 | KEEP(*(.__bss_start)); | ||||
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 81 | __bss_base = .; |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 82 | } |
83 | |||||
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 84 | .bss __bss_base (OVERLAY) : { |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 85 | *(.bss*) |
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 86 | . = ALIGN(4); |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 87 | __bss_limit = .; |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 88 | } |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 89 | .bss_end __bss_limit (OVERLAY) : { |
90 | KEEP(*(.__bss_end)); | ||||
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 91 | } |
92 | |||||
93 | /DISCARD/ : { *(.bss*) } | ||||
Albert ARIBAUD | 09d8118 | 2013-06-11 14:17:31 +0200 | [diff] [blame] | 94 | /DISCARD/ : { *(.dynsym) } |
Fabio Estevam | 4ac2e2d | 2011-06-05 06:26:49 +0000 | [diff] [blame] | 95 | /DISCARD/ : { *(.dynstr*) } |
96 | /DISCARD/ : { *(.dynsym*) } | ||||
97 | /DISCARD/ : { *(.dynamic*) } | ||||
98 | /DISCARD/ : { *(.hash*) } | ||||
99 | /DISCARD/ : { *(.plt*) } | ||||
100 | /DISCARD/ : { *(.interp*) } | ||||
101 | /DISCARD/ : { *(.gnu*) } | ||||
Guennadi Liakhovetski | b5dc9b3 | 2008-04-14 10:53:12 +0200 | [diff] [blame] | 102 | } |