Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 2 | /* |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 3 | * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 4 | */ |
| 5 | |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 6 | #include <dt-bindings/pwm/pwm.h> |
| 7 | #include "rk3399.dtsi" |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 8 | #include "rk3399-opp.dtsi" |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 9 | |
| 10 | / { |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 11 | leds { |
| 12 | compatible = "gpio-leds"; |
| 13 | pinctrl-names = "default"; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 14 | pinctrl-0 = <&led_pin_module>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 15 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 16 | module-led { |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 17 | label = "module_led"; |
Klaus Goger | 366812f | 2017-11-06 23:02:54 +0100 | [diff] [blame] | 18 | gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 19 | linux,default-trigger = "heartbeat"; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 20 | panic-indicator; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 21 | }; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 22 | }; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 23 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 24 | /* |
| 25 | * Overwrite the opp-table for CPUB as this board uses a different |
| 26 | * regulator (FAN53555) that only allows 10mV steps and therefore |
| 27 | * can't reach the operation point target voltages from rk3399-opp.dtsi |
| 28 | */ |
| 29 | /delete-node/ opp-table1; |
| 30 | cluster1_opp: opp-table1 { |
| 31 | compatible = "operating-points-v2"; |
| 32 | opp-shared; |
| 33 | |
| 34 | opp00 { |
| 35 | opp-hz = /bits/ 64 <408000000>; |
| 36 | opp-microvolt = <800000>; |
| 37 | clock-latency-ns = <40000>; |
| 38 | }; |
| 39 | opp01 { |
| 40 | opp-hz = /bits/ 64 <600000000>; |
| 41 | opp-microvolt = <800000>; |
| 42 | }; |
| 43 | opp02 { |
| 44 | opp-hz = /bits/ 64 <816000000>; |
| 45 | opp-microvolt = <830000>; |
| 46 | opp-suspend; |
| 47 | }; |
| 48 | opp03 { |
| 49 | opp-hz = /bits/ 64 <1008000000>; |
| 50 | opp-microvolt = <880000>; |
| 51 | }; |
| 52 | opp04 { |
| 53 | opp-hz = /bits/ 64 <1200000000>; |
| 54 | opp-microvolt = <950000>; |
| 55 | }; |
| 56 | opp05 { |
| 57 | opp-hz = /bits/ 64 <1416000000>; |
| 58 | opp-microvolt = <1030000>; |
| 59 | }; |
| 60 | opp06 { |
| 61 | opp-hz = /bits/ 64 <1608000000>; |
| 62 | opp-microvolt = <1100000>; |
| 63 | }; |
| 64 | opp07 { |
| 65 | opp-hz = /bits/ 64 <1800000000>; |
| 66 | opp-microvolt = <1200000>; |
| 67 | }; |
| 68 | opp08 { |
| 69 | opp-hz = /bits/ 64 <1992000000>; |
| 70 | opp-microvolt = <1230000>; |
| 71 | turbo-mode; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 72 | }; |
| 73 | }; |
| 74 | |
| 75 | clkin_gmac: external-gmac-clock { |
| 76 | compatible = "fixed-clock"; |
| 77 | clock-frequency = <125000000>; |
| 78 | clock-output-names = "clkin_gmac"; |
| 79 | #clock-cells = <0>; |
| 80 | }; |
| 81 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 82 | vcc1v2_phy: vcc1v2-phy { |
Philipp Tomsich | 46c89c8 | 2017-09-12 17:30:57 +0200 | [diff] [blame] | 83 | compatible = "regulator-fixed"; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 84 | regulator-name = "vcc1v2_phy"; |
Philipp Tomsich | 482cf22 | 2017-09-29 19:28:01 +0200 | [diff] [blame] | 85 | regulator-always-on; |
| 86 | regulator-boot-on; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 87 | regulator-min-microvolt = <1200000>; |
| 88 | regulator-max-microvolt = <1200000>; |
| 89 | vin-supply = <&vcc5v0_sys>; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 90 | }; |
| 91 | |
| 92 | vcc3v3_sys: vcc3v3-sys { |
| 93 | compatible = "regulator-fixed"; |
| 94 | regulator-name = "vcc3v3_sys"; |
| 95 | regulator-always-on; |
| 96 | regulator-boot-on; |
| 97 | regulator-min-microvolt = <3300000>; |
| 98 | regulator-max-microvolt = <3300000>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 99 | vin-supply = <&vcc5v0_sys>; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 100 | }; |
| 101 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 102 | vcc5v0_host: vcc5v0-host-regulator { |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 103 | compatible = "regulator-fixed"; |
Heiko Stuebner | e2dd607 | 2020-06-05 12:06:37 +0200 | [diff] [blame^] | 104 | gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 105 | enable-active-low; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 106 | pinctrl-names = "default"; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 107 | pinctrl-0 = <&vcc5v0_host_en>; |
| 108 | regulator-name = "vcc5v0_host"; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 109 | regulator-always-on; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 110 | vin-supply = <&vcc5v0_sys>; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 111 | }; |
| 112 | |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 113 | vcc5v0_sys: vcc5v0-sys { |
| 114 | compatible = "regulator-fixed"; |
| 115 | regulator-name = "vcc5v0_sys"; |
| 116 | regulator-always-on; |
| 117 | regulator-boot-on; |
| 118 | regulator-min-microvolt = <5000000>; |
| 119 | regulator-max-microvolt = <5000000>; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 120 | }; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 121 | }; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 122 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 123 | &cpu_b0 { |
| 124 | cpu-supply = <&vdd_cpu_b>; |
| 125 | }; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 126 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 127 | &cpu_b1 { |
| 128 | cpu-supply = <&vdd_cpu_b>; |
| 129 | }; |
| 130 | |
| 131 | &cpu_l0 { |
| 132 | cpu-supply = <&vdd_cpu_l>; |
| 133 | }; |
| 134 | |
| 135 | &cpu_l1 { |
| 136 | cpu-supply = <&vdd_cpu_l>; |
| 137 | }; |
| 138 | |
| 139 | &cpu_l2 { |
| 140 | cpu-supply = <&vdd_cpu_l>; |
| 141 | }; |
| 142 | |
| 143 | &cpu_l3 { |
| 144 | cpu-supply = <&vdd_cpu_l>; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 145 | }; |
| 146 | |
| 147 | &emmc_phy { |
| 148 | status = "okay"; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 149 | drive-impedance-ohm = <33>; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 150 | }; |
| 151 | |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 152 | &gmac { |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 153 | assigned-clocks = <&cru SCLK_RMII_SRC>; |
| 154 | assigned-clock-parents = <&clkin_gmac>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 155 | clock_in_out = "input"; |
| 156 | phy-supply = <&vcc1v2_phy>; |
| 157 | phy-mode = "rgmii"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 158 | pinctrl-names = "default"; |
| 159 | pinctrl-0 = <&rgmii_pins>; |
Heiko Stuebner | 41c985d | 2020-06-05 12:06:36 +0200 | [diff] [blame] | 160 | snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 161 | snps,reset-active-low; |
| 162 | snps,reset-delays-us = <0 10000 50000>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 163 | tx_delay = <0x10>; |
| 164 | rx_delay = <0x10>; |
| 165 | status = "okay"; |
| 166 | }; |
| 167 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 168 | &gpu { |
| 169 | mali-supply = <&vdd_gpu>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 170 | status = "okay"; |
| 171 | }; |
| 172 | |
| 173 | &i2c0 { |
| 174 | status = "okay"; |
| 175 | i2c-scl-rising-time-ns = <168>; |
| 176 | i2c-scl-falling-time-ns = <4>; |
| 177 | clock-frequency = <400000>; |
| 178 | |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 179 | rk808: pmic@1b { |
| 180 | compatible = "rockchip,rk808"; |
| 181 | reg = <0x1b>; |
| 182 | interrupt-parent = <&gpio1>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 183 | interrupts = <22 IRQ_TYPE_LEVEL_LOW>; |
| 184 | #clock-cells = <1>; |
| 185 | clock-output-names = "xin32k", "rk808-clkout2"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 186 | pinctrl-names = "default"; |
| 187 | pinctrl-0 = <&pmic_int_l>; |
| 188 | rockchip,system-power-controller; |
| 189 | wakeup-source; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 190 | |
| 191 | vcc1-supply = <&vcc5v0_sys>; |
| 192 | vcc2-supply = <&vcc5v0_sys>; |
| 193 | vcc3-supply = <&vcc5v0_sys>; |
| 194 | vcc4-supply = <&vcc5v0_sys>; |
| 195 | vcc6-supply = <&vcc5v0_sys>; |
| 196 | vcc7-supply = <&vcc5v0_sys>; |
| 197 | vcc8-supply = <&vcc3v3_sys>; |
| 198 | vcc9-supply = <&vcc5v0_sys>; |
| 199 | vcc10-supply = <&vcc5v0_sys>; |
| 200 | vcc11-supply = <&vcc5v0_sys>; |
| 201 | vcc12-supply = <&vcc3v3_sys>; |
| 202 | vddio-supply = <&vcc1v8_pmu>; |
| 203 | |
| 204 | regulators { |
| 205 | vdd_center: DCDC_REG1 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 206 | regulator-name = "vdd_center"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 207 | regulator-min-microvolt = <750000>; |
| 208 | regulator-max-microvolt = <1350000>; |
| 209 | regulator-ramp-delay = <6001>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 210 | regulator-always-on; |
| 211 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 212 | regulator-state-mem { |
| 213 | regulator-off-in-suspend; |
| 214 | }; |
| 215 | }; |
| 216 | |
| 217 | vdd_cpu_l: DCDC_REG2 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 218 | regulator-name = "vdd_cpu_l"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 219 | regulator-min-microvolt = <750000>; |
| 220 | regulator-max-microvolt = <1350000>; |
| 221 | regulator-ramp-delay = <6001>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 222 | regulator-always-on; |
| 223 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 224 | regulator-state-mem { |
| 225 | regulator-off-in-suspend; |
| 226 | }; |
| 227 | }; |
| 228 | |
| 229 | vcc_ddr: DCDC_REG3 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 230 | regulator-name = "vcc_ddr"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 231 | regulator-always-on; |
| 232 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 233 | regulator-state-mem { |
| 234 | regulator-on-in-suspend; |
| 235 | }; |
| 236 | }; |
| 237 | |
| 238 | vcc_1v8: DCDC_REG4 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 239 | regulator-name = "vcc_1v8"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 240 | regulator-min-microvolt = <1800000>; |
| 241 | regulator-max-microvolt = <1800000>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 242 | regulator-always-on; |
| 243 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 244 | regulator-state-mem { |
| 245 | regulator-on-in-suspend; |
| 246 | regulator-suspend-microvolt = <1800000>; |
| 247 | }; |
| 248 | }; |
| 249 | |
| 250 | vcc_ldo1: LDO_REG1 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 251 | regulator-name = "vcc_ldo1"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 252 | regulator-min-microvolt = <1800000>; |
| 253 | regulator-max-microvolt = <1800000>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 254 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 255 | regulator-state-mem { |
| 256 | regulator-off-in-suspend; |
| 257 | }; |
| 258 | }; |
| 259 | |
| 260 | vcc1v8_hdmi: LDO_REG2 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 261 | regulator-name = "vcc1v8_hdmi"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 262 | regulator-min-microvolt = <1800000>; |
| 263 | regulator-max-microvolt = <1800000>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 264 | regulator-always-on; |
| 265 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 266 | regulator-state-mem { |
| 267 | regulator-off-in-suspend; |
| 268 | }; |
| 269 | }; |
| 270 | |
| 271 | vcc1v8_pmu: LDO_REG3 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 272 | regulator-name = "vcc1v8_pmu"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 273 | regulator-min-microvolt = <1800000>; |
| 274 | regulator-max-microvolt = <1800000>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 275 | regulator-always-on; |
| 276 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 277 | regulator-state-mem { |
| 278 | regulator-on-in-suspend; |
| 279 | regulator-suspend-microvolt = <1800000>; |
| 280 | }; |
| 281 | }; |
| 282 | |
| 283 | vcc_sd: LDO_REG4 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 284 | regulator-name = "vcc_sd"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 285 | regulator-min-microvolt = <1800000>; |
Klaus Goger | 4f70039 | 2017-11-06 23:02:55 +0100 | [diff] [blame] | 286 | regulator-max-microvolt = <3000000>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 287 | regulator-always-on; |
| 288 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 289 | regulator-state-mem { |
| 290 | regulator-on-in-suspend; |
Klaus Goger | 4f70039 | 2017-11-06 23:02:55 +0100 | [diff] [blame] | 291 | regulator-suspend-microvolt = <3000000>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 292 | }; |
| 293 | }; |
| 294 | |
| 295 | vcc_ldo5: LDO_REG5 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 296 | regulator-name = "vcc_ldo5"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 297 | regulator-min-microvolt = <3000000>; |
| 298 | regulator-max-microvolt = <3000000>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 299 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 300 | regulator-state-mem { |
| 301 | regulator-off-in-suspend; |
| 302 | }; |
| 303 | }; |
| 304 | |
| 305 | vcc_ldo6: LDO_REG6 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 306 | regulator-name = "vcc_ldo6"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 307 | regulator-min-microvolt = <1500000>; |
| 308 | regulator-max-microvolt = <1500000>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 309 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 310 | regulator-state-mem { |
| 311 | regulator-off-in-suspend; |
| 312 | }; |
| 313 | }; |
| 314 | |
| 315 | vcc0v9_hdmi: LDO_REG7 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 316 | regulator-name = "vcc0v9_hdmi"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 317 | regulator-min-microvolt = <900000>; |
| 318 | regulator-max-microvolt = <900000>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 319 | regulator-always-on; |
| 320 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 321 | regulator-state-mem { |
| 322 | regulator-off-in-suspend; |
| 323 | }; |
| 324 | }; |
| 325 | |
| 326 | vcc_efuse: LDO_REG8 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 327 | regulator-name = "vcc_efuse"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 328 | regulator-min-microvolt = <1800000>; |
| 329 | regulator-max-microvolt = <1800000>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 330 | regulator-always-on; |
| 331 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 332 | regulator-state-mem { |
| 333 | regulator-off-in-suspend; |
| 334 | }; |
| 335 | }; |
| 336 | |
| 337 | vcc3v3_s3: SWITCH_REG1 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 338 | regulator-name = "vcc3v3_s3"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 339 | regulator-always-on; |
| 340 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 341 | regulator-state-mem { |
| 342 | regulator-off-in-suspend; |
| 343 | }; |
| 344 | }; |
| 345 | |
| 346 | vcc3v3_s0: SWITCH_REG2 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 347 | regulator-name = "vcc3v3_s0"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 348 | regulator-always-on; |
| 349 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 350 | regulator-state-mem { |
| 351 | regulator-off-in-suspend; |
| 352 | }; |
| 353 | }; |
| 354 | }; |
| 355 | }; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 356 | |
| 357 | vdd_gpu: regulator@60 { |
| 358 | compatible = "fcs,fan53555"; |
| 359 | reg = <0x60>; |
| 360 | fcs,suspend-voltage-selector = <1>; |
| 361 | regulator-name = "vdd_gpu"; |
| 362 | regulator-min-microvolt = <600000>; |
| 363 | regulator-max-microvolt = <1230000>; |
| 364 | regulator-ramp-delay = <1000>; |
| 365 | regulator-always-on; |
| 366 | regulator-boot-on; |
| 367 | vin-supply = <&vcc5v0_sys>; |
| 368 | }; |
| 369 | }; |
| 370 | |
| 371 | &i2c7 { |
| 372 | status = "okay"; |
| 373 | clock-frequency = <400000>; |
| 374 | |
| 375 | fan: fan@18 { |
| 376 | compatible = "ti,amc6821"; |
| 377 | reg = <0x18>; |
| 378 | #cooling-cells = <2>; |
| 379 | }; |
| 380 | |
| 381 | rtc_twi: rtc@6f { |
| 382 | compatible = "isil,isl1208"; |
| 383 | reg = <0x6f>; |
| 384 | }; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 385 | }; |
| 386 | |
| 387 | &i2c8 { |
| 388 | status = "okay"; |
| 389 | clock-frequency = <400000>; |
| 390 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 391 | vdd_cpu_b: regulator@60 { |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 392 | compatible = "fcs,fan53555"; |
| 393 | reg = <0x60>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 394 | vin-supply = <&vcc5v0_sys>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 395 | regulator-name = "vdd_cpu_b"; |
| 396 | regulator-min-microvolt = <600000>; |
| 397 | regulator-max-microvolt = <1230000>; |
| 398 | regulator-ramp-delay = <1000>; |
| 399 | fcs,suspend-voltage-selector = <1>; |
| 400 | regulator-always-on; |
| 401 | regulator-boot-on; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 402 | }; |
| 403 | }; |
| 404 | |
| 405 | &i2s0 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 406 | pinctrl-0 = <&i2s0_2ch_bus>; |
| 407 | rockchip,playback-channels = <2>; |
| 408 | rockchip,capture-channels = <2>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 409 | status = "okay"; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 410 | }; |
| 411 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 412 | /* |
| 413 | * As Q7 does not specify neither a global nor a RX clock for I2S these |
| 414 | * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO. |
| 415 | * Therefore we have to redefine the i2s0_2ch_bus definition to prevent |
| 416 | * conflicts. |
| 417 | */ |
| 418 | &i2s0_2ch_bus { |
| 419 | rockchip,pins = |
| 420 | <3 RK_PD0 1 &pcfg_pull_none>, |
| 421 | <3 RK_PD2 1 &pcfg_pull_none>, |
| 422 | <3 RK_PD3 1 &pcfg_pull_none>, |
| 423 | <3 RK_PD7 1 &pcfg_pull_none>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 424 | }; |
| 425 | |
| 426 | &io_domains { |
| 427 | status = "okay"; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 428 | bt656-supply = <&vcc_1v8>; |
| 429 | audio-supply = <&vcc_1v8>; |
| 430 | sdmmc-supply = <&vcc_sd>; |
| 431 | gpio1830-supply = <&vcc_1v8>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 432 | }; |
| 433 | |
| 434 | &pmu_io_domains { |
| 435 | status = "okay"; |
| 436 | pmu1830-supply = <&vcc_1v8>; |
| 437 | }; |
| 438 | |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 439 | &pwm2 { |
| 440 | status = "okay"; |
| 441 | }; |
| 442 | |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 443 | &pinctrl { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 444 | i2c8 { |
| 445 | i2c8_xfer_a: i2c8-xfer { |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 446 | rockchip,pins = |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 447 | <1 RK_PC4 1 &pcfg_pull_up>, |
| 448 | <1 RK_PC5 1 &pcfg_pull_up>; |
| 449 | }; |
| 450 | }; |
| 451 | |
| 452 | leds { |
| 453 | led_pin_module: led-module-gpio { |
| 454 | rockchip,pins = |
| 455 | <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 456 | }; |
| 457 | }; |
| 458 | |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 459 | pmic { |
| 460 | pmic_int_l: pmic-int-l { |
| 461 | rockchip,pins = |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 462 | <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 463 | }; |
| 464 | }; |
| 465 | |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 466 | usb2 { |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 467 | vcc5v0_host_en: vcc5v0-host-en { |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 468 | rockchip,pins = |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 469 | <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 470 | }; |
| 471 | }; |
| 472 | }; |
| 473 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 474 | &sdhci { |
| 475 | bus-width = <8>; |
| 476 | mmc-hs400-1_8v; |
| 477 | mmc-hs400-enhanced-strobe; |
| 478 | non-removable; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 479 | status = "okay"; |
| 480 | }; |
| 481 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 482 | &sdmmc { |
| 483 | vqmmc-supply = <&vcc_sd>; |
| 484 | }; |
Philipp Tomsich | f592edd | 2017-06-06 15:42:32 +0200 | [diff] [blame] | 485 | |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 486 | &spi1 { |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 487 | status = "okay"; |
| 488 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 489 | norflash: flash@0 { |
Neil Armstrong | ffd4c7c | 2019-02-10 10:16:20 +0000 | [diff] [blame] | 490 | compatible = "jedec,spi-nor"; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 491 | reg = <0>; |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 492 | spi-max-frequency = <50000000>; |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 493 | }; |
| 494 | }; |
| 495 | |
Jagan Teki | 167efc2 | 2020-04-28 15:30:17 +0530 | [diff] [blame] | 496 | &tcphy1 { |
| 497 | status = "okay"; |
| 498 | }; |
| 499 | |
| 500 | &tsadc { |
| 501 | rockchip,hw-tshut-mode = <1>; |
| 502 | rockchip,hw-tshut-polarity = <1>; |
| 503 | status = "okay"; |
| 504 | }; |
| 505 | |
| 506 | &u2phy1 { |
| 507 | status = "okay"; |
| 508 | |
| 509 | u2phy1_otg: otg-port { |
| 510 | status = "okay"; |
| 511 | }; |
| 512 | |
| 513 | u2phy1_host: host-port { |
| 514 | phy-supply = <&vcc5v0_host>; |
| 515 | status = "okay"; |
| 516 | }; |
| 517 | }; |
| 518 | |
| 519 | &usbdrd3_1 { |
| 520 | status = "okay"; |
| 521 | }; |
| 522 | |
| 523 | &usbdrd_dwc3_1 { |
| 524 | status = "okay"; |
| 525 | dr_mode = "host"; |
| 526 | }; |
| 527 | |
| 528 | &usb_host1_ehci { |
| 529 | status = "okay"; |
| 530 | }; |
| 531 | |
| 532 | &usb_host1_ohci { |
Philipp Tomsich | 3c2bbd5 | 2017-03-28 18:48:51 +0200 | [diff] [blame] | 533 | status = "okay"; |
| 534 | }; |