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TsiChungLiewc8758102008-01-14 17:46:19 -06001/*
2 *
3 * (C) Copyright 2000-2004
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wang849fc422012-03-26 21:49:03 +00006 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiewc8758102008-01-14 17:46:19 -06007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
TsiChungLiewc8758102008-01-14 17:46:19 -060010 */
11
12/* CPU specific interrupt routine */
13#include <common.h>
14#include <asm/immap.h>
Alison Wang849fc422012-03-26 21:49:03 +000015#include <asm/io.h>
TsiChungLiewc8758102008-01-14 17:46:19 -060016
17int interrupt_init(void)
18{
Alison Wang849fc422012-03-26 21:49:03 +000019 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
TsiChungLiewc8758102008-01-14 17:46:19 -060020
21 /* Make sure all interrupts are disabled */
Alison Wang849fc422012-03-26 21:49:03 +000022 setbits_be32(&intp->imrh0, 0xffffffff);
23 setbits_be32(&intp->imrl0, 0xffffffff);
TsiChungLiewc8758102008-01-14 17:46:19 -060024
25 enable_interrupts();
26 return 0;
27}
28
29#if defined(CONFIG_MCFTMR)
30void dtimer_intr_setup(void)
31{
Alison Wang849fc422012-03-26 21:49:03 +000032 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
TsiChungLiewc8758102008-01-14 17:46:19 -060033
Alison Wang849fc422012-03-26 21:49:03 +000034 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
35 clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK);
TsiChungLiewc8758102008-01-14 17:46:19 -060036}
37#endif