blob: 13e642ab70347419be385f0b7b74741f399549a8 [file] [log] [blame]
Fabien Dessenne01964d82019-05-14 11:20:34 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
4 */
5
6#include <common.h>
7#include <clk.h>
8#include <dm.h>
9#include <mailbox-uclass.h>
Simon Glass336d4612020-02-03 07:36:16 -070010#include <malloc.h>
Fabien Dessenne01964d82019-05-14 11:20:34 +020011#include <asm/io.h>
Simon Glass336d4612020-02-03 07:36:16 -070012#include <dm/device_compat.h>
Fabien Dessenne01964d82019-05-14 11:20:34 +020013
14/*
15 * IPCC has one set of registers per CPU
16 * IPCC_PROC_OFFST allows to define cpu registers set base address
17 * according to the assigned proc_id.
18 */
19
20#define IPCC_PROC_OFFST 0x010
21
22#define IPCC_XSCR 0x008
23#define IPCC_XTOYSR 0x00c
24
25#define IPCC_HWCFGR 0x3f0
26#define IPCFGR_CHAN_MASK GENMASK(7, 0)
27
28#define RX_BIT_CHAN(chan) BIT(chan)
29#define TX_BIT_SHIFT 16
30#define TX_BIT_CHAN(chan) BIT(TX_BIT_SHIFT + (chan))
31
32#define STM32_MAX_PROCS 2
33
34struct stm32_ipcc {
35 void __iomem *reg_base;
36 void __iomem *reg_proc;
37 u32 proc_id;
38 u32 n_chans;
39};
40
41static int stm32_ipcc_request(struct mbox_chan *chan)
42{
43 struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
44
45 debug("%s(chan=%p)\n", __func__, chan);
46
47 if (chan->id >= ipcc->n_chans) {
48 debug("%s failed to request channel: %ld\n",
49 __func__, chan->id);
50 return -EINVAL;
51 }
52
53 return 0;
54}
55
56static int stm32_ipcc_free(struct mbox_chan *chan)
57{
58 debug("%s(chan=%p)\n", __func__, chan);
59
60 return 0;
61}
62
63static int stm32_ipcc_send(struct mbox_chan *chan, const void *data)
64{
65 struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
66
67 debug("%s(chan=%p, data=%p)\n", __func__, chan, data);
68
69 if (readl(ipcc->reg_proc + IPCC_XTOYSR) & BIT(chan->id))
70 return -EBUSY;
71
72 /* set channel n occupied */
73 setbits_le32(ipcc->reg_proc + IPCC_XSCR, TX_BIT_CHAN(chan->id));
74
75 return 0;
76}
77
78static int stm32_ipcc_recv(struct mbox_chan *chan, void *data)
79{
80 struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
81 u32 val;
82 int proc_offset;
83
84 debug("%s(chan=%p, data=%p)\n", __func__, chan, data);
85
86 /* read 'channel occupied' status from other proc */
87 proc_offset = ipcc->proc_id ? -IPCC_PROC_OFFST : IPCC_PROC_OFFST;
88 val = readl(ipcc->reg_proc + proc_offset + IPCC_XTOYSR);
89
90 if (!(val & BIT(chan->id)))
91 return -ENODATA;
92
93 setbits_le32(ipcc->reg_proc + IPCC_XSCR, RX_BIT_CHAN(chan->id));
94
95 return 0;
96}
97
98static int stm32_ipcc_probe(struct udevice *dev)
99{
100 struct stm32_ipcc *ipcc = dev_get_priv(dev);
101 fdt_addr_t addr;
102 const fdt32_t *cell;
103 struct clk clk;
104 int len, ret;
105
106 debug("%s(dev=%p)\n", __func__, dev);
107
108 addr = dev_read_addr(dev);
109 if (addr == FDT_ADDR_T_NONE)
110 return -EINVAL;
111
112 ipcc->reg_base = (void __iomem *)addr;
113
114 /* proc_id */
115 cell = dev_read_prop(dev, "st,proc_id", &len);
116 if (len < sizeof(fdt32_t)) {
117 dev_dbg(dev, "Missing st,proc_id\n");
118 return -EINVAL;
119 }
120
121 ipcc->proc_id = fdtdec_get_number(cell, 1);
122
123 if (ipcc->proc_id >= STM32_MAX_PROCS) {
124 dev_err(dev, "Invalid proc_id (%d)\n", ipcc->proc_id);
125 return -EINVAL;
126 }
127
128 ipcc->reg_proc = ipcc->reg_base + ipcc->proc_id * IPCC_PROC_OFFST;
129
130 ret = clk_get_by_index(dev, 0, &clk);
131 if (ret)
132 return ret;
133
134 ret = clk_enable(&clk);
135 if (ret)
136 goto clk_free;
137
138 /* get channel number */
139 ipcc->n_chans = readl(ipcc->reg_base + IPCC_HWCFGR);
140 ipcc->n_chans &= IPCFGR_CHAN_MASK;
141
142 return 0;
143
144clk_free:
145 clk_free(&clk);
146
147 return ret;
148}
149
150static const struct udevice_id stm32_ipcc_ids[] = {
151 { .compatible = "st,stm32mp1-ipcc" },
152 { }
153};
154
155struct mbox_ops stm32_ipcc_mbox_ops = {
156 .request = stm32_ipcc_request,
Simon Glasscc92c3c2020-02-03 07:35:50 -0700157 .rfree = stm32_ipcc_free,
Fabien Dessenne01964d82019-05-14 11:20:34 +0200158 .send = stm32_ipcc_send,
159 .recv = stm32_ipcc_recv,
160};
161
162U_BOOT_DRIVER(stm32_ipcc) = {
163 .name = "stm32_ipcc",
164 .id = UCLASS_MAILBOX,
165 .of_match = stm32_ipcc_ids,
166 .probe = stm32_ipcc_probe,
167 .priv_auto_alloc_size = sizeof(struct stm32_ipcc),
168 .ops = &stm32_ipcc_mbox_ops,
169};