blob: bd352e754150456c3a5ab6acc352256abc8d34d9 [file] [log] [blame]
Max Filippovb25732c2016-08-07 08:53:00 +03001#
2# (C) Copyright 2016 Cadence Design Systems Inc.
3#
4# SPDX-License-Identifier: GPL-2.0+
5#
6
7obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
Masahiro Yamada573a3812017-04-14 11:10:24 +09008obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
Álvaro Fernández Rojase3889692017-04-25 00:39:14 +02009obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
Max Filippovb25732c2016-08-07 08:53:00 +030010
11ifndef CONFIG_SPL_BUILD
12obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
13endif
Heiko Stübner37c07c52017-02-18 19:46:32 +010014obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
Max Filippovb25732c2016-08-07 08:53:00 +030015obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
Kever Yang52f6c172017-02-23 15:37:54 +080016obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o
Max Filippovb25732c2016-08-07 08:53:00 +030017obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
18obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
19obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
Patrice Chotard413788c2017-02-21 13:37:06 +010020obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
Chris Zankel7e270ec2016-08-10 18:36:48 +030021obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
maxims@google.com4697abe2017-01-18 13:44:55 -080022obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o