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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenkbf9e3b32004-02-12 00:47:09 +00002/*
3 * mcf5272.h -- Definitions for Motorola Coldfire 5272
4 *
5 * Based on mcf5272sim.h of uCLinux distribution:
6 * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com)
7 * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
wdenkbf9e3b32004-02-12 00:47:09 +00008 */
9
wdenkbf9e3b32004-02-12 00:47:09 +000010#ifndef mcf5272_h
11#define mcf5272_h
12/****************************************************************************/
13
14/*
15 * Size of internal RAM
16 */
17
18#define INT_RAM_SIZE 4096
19
TsiChungLiew56115662007-08-15 19:38:15 -050020#define GPIO_PACNT_PA15MSK (0xC0000000)
21#define GPIO_PACNT_DGNT1 (0x40000000)
22#define GPIO_PACNT_PA14MSK (0x30000000)
23#define GPIO_PACNT_DREQ1 (0x10000000)
24#define GPIO_PACNT_PA13MSK (0x0C000000)
25#define GPIO_PACNT_DFSC3 (0x04000000)
26#define GPIO_PACNT_PA12MSK (0x03000000)
27#define GPIO_PACNT_DFSC2 (0x01000000)
28#define GPIO_PACNT_PA11MSK (0x00C00000)
29#define GPIO_PACNT_QSPI_CS1 (0x00800000)
30#define GPIO_PACNT_PA10MSK (0x00300000)
31#define GPIO_PACNT_DREQ0 (0x00100000)
32#define GPIO_PACNT_PA9MSK (0x000C0000)
33#define GPIO_PACNT_DGNT0 (0x00040000)
34#define GPIO_PACNT_PA8MSK (0x00030000)
35#define GPIO_PACNT_FSC0 (0x00010000)
36#define GPIO_PACNT_FSR0 (0x00010000)
37#define GPIO_PACNT_PA7MSK (0x0000C000)
38#define GPIO_PACNT_DOUT3 (0x00008000)
39#define GPIO_PACNT_QSPI_CS3 (0x00004000)
40#define GPIO_PACNT_PA6MSK (0x00003000)
41#define GPIO_PACNT_USB_RXD (0x00001000)
42#define GPIO_PACNT_PA5MSK (0x00000C00)
43#define GPIO_PACNT_USB_TXEN (0x00000400)
44#define GPIO_PACNT_PA4MSK (0x00000300)
45#define GPIO_PACNT_USB_SUSP (0x00000100)
46#define GPIO_PACNT_PA3MSK (0x000000C0)
47#define GPIO_PACNT_USB_TN (0x00000040)
48#define GPIO_PACNT_PA2MSK (0x00000030)
49#define GPIO_PACNT_USB_RN (0x00000010)
50#define GPIO_PACNT_PA1MSK (0x0000000C)
51#define GPIO_PACNT_USB_RP (0x00000004)
52#define GPIO_PACNT_PA0MSK (0x00000003)
53#define GPIO_PACNT_USB_TP (0x00000001)
wdenkbf9e3b32004-02-12 00:47:09 +000054
TsiChungLiew56115662007-08-15 19:38:15 -050055#define GPIO_PBCNT_PB15MSK (0xC0000000)
56#define GPIO_PBCNT_E_MDC (0x40000000)
57#define GPIO_PBCNT_PB14MSK (0x30000000)
58#define GPIO_PBCNT_E_RXER (0x10000000)
59#define GPIO_PBCNT_PB13MSK (0x0C000000)
60#define GPIO_PBCNT_E_RXD1 (0x04000000)
61#define GPIO_PBCNT_PB12MSK (0x03000000)
62#define GPIO_PBCNT_E_RXD2 (0x01000000)
63#define GPIO_PBCNT_PB11MSK (0x00C00000)
64#define GPIO_PBCNT_E_RXD3 (0x00400000)
65#define GPIO_PBCNT_PB10MSK (0x00300000)
66#define GPIO_PBCNT_E_TXD1 (0x00100000)
67#define GPIO_PBCNT_PB9MSK (0x000C0000)
68#define GPIO_PBCNT_E_TXD2 (0x00040000)
69#define GPIO_PBCNT_PB8MSK (0x00030000)
70#define GPIO_PBCNT_E_TXD3 (0x00010000)
71#define GPIO_PBCNT_PB7MSK (0x0000C000)
72#define GPIO_PBCNT_TOUT0 (0x00004000)
73#define GPIO_PBCNT_PB6MSK (0x00003000)
74#define GPIO_PBCNT_TA (0x00001000)
75#define GPIO_PBCNT_PB4MSK (0x00000300)
76#define GPIO_PBCNT_URT0_CLK (0x00000100)
77#define GPIO_PBCNT_PB3MSK (0x000000C0)
78#define GPIO_PBCNT_URT0_RTS (0x00000040)
79#define GPIO_PBCNT_PB2MSK (0x00000030)
80#define GPIO_PBCNT_URT0_CTS (0x00000010)
81#define GPIO_PBCNT_PB1MSK (0x0000000C)
82#define GPIO_PBCNT_URT0_RXD (0x00000004)
83#define GPIO_PBCNT_URT0_TIN2 (0x00000004)
84#define GPIO_PBCNT_PB0MSK (0x00000003)
85#define GPIO_PBCNT_URT0_TXD (0x00000001)
wdenkbf9e3b32004-02-12 00:47:09 +000086
TsiChungLiew56115662007-08-15 19:38:15 -050087#define GPIO_PDCNT_PD7MSK (0x0000C000)
88#define GPIO_PDCNT_TIN1 (0x00008000)
89#define GPIO_PDCNT_PWM_OUT2 (0x00004000)
90#define GPIO_PDCNT_PD6MSK (0x00003000)
91#define GPIO_PDCNT_TOUT1 (0x00002000)
92#define GPIO_PDCNT_PWM_OUT1 (0x00001000)
93#define GPIO_PDCNT_PD5MSK (0x00000C00)
94#define GPIO_PDCNT_INT4 (0x00000C00)
95#define GPIO_PDCNT_DIN3 (0x00000800)
96#define GPIO_PDCNT_PD4MSK (0x00000300)
97#define GPIO_PDCNT_URT1_TXD (0x00000200)
98#define GPIO_PDCNT_DOUT0 (0x00000100)
99#define GPIO_PDCNT_PD3MSK (0x000000C0)
100#define GPIO_PDCNT_INT5 (0x000000C0)
101#define GPIO_PDCNT_URT1_RTS (0x00000080)
102#define GPIO_PDCNT_PD2MSK (0x00000030)
103#define GPIO_PDCNT_QSPI_CS2 (0x00000030)
104#define GPIO_PDCNT_URT1_CTS (0x00000020)
105#define GPIO_PDCNT_PD1MSK (0x0000000C)
106#define GPIO_PDCNT_URT1_RXD (0x00000008)
107#define GPIO_PDCNT_URT1_TIN3 (0x00000008)
108#define GPIO_PDCNT_DIN0 (0x00000004)
109#define GPIO_PDCNT_PD0MSK (0x00000003)
110#define GPIO_PDCNT_URT1_CLK (0x00000002)
111#define GPIO_PDCNT_DCL0 (0x00000001)
wdenkbf9e3b32004-02-12 00:47:09 +0000112
TsiChungLiew56115662007-08-15 19:38:15 -0500113#define INT_RSVD0 (0)
114#define INT_INT1 (1)
115#define INT_INT2 (2)
116#define INT_INT3 (3)
117#define INT_INT4 (4)
118#define INT_TMR0 (5)
119#define INT_TMR1 (6)
120#define INT_TMR2 (7)
121#define INT_TMR3 (8)
122#define INT_UART1 (9)
123#define INT_UART2 (10)
124#define INT_PLIP (11)
125#define INT_PLIA (12)
126#define INT_USB0 (13)
127#define INT_USB1 (14)
128#define INT_USB2 (15)
129#define INT_USB3 (16)
130#define INT_USB4 (17)
131#define INT_USB5 (18)
132#define INT_USB6 (19)
133#define INT_USB7 (20)
134#define INT_DMA (21)
135#define INT_ERX (22)
136#define INT_ETX (23)
137#define INT_ENTC (24)
138#define INT_QSPI (25)
139#define INT_INT5 (26)
140#define INT_INT6 (27)
141#define INT_SWTO (28)
wdenkbf9e3b32004-02-12 00:47:09 +0000142
TsiChungLiew56115662007-08-15 19:38:15 -0500143#define INT_ICR1_TMR0MASK (0x000F000)
144#define INT_ICR1_TMR0PI (0x0008000)
145#define INT_ICR1_TMR0IPL(x) (((x)&0x7)<<12)
146#define INT_ICR1_TMR1MASK (0x0000F00)
147#define INT_ICR1_TMR1PI (0x0000800)
148#define INT_ICR1_TMR1IPL(x) (((x)&0x7)<<8)
149#define INT_ICR1_TMR2MASK (0x00000F0)
150#define INT_ICR1_TMR2PI (0x0000080)
151#define INT_ICR1_TMR2IPL(x) (((x)&0x7)<<4)
152#define INT_ICR1_TMR3MASK (0x000000F)
153#define INT_ICR1_TMR3PI (0x0000008)
154#define INT_ICR1_TMR3IPL(x) (((x)&0x7))
wdenkbf9e3b32004-02-12 00:47:09 +0000155
TsiChungLiew56115662007-08-15 19:38:15 -0500156#define INT_ISR_INT31 (0x80000000)
157#define INT_ISR_INT30 (0x40000000)
158#define INT_ISR_INT29 (0x20000000)
159#define INT_ISR_INT28 (0x10000000)
160#define INT_ISR_INT27 (0x08000000)
161#define INT_ISR_INT26 (0x04000000)
162#define INT_ISR_INT25 (0x02000000)
163#define INT_ISR_INT24 (0x01000000)
164#define INT_ISR_INT23 (0x00800000)
165#define INT_ISR_INT22 (0x00400000)
166#define INT_ISR_INT21 (0x00200000)
167#define INT_ISR_INT20 (0x00100000)
168#define INT_ISR_INT19 (0x00080000)
169#define INT_ISR_INT18 (0x00040000)
170#define INT_ISR_INT17 (0x00020000)
171#define INT_ISR_INT16 (0x00010000)
172#define INT_ISR_INT15 (0x00008000)
173#define INT_ISR_INT14 (0x00004000)
174#define INT_ISR_INT13 (0x00002000)
175#define INT_ISR_INT12 (0x00001000)
176#define INT_ISR_INT11 (0x00000800)
177#define INT_ISR_INT10 (0x00000400)
178#define INT_ISR_INT9 (0x00000200)
179#define INT_ISR_INT8 (0x00000100)
180#define INT_ISR_INT7 (0x00000080)
181#define INT_ISR_INT6 (0x00000040)
182#define INT_ISR_INT5 (0x00000020)
183#define INT_ISR_INT4 (0x00000010)
184#define INT_ISR_INT3 (0x00000008)
185#define INT_ISR_INT2 (0x00000004)
186#define INT_ISR_INT1 (0x00000002)
187#define INT_ISR_INT0 (0x00000001)
wdenkbf9e3b32004-02-12 00:47:09 +0000188
TsiChungLiew56115662007-08-15 19:38:15 -0500189#endif /* mcf5272_h */