blob: a04ac4982ff5b9fe3b3cdecc12d323d6e1cd7cad [file] [log] [blame]
Marek Vasutd5914012011-01-19 04:40:37 +00001/*
2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
3 *
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
5 *
6 * Configuration settings for the MX51EVK Board
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27#include <config_cmd_default.h>
28
29/*
30 * High Level Board Configuration Options
31 */
32/* An i.MX51 CPU */
33#define CONFIG_MX51
34#include <asm/arch/imx-regs.h>
35
36#define CONFIG_SYS_MX5_HCLK 24000000
37#define CONFIG_SYS_MX5_CLK32 32768
38#define CONFIG_DISPLAY_CPUINFO
39#define CONFIG_DISPLAY_BOARDINFO
40
Aneesh Ve47f2db2011-06-16 23:30:48 +000041#define CONFIG_SYS_L2CACHE_OFF
Marek Vasutd5914012011-01-19 04:40:37 +000042
43/*
44 * Bootloader Components Configuration
45 */
46#define CONFIG_CMD_SPI
47#define CONFIG_CMD_SF
48#define CONFIG_CMD_MMC
49#define CONFIG_CMD_FAT
50#define CONFIG_CMD_IDE
51#undef CONFIG_CMD_IMLS
52
53/*
54 * Environmental settings
55 */
56
57#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
58#define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
59#define CONFIG_ENV_SIZE (4 * 1024)
60
61/*
62 * ATAG setup
63 */
64#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
65#define CONFIG_REVISION_TAG
66#define CONFIG_SETUP_MEMORY_TAGS
67#define CONFIG_INITRD_TAG
68
Grant Likely2fa8ca92011-03-28 09:59:07 +000069#define CONFIG_OF_LIBFDT 1
70
Marek Vasutd5914012011-01-19 04:40:37 +000071/*
72 * Size of malloc() pool
73 */
74#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
75
76#define CONFIG_BOARD_EARLY_INIT_F
77#define BOARD_LATE_INIT
78
79/*
80 * Hardware drivers
81 */
82#define CONFIG_MXC_UART
83#define CONFIG_SYS_MX51_UART1
84#define CONFIG_CONS_INDEX 1
85#define CONFIG_BAUDRATE 115200
86#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
87
88#define CONFIG_MXC_GPIO
89
90/*
91 * SPI Interface
92 */
93#ifdef CONFIG_CMD_SPI
94
95#define CONFIG_HARD_SPI
96#define CONFIG_MXC_SPI
97#define CONFIG_DEFAULT_SPI_BUS 1
98#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
99
100/* SPI FLASH */
101#ifdef CONFIG_CMD_SF
102
103#define CONFIG_SPI_FLASH
104#define CONFIG_SPI_FLASH_SST
105#define CONFIG_SPI_FLASH_CS (1 | 121 << 8)
106#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
107#define CONFIG_SF_DEFAULT_SPEED 25000000
108
109#define CONFIG_ENV_SPI_CS (1 | 121 << 8)
110#define CONFIG_ENV_SPI_BUS 0
111#define CONFIG_ENV_SPI_MAX_HZ 25000000
112#define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
113#define CONFIG_FSL_ENV_IN_SF
114#define CONFIG_ENV_IS_IN_SPI_FLASH
115#define CONFIG_SYS_NO_FLASH
116
117#else
118#define CONFIG_ENV_IS_NOWHERE
119#endif
120
121/* SPI PMIC */
122#define CONFIG_FSL_PMIC
123#define CONFIG_FSL_PMIC_BUS 0
124#define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
125#define CONFIG_FSL_PMIC_CLK 25000000
126#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
127#define CONFIG_RTC_MC13783
128#endif
129
130/*
131 * MMC Configs
132 */
133#ifdef CONFIG_CMD_MMC
134#define CONFIG_MMC
135#define CONFIG_GENERIC_MMC
136#define CONFIG_FSL_ESDHC
137#define CONFIG_SYS_FSL_ESDHC_ADDR 0
138#define CONFIG_SYS_FSL_ESDHC_NUM 2
139#endif
140
141/*
142 * ATA/IDE
143 */
144#ifdef CONFIG_CMD_IDE
145#define CONFIG_LBA48
146#undef CONFIG_IDE_LED
147#undef CONFIG_IDE_RESET
148
149#define CONFIG_MX51_PATA
150
151#define __io
152
153#define CONFIG_SYS_IDE_MAXBUS 1
154#define CONFIG_SYS_IDE_MAXDEVICE 1
155
156#define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
157#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
158
159#define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
160#define CONFIG_SYS_ATA_REG_OFFSET 0xa0
161#define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
162
163#define CONFIG_SYS_ATA_STRIDE 4
164
165#define CONFIG_IDE_PREINIT
166#define CONFIG_MXC_ATA_PIO_MODE 4
167#endif
168
169/*
170 * Filesystems
171 */
172#ifdef CONFIG_CMD_FAT
173#define CONFIG_DOS_PARTITION
174#endif
175
176#undef CONFIG_CMD_PING
177#undef CONFIG_CMD_DHCP
178#undef CONFIG_CMD_NET
179#undef CONFIG_CMD_NFS
180#define CONFIG_CMD_DATE
181
182/*
183 * Miscellaneous configurable options
184 */
185#define CONFIG_ENV_OVERWRITE
186#define CONFIG_BOOTDELAY 3
187#define CONFIG_LOADADDR 0x90800000
188
189#define CONFIG_SYS_LONGHELP /* undef to save memory */
190#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
191#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
192#define CONFIG_SYS_PROMPT "Efika> "
193#define CONFIG_AUTO_COMPLETE
194#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
195/* Print Buffer Size */
196#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
197#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
198#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
199
200#define CONFIG_SYS_MEMTEST_START 0x90000000
201#define CONFIG_SYS_MEMTEST_END 0x10000
202
203#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
204
205#define CONFIG_SYS_HZ 1000
206#define CONFIG_CMDLINE_EDITING
207
208/*-----------------------------------------------------------------------
209 * Stack sizes
210 *
211 * The stack sizes are set up in start.S using the settings below
212 */
213#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
214
215/*-----------------------------------------------------------------------
216 * Physical Memory Map
217 */
218#define CONFIG_NR_DRAM_BANKS 1
219#define PHYS_SDRAM_1 CSD0_BASE_ADDR
220#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
221
222#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
223#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
224#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
225
226#define CONFIG_SYS_INIT_SP_OFFSET \
227 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
228#define CONFIG_SYS_INIT_SP_ADDR \
229 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
230
231#define CONFIG_SYS_DDR_CLKSEL 0
232#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
233
234#endif