| Enric Balletbò i Serra | 9d1b298 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_TARGET_AM335X_SL50=y |
| Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame^] | 3 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
| Enric Balletbò i Serra | 9d1b298 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 4 | CONFIG_SPL=y |
| 5 | CONFIG_SPL_STACK_R=y |
| Enric Balletbò i Serra | 9d1b298 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 6 | CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" |
| Enric Balletbò i Serra | 9d1b298 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 7 | # CONFIG_CMD_IMLS is not set |
| 8 | # CONFIG_CMD_FLASH is not set |
| Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame^] | 9 | CONFIG_CMD_GPIO=y |
| Enric Balletbò i Serra | 9d1b298 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 10 | # CONFIG_CMD_SETEXPR is not set |