Masahiro Yamada | 252ed87 | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
Masahiro Yamada | 7865f4b | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 2 | CONFIG_ARCH_SOCFPGA=y |
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 4 | CONFIG_SPL_DM=y |
5 | CONFIG_DM_GPIO=y | ||||
Marek Vasut | cd9b731 | 2015-08-02 21:57:57 +0200 | [diff] [blame] | 6 | CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y |
Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame^] | 7 | CONFIG_SPL_STACK_R_ADDR=0x00800000 |
Joe Hershberger | bd328eb | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 8 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" |
9 | CONFIG_SPL=y | ||||
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 10 | CONFIG_SPL_STACK_R=y |
Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 11 | # CONFIG_CMD_IMLS is not set |
12 | # CONFIG_CMD_FLASH is not set | ||||
Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame^] | 13 | CONFIG_CMD_GPIO=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 14 | CONFIG_DWAPB_GPIO=y |
Joe Hershberger | c9bb942 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 15 | CONFIG_SPI_FLASH=y |
Marek Vasut | e14d3f7 | 2015-07-25 18:47:02 +0200 | [diff] [blame] | 16 | CONFIG_DM_ETH=y |
Joe Hershberger | bd328eb | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 17 | CONFIG_ETH_DESIGNWARE=y |