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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkaffae2b2002-08-17 09:36:01 +00002/*
3 * (C) Copyright 2002 SIXNET, dge@sixnetio.com.
4 *
wdenkec4c5442004-02-09 23:12:24 +00005 * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
6 * Stephan Linz <linz@li-pro.net>
wdenkaffae2b2002-08-17 09:36:01 +00007 */
8
9/*
wdenkec4c5442004-02-09 23:12:24 +000010 * Date & Time support for DS1306 RTC using SPI:
11 *
12 * - SXNI855T: it uses its own soft SPI here in this file
13 * - all other: use the external spi_xfer() function
14 * (see include/spi.h)
wdenkaffae2b2002-08-17 09:36:01 +000015 */
16
17#include <common.h>
18#include <command.h>
19#include <rtc.h>
wdenkec4c5442004-02-09 23:12:24 +000020#include <spi.h>
wdenkaffae2b2002-08-17 09:36:01 +000021
wdenkec4c5442004-02-09 23:12:24 +000022#define RTC_SECONDS 0x00
23#define RTC_MINUTES 0x01
24#define RTC_HOURS 0x02
25#define RTC_DAY_OF_WEEK 0x03
26#define RTC_DATE_OF_MONTH 0x04
27#define RTC_MONTH 0x05
28#define RTC_YEAR 0x06
29
30#define RTC_SECONDS_ALARM0 0x07
31#define RTC_MINUTES_ALARM0 0x08
32#define RTC_HOURS_ALARM0 0x09
33#define RTC_DAY_OF_WEEK_ALARM0 0x0a
34
35#define RTC_SECONDS_ALARM1 0x0b
36#define RTC_MINUTES_ALARM1 0x0c
37#define RTC_HOURS_ALARM1 0x0d
38#define RTC_DAY_OF_WEEK_ALARM1 0x0e
39
40#define RTC_CONTROL 0x0f
41#define RTC_STATUS 0x10
42#define RTC_TRICKLE_CHARGER 0x11
43
44#define RTC_USER_RAM_BASE 0x20
45
wdenkec4c5442004-02-09 23:12:24 +000046/* ************************************************************************* */
47#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
48
49static void soft_spi_send (unsigned char n);
50static unsigned char soft_spi_read (void);
51static void init_spi (void);
wdenkaffae2b2002-08-17 09:36:01 +000052
53/*-----------------------------------------------------------------------
54 * Definitions
55 */
56
57#define PB_SPISCK 0x00000002 /* PB 30 */
58#define PB_SPIMOSI 0x00000004 /* PB 29 */
59#define PB_SPIMISO 0x00000008 /* PB 28 */
60#define PB_SPI_CE 0x00010000 /* PB 15 */
61
62/* ------------------------------------------------------------------------- */
63
64/* read clock time from DS1306 and return it in *tmp */
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +030065int rtc_get (struct rtc_time *tmp)
wdenkaffae2b2002-08-17 09:36:01 +000066{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
wdenkec4c5442004-02-09 23:12:24 +000068 unsigned char spi_byte; /* Data Byte */
wdenkaffae2b2002-08-17 09:36:01 +000069
wdenkec4c5442004-02-09 23:12:24 +000070 init_spi (); /* set port B for software SPI */
wdenkaffae2b2002-08-17 09:36:01 +000071
wdenkec4c5442004-02-09 23:12:24 +000072 /* Now we can enable the DS1306 RTC */
73 immap->im_cpm.cp_pbdat |= PB_SPI_CE;
74 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +000075
wdenkec4c5442004-02-09 23:12:24 +000076 /* Shift out the address (0) of the time in the Clock Chip */
77 soft_spi_send (0);
wdenkaffae2b2002-08-17 09:36:01 +000078
wdenkec4c5442004-02-09 23:12:24 +000079 /* Put the clock readings into the rtc_time structure */
80 tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */
81 tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */
wdenkaffae2b2002-08-17 09:36:01 +000082
wdenkec4c5442004-02-09 23:12:24 +000083 /* Hours are trickier */
84 spi_byte = soft_spi_read (); /* Read Hours into temporary value */
85 if (spi_byte & 0x40) {
86 /* 12 hour mode bit is set (time is in 1-12 format) */
87 if (spi_byte & 0x20) {
88 /* since PM we add 11 to get 0-23 for hours */
89 tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
90 } else {
91 /* since AM we subtract 1 to get 0-23 for hours */
92 tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
93 }
94 } else {
95 /* Otherwise, 0-23 hour format */
96 tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
wdenkaffae2b2002-08-17 09:36:01 +000097 }
wdenkaffae2b2002-08-17 09:36:01 +000098
wdenkec4c5442004-02-09 23:12:24 +000099 soft_spi_read (); /* Read and discard Day of week */
100 tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */
101 tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */
wdenkaffae2b2002-08-17 09:36:01 +0000102
wdenkec4c5442004-02-09 23:12:24 +0000103 /* Read Year and convert to this century */
104 tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;
wdenkaffae2b2002-08-17 09:36:01 +0000105
wdenkec4c5442004-02-09 23:12:24 +0000106 /* Now we can disable the DS1306 RTC */
107 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
108 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000109
Simon Glass199e87c2015-04-20 12:37:17 -0600110 rtc_calc_weekday(tmp); /* Determine the day of week */
wdenkaffae2b2002-08-17 09:36:01 +0000111
wdenkec4c5442004-02-09 23:12:24 +0000112 debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
113 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
114 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300115
116 return 0;
wdenkaffae2b2002-08-17 09:36:01 +0000117}
118
119/* ------------------------------------------------------------------------- */
120
121/* set clock time in DS1306 RTC and in MPC8xx RTC */
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200122int rtc_set (struct rtc_time *tmp)
wdenkaffae2b2002-08-17 09:36:01 +0000123{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
wdenkaffae2b2002-08-17 09:36:01 +0000125
wdenkec4c5442004-02-09 23:12:24 +0000126 init_spi (); /* set port B for software SPI */
wdenkaffae2b2002-08-17 09:36:01 +0000127
wdenkec4c5442004-02-09 23:12:24 +0000128 /* Now we can enable the DS1306 RTC */
129 immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
130 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000131
wdenkec4c5442004-02-09 23:12:24 +0000132 /* First disable write protect in the clock chip control register */
133 soft_spi_send (0x8F); /* send address of the control register */
134 soft_spi_send (0x00); /* send control register contents */
wdenkaffae2b2002-08-17 09:36:01 +0000135
wdenkec4c5442004-02-09 23:12:24 +0000136 /* Now disable the DS1306 to terminate the write */
137 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
138 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000139
wdenkec4c5442004-02-09 23:12:24 +0000140 /* Now enable the DS1306 to initiate a new write */
141 immap->im_cpm.cp_pbdat |= PB_SPI_CE;
142 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000143
wdenkec4c5442004-02-09 23:12:24 +0000144 /* Next, send the address of the clock time write registers */
145 soft_spi_send (0x80); /* send address of the first time register */
wdenkaffae2b2002-08-17 09:36:01 +0000146
wdenkec4c5442004-02-09 23:12:24 +0000147 /* Use Burst Mode to send all of the time data to the clock */
148 bin2bcd (tmp->tm_sec);
149 soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */
150 soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */
151 soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */
152 soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */
153 soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */
154 soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */
155 soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */
wdenkaffae2b2002-08-17 09:36:01 +0000156
wdenkec4c5442004-02-09 23:12:24 +0000157 /* Now we can disable the Clock chip to terminate the burst write */
158 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
159 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000160
wdenkec4c5442004-02-09 23:12:24 +0000161 /* Now we can enable the Clock chip to initiate a new write */
162 immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
163 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000164
wdenkec4c5442004-02-09 23:12:24 +0000165 /* First we Enable write protect in the clock chip control register */
166 soft_spi_send (0x8F); /* send address of the control register */
167 soft_spi_send (0x40); /* send out Control Register contents */
wdenkaffae2b2002-08-17 09:36:01 +0000168
wdenkec4c5442004-02-09 23:12:24 +0000169 /* Now disable the DS1306 */
170 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
171 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000172
wdenkec4c5442004-02-09 23:12:24 +0000173 /* Set standard MPC8xx clock to the same time so Linux will
174 * see the time even if it doesn't have a DS1306 clock driver.
175 * This helps with experimenting with standard kernels.
176 */
177 {
178 ulong tim;
wdenkaffae2b2002-08-17 09:36:01 +0000179
Simon Glass71420982015-04-20 12:37:19 -0600180 tim = rtc_mktime(tmp);
wdenkaffae2b2002-08-17 09:36:01 +0000181
wdenkec4c5442004-02-09 23:12:24 +0000182 immap->im_sitk.sitk_rtck = KAPWR_KEY;
183 immap->im_sit.sit_rtc = tim;
184 }
wdenkaffae2b2002-08-17 09:36:01 +0000185
wdenkec4c5442004-02-09 23:12:24 +0000186 debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
187 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
188 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200189
190 return 0;
wdenkaffae2b2002-08-17 09:36:01 +0000191}
192
193/* ------------------------------------------------------------------------- */
194
195/* Initialize Port B for software SPI */
wdenkec4c5442004-02-09 23:12:24 +0000196static void init_spi (void)
197{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200198 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
wdenkaffae2b2002-08-17 09:36:01 +0000199
wdenkec4c5442004-02-09 23:12:24 +0000200 /* Force output pins to begin at logic 0 */
201 immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);
wdenkaffae2b2002-08-17 09:36:01 +0000202
wdenkec4c5442004-02-09 23:12:24 +0000203 /* Set these 3 signals as outputs */
204 immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);
wdenkaffae2b2002-08-17 09:36:01 +0000205
wdenkec4c5442004-02-09 23:12:24 +0000206 immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */
207 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000208}
209
210/* ------------------------------------------------------------------------- */
211
212/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
wdenkec4c5442004-02-09 23:12:24 +0000213static void soft_spi_send (unsigned char n)
wdenkaffae2b2002-08-17 09:36:01 +0000214{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200215 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
wdenkec4c5442004-02-09 23:12:24 +0000216 unsigned char bitpos; /* bit position to receive */
217 unsigned char i; /* Loop Control */
wdenkaffae2b2002-08-17 09:36:01 +0000218
wdenkec4c5442004-02-09 23:12:24 +0000219 /* bit position to send, start with most significant bit */
220 bitpos = 0x80;
wdenkaffae2b2002-08-17 09:36:01 +0000221
wdenkec4c5442004-02-09 23:12:24 +0000222 /* Send 8 bits to software SPI */
223 for (i = 0; i < 8; i++) { /* Loop for 8 bits */
224 immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
wdenkaffae2b2002-08-17 09:36:01 +0000225
wdenkec4c5442004-02-09 23:12:24 +0000226 if (n & bitpos)
227 immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */
228 else
229 immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */
230 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000231
wdenkec4c5442004-02-09 23:12:24 +0000232 immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
233 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000234
wdenkec4c5442004-02-09 23:12:24 +0000235 bitpos >>= 1; /* Shift for next bit position */
236 }
wdenkaffae2b2002-08-17 09:36:01 +0000237}
238
239/* ------------------------------------------------------------------------- */
240
241/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
wdenkec4c5442004-02-09 23:12:24 +0000242static unsigned char soft_spi_read (void)
wdenkaffae2b2002-08-17 09:36:01 +0000243{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200244 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
wdenkaffae2b2002-08-17 09:36:01 +0000245
wdenkec4c5442004-02-09 23:12:24 +0000246 unsigned char spi_byte = 0; /* Return value, assume success */
247 unsigned char bitpos; /* bit position to receive */
248 unsigned char i; /* Loop Control */
wdenkaffae2b2002-08-17 09:36:01 +0000249
wdenkec4c5442004-02-09 23:12:24 +0000250 /* bit position to receive, start with most significant bit */
251 bitpos = 0x80;
wdenkaffae2b2002-08-17 09:36:01 +0000252
wdenkec4c5442004-02-09 23:12:24 +0000253 /* Read 8 bits here */
254 for (i = 0; i < 8; i++) { /* Do 8 bits in loop */
255 immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
256 udelay (10);
257 if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */
258 spi_byte |= bitpos; /* Set data accordingly */
259 immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
260 udelay (10);
261 bitpos >>= 1; /* Shift for next bit position */
262 }
wdenkaffae2b2002-08-17 09:36:01 +0000263
wdenkec4c5442004-02-09 23:12:24 +0000264 return spi_byte; /* Return the byte read */
wdenkaffae2b2002-08-17 09:36:01 +0000265}
266
267/* ------------------------------------------------------------------------- */
268
wdenkec4c5442004-02-09 23:12:24 +0000269void rtc_reset (void)
270{
271 return; /* nothing to do */
272}
273
274#else /* not CONFIG_SXNI855T */
275/* ************************************************************************* */
276
wdenk3f85ce22004-02-23 16:11:30 +0000277static unsigned char rtc_read (unsigned char reg);
278static void rtc_write (unsigned char reg, unsigned char val);
279
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200280static struct spi_slave *slave;
281
wdenkec4c5442004-02-09 23:12:24 +0000282/* read clock time from DS1306 and return it in *tmp */
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300283int rtc_get (struct rtc_time *tmp)
wdenkec4c5442004-02-09 23:12:24 +0000284{
285 unsigned char sec, min, hour, mday, wday, mon, year;
286
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200287 /*
288 * Assuming Vcc = 2.0V (lowest speed)
289 *
290 * REVISIT: If we add an rtc_init() function we can do this
291 * step just once.
292 */
293 if (!slave) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200294 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200295 SPI_MODE_3 | SPI_CS_HIGH);
296 if (!slave)
297 return;
298 }
299
300 if (spi_claim_bus(slave))
301 return;
302
wdenkec4c5442004-02-09 23:12:24 +0000303 sec = rtc_read (RTC_SECONDS);
304 min = rtc_read (RTC_MINUTES);
305 hour = rtc_read (RTC_HOURS);
306 mday = rtc_read (RTC_DATE_OF_MONTH);
307 wday = rtc_read (RTC_DAY_OF_WEEK);
308 mon = rtc_read (RTC_MONTH);
309 year = rtc_read (RTC_YEAR);
310
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200311 spi_release_bus(slave);
312
wdenkec4c5442004-02-09 23:12:24 +0000313 debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
314 "hr: %02x min: %02x sec: %02x\n",
315 year, mon, mday, wday, hour, min, sec);
316 debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
317 rtc_read (RTC_DAY_OF_WEEK_ALARM0),
318 rtc_read (RTC_HOURS_ALARM0),
319 rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
320 debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
321 rtc_read (RTC_DAY_OF_WEEK_ALARM1),
322 rtc_read (RTC_HOURS_ALARM1),
323 rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));
324
325 tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */
326 tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */
327
328 /* convert Hours */
329 tmp->tm_hour = (hour & 0x40)
330 ? ((hour & 0x20) /* 12 hour mode */
331 ? bcd2bin (hour & 0x1F) + 11 /* PM */
332 : bcd2bin (hour & 0x1F) - 1 /* AM */
333 )
334 : bcd2bin (hour & 0x3F); /* 24 hour mode */
335
336 tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */
337 tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */
338 tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */
339 tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */
340 tmp->tm_yday = 0;
341 tmp->tm_isdst = 0;
342
343 debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
344 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
345 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300346
347 return 0;
wdenkec4c5442004-02-09 23:12:24 +0000348}
349
350/* ------------------------------------------------------------------------- */
351
352/* set clock time from *tmp in DS1306 RTC */
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200353int rtc_set (struct rtc_time *tmp)
wdenkec4c5442004-02-09 23:12:24 +0000354{
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200355 /* Assuming Vcc = 2.0V (lowest speed) */
356 if (!slave) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200357 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200358 SPI_MODE_3 | SPI_CS_HIGH);
359 if (!slave)
360 return;
361 }
362
363 if (spi_claim_bus(slave))
364 return;
365
wdenkec4c5442004-02-09 23:12:24 +0000366 debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
367 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
368 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
369
wdenkec4c5442004-02-09 23:12:24 +0000370 rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
Wolfgang Denkda4849f2006-05-03 01:04:58 +0200371 rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
372 rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
373 rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
374 rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
375 rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
376 rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200377
378 spi_release_bus(slave);
wdenkec4c5442004-02-09 23:12:24 +0000379}
380
381/* ------------------------------------------------------------------------- */
382
383/* reset the DS1306 */
384void rtc_reset (void)
385{
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200386 /* Assuming Vcc = 2.0V (lowest speed) */
387 if (!slave) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200388 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200389 SPI_MODE_3 | SPI_CS_HIGH);
390 if (!slave)
391 return;
392 }
393
394 if (spi_claim_bus(slave))
395 return;
396
wdenkec4c5442004-02-09 23:12:24 +0000397 /* clear the control register */
398 rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */
399 rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */
400
401 /* reset all alarms */
402 rtc_write (RTC_SECONDS_ALARM0, 0x00);
403 rtc_write (RTC_SECONDS_ALARM1, 0x00);
404 rtc_write (RTC_MINUTES_ALARM0, 0x00);
405 rtc_write (RTC_MINUTES_ALARM1, 0x00);
406 rtc_write (RTC_HOURS_ALARM0, 0x00);
407 rtc_write (RTC_HOURS_ALARM1, 0x00);
408 rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
409 rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200410
411 spi_release_bus(slave);
wdenkec4c5442004-02-09 23:12:24 +0000412}
413
414/* ------------------------------------------------------------------------- */
415
416static unsigned char rtc_read (unsigned char reg)
417{
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200418 int ret;
wdenkec4c5442004-02-09 23:12:24 +0000419
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200420 ret = spi_w8r8(slave, reg);
421 return ret < 0 ? 0 : ret;
wdenkec4c5442004-02-09 23:12:24 +0000422}
423
424/* ------------------------------------------------------------------------- */
425
426static void rtc_write (unsigned char reg, unsigned char val)
427{
428 unsigned char dout[2]; /* SPI Output Data Bytes */
429 unsigned char din[2]; /* SPI Input Data Bytes */
430
431 dout[0] = 0x80 | reg;
432 dout[1] = val;
433
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200434 spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
wdenkec4c5442004-02-09 23:12:24 +0000435}
436
437#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */