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wdenk132ba5f2004-02-27 08:20:54 +00001/*
2 * (C) Copyright 2004
3 * Pierre AUBERT, Staubli Faverges, <p.aubert@staubli.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * Init is derived from Linux code.
24 */
25#include <common.h>
26
27#ifdef CFG_CMD_IDE
28#include <mpc5xxx.h>
29
30#define CALC_TIMING(t) (t + period - 1) / period
31
wdenkc3f9d492004-03-14 00:59:59 +000032#ifdef CONFIG_IDE_RESET
33extern void init_ide_reset (void);
34#endif
wdenk132ba5f2004-02-27 08:20:54 +000035
36int ide_preinit (void)
37{
38 DECLARE_GLOBAL_DATA_PTR;
39 long period, t0, t1, t2_8, t2_16, t4, ta;
40 vu_long reg;
41 struct mpc5xxx_sdma *psdma = (struct mpc5xxx_sdma *) MPC5XXX_SDMA;
42
43 reg = *(vu_long *) MPC5XXX_GPS_PORT_CONFIG;
44 reg = (reg & ~0x03000000ul) | 0x01000000ul;
45 *(vu_long *) MPC5XXX_GPS_PORT_CONFIG = reg;
46
47 /* All sample codes do that... */
48 *(vu_long *) MPC5XXX_ATA_SHARE_COUNT = 0;
49
50 /* Configure and reset host */
51 *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY |
52 MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR;
53 udelay (10);
54 *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY;
55
56 /* Disable prefetch on Commbus */
57 psdma->PtdCntrl |= 1;
58
59 /* Init timings : we use PIO mode 0 timings */
60 period = 1000000000 / gd->ipb_clk; /* period in ns */
61
62 t0 = CALC_TIMING (600);
63 t2_8 = CALC_TIMING (290);
64 t2_16 = CALC_TIMING (165);
65 reg = (t0 << 24) | (t2_8 << 16) | (t2_16 << 8);
66 *(vu_long *) MPC5XXX_ATA_PIO1 = reg;
67
68 t4 = CALC_TIMING (30);
69 t1 = CALC_TIMING (70);
70 ta = CALC_TIMING (35);
71 reg = (t4 << 24) | (t1 << 16) | (ta << 8);
72
73 *(vu_long *) MPC5XXX_ATA_PIO2 = reg;
74
wdenkc3f9d492004-03-14 00:59:59 +000075#ifdef CONFIG_IDE_RESET
wdenk42dfe7a2004-03-14 22:25:36 +000076 init_ide_reset ();
wdenkc3f9d492004-03-14 00:59:59 +000077#endif /* CONFIG_IDE_RESET */
wdenk132ba5f2004-02-27 08:20:54 +000078
79 return (0);
80}
wdenk132ba5f2004-02-27 08:20:54 +000081#endif /* CFG_CMD_IDE */