Bin Meng | 14afa22 | 2019-07-18 00:34:06 -0700 | [diff] [blame] | 1 | .. SPDX-License-Identifier: GPL-2.0+ |
| 2 | .. sectionauthor:: Bin Meng <bmeng.cn@gmail.com> |
| 3 | |
| 4 | Bayley Bay CRB |
| 5 | ============== |
| 6 | |
| 7 | This uses as FSP as with Crown Bay, except it is for the Atom E3800 series. |
| 8 | Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at |
| 9 | the time of writing). Put it in the corresponding board directory and rename |
| 10 | it to fsp.bin. |
| 11 | |
| 12 | Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same |
| 13 | board directory as vga.bin. |
| 14 | |
| 15 | You still need two more binary blobs. For Bayley Bay, they can be extracted |
| 16 | from the sample SPI image provided in the FSP (SPI.bin at the time of writing):: |
| 17 | |
| 18 | $ ./tools/ifdtool -x BayleyBay/SPI.bin |
| 19 | $ cp flashregion_0_flashdescriptor.bin board/intel/bayleybay/descriptor.bin |
| 20 | $ cp flashregion_2_intel_me.bin board/intel/bayleybay/me.bin |
| 21 | |
| 22 | Now you can build U-Boot and obtain u-boot.rom:: |
| 23 | |
| 24 | $ make bayleybay_defconfig |
| 25 | $ make all |
| 26 | |
| 27 | Note that the debug version of the FSP is bigger in size. If this version |
| 28 | is used, CONFIG_FSP_ADDR needs to be configured to 0xfffb0000 instead of |
| 29 | the default value 0xfffc0000. |