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Wolfgang Denk32cb2c72006-07-21 11:31:42 +02001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Alex Zuepke <azu@sysgo.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
26
27ulong myflush (void);
28
29#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
30#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
31
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020032flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
Wolfgang Denk32cb2c72006-07-21 11:31:42 +020033
34#define CMD_READ_ARRAY 0x000000F0
35#define CMD_UNLOCK1 0x000000AA
36#define CMD_UNLOCK2 0x00000055
37#define CMD_ERASE_SETUP 0x00000080
38#define CMD_ERASE_CONFIRM 0x00000030
39#define CMD_PROGRAM 0x000000A0
40#define CMD_UNLOCK_BYPASS 0x00000020
41
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020042#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 1)))
43#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 1)))
Wolfgang Denk32cb2c72006-07-21 11:31:42 +020044
45#define BIT_ERASE_DONE 0x00000080
46#define BIT_RDY_MASK 0x00000080
47#define BIT_PROGRAM_ERROR 0x00000020
48#define BIT_TIMEOUT 0x80000000 /* our flag */
49
50#define READY 1
51#define ERR 2
52#define TMO 4
53
54/*-----------------------------------------------------------------------
55 */
56
57ulong flash_init (void)
58{
59 int i, j;
60 ulong size = 0;
61
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020062 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Wolfgang Denk32cb2c72006-07-21 11:31:42 +020063 ulong flashbase = 0;
64
65 flash_info[i].flash_id =
66#if defined(CONFIG_AMD_LV400)
67 (AMD_MANUFACT & FLASH_VENDMASK) |
68 (AMD_ID_LV400B & FLASH_TYPEMASK);
69#elif defined(CONFIG_AMD_LV800)
70 (AMD_MANUFACT & FLASH_VENDMASK) |
71 (AMD_ID_LV800B & FLASH_TYPEMASK);
72#else
73#error "Unknown flash configured"
74#endif
75 flash_info[i].size = FLASH_BANK_SIZE;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076 flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
77 memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
Wolfgang Denk32cb2c72006-07-21 11:31:42 +020078 if (i == 0)
79 flashbase = PHYS_FLASH_1;
80 else
81 panic ("configured too many flash banks!\n");
82 for (j = 0; j < flash_info[i].sector_count; j++) {
83 if (j <= 3) {
84 /* 1st one is 16 KB */
85 if (j == 0) {
86 flash_info[i].start[j] =
87 flashbase + 0;
88 }
89
90 /* 2nd and 3rd are both 8 KB */
91 if ((j == 1) || (j == 2)) {
92 flash_info[i].start[j] =
93 flashbase + 0x4000 + (j -
94 1) *
95 0x2000;
96 }
97
98 /* 4th 32 KB */
99 if (j == 3) {
100 flash_info[i].start[j] =
101 flashbase + 0x8000;
102 }
103 } else {
104 flash_info[i].start[j] =
105 flashbase + (j - 3) * MAIN_SECT_SIZE;
106 }
107 }
108 size += flash_info[i].size;
109 }
110
111 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200112 CONFIG_SYS_FLASH_BASE,
113 CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200114 &flash_info[0]);
115
116 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200117 CONFIG_ENV_ADDR,
118 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200119
120 return size;
121}
122
123/*-----------------------------------------------------------------------
124 */
125void flash_print_info (flash_info_t * info)
126{
127 int i;
128
129 switch (info->flash_id & FLASH_VENDMASK) {
130 case (AMD_MANUFACT & FLASH_VENDMASK):
131 printf ("AMD: ");
132 break;
133 default:
134 printf ("Unknown Vendor ");
135 break;
136 }
137
138 switch (info->flash_id & FLASH_TYPEMASK) {
139 case (AMD_ID_LV400B & FLASH_TYPEMASK):
140 printf ("1x Amd29LV400BB (4Mbit)\n");
141 break;
142 case (AMD_ID_LV800B & FLASH_TYPEMASK):
143 printf ("1x Amd29LV800BB (8Mbit)\n");
144 break;
145 default:
146 printf ("Unknown Chip Type\n");
147 goto Done;
148 break;
149 }
150
151 printf (" Size: %ld MB in %d Sectors\n",
152 info->size >> 20, info->sector_count);
153
154 printf (" Sector Start Addresses:");
155 for (i = 0; i < info->sector_count; i++) {
156 if ((i % 5) == 0) {
157 printf ("\n ");
158 }
159 printf (" %08lX%s", info->start[i],
160 info->protect[i] ? " (RO)" : " ");
161 }
162 printf ("\n");
163
164 Done:;
165}
166
167/*-----------------------------------------------------------------------
168 */
169
170int flash_erase (flash_info_t * info, int s_first, int s_last)
171{
172 ushort result;
173 int iflag, cflag, prot, sect;
174 int rc = ERR_OK;
175 int chip;
176
177 /* first look for protection bits */
178
179 if (info->flash_id == FLASH_UNKNOWN)
180 return ERR_UNKNOWN_FLASH_TYPE;
181
182 if ((s_first < 0) || (s_first > s_last)) {
183 return ERR_INVAL;
184 }
185
186 if ((info->flash_id & FLASH_VENDMASK) !=
187 (AMD_MANUFACT & FLASH_VENDMASK)) {
188 return ERR_UNKNOWN_FLASH_VENDOR;
189 }
190
191 prot = 0;
192 for (sect = s_first; sect <= s_last; ++sect) {
193 if (info->protect[sect]) {
194 prot++;
195 }
196 }
197 if (prot)
198 return ERR_PROTECTED;
199
200 /*
201 * Disable interrupts which might cause a timeout
202 * here. Remember that our exception vectors are
203 * at address 0 in the flash, and we don't want a
204 * (ticker) exception to happen while the flash
205 * chip is in programming mode.
206 */
207 cflag = icache_status ();
208 icache_disable ();
209 iflag = disable_interrupts ();
210
211 /* Start erase on unprotected sectors */
212 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
213 printf ("Erasing sector %2d ... ", sect);
214
215 /* arm simple, non interrupt dependent timer */
216 reset_timer_masked ();
217
218 if (info->protect[sect] == 0) { /* not protected */
219 vu_short *addr = (vu_short *) (info->start[sect]);
220
221 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
222 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
223 MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
224
225 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
226 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
227 *addr = CMD_ERASE_CONFIRM;
228
229 /* wait until flash is ready */
230 chip = 0;
231
232 do {
233 result = *addr;
234
235 /* check timeout */
236 if (get_timer_masked () >
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200237 CONFIG_SYS_FLASH_ERASE_TOUT) {
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200238 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
239 chip = TMO;
240 break;
241 }
242
243 if (!chip
244 && (result & 0xFFFF) & BIT_ERASE_DONE)
245 chip = READY;
246
247 if (!chip
248 && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
249 chip = ERR;
250
251 } while (!chip);
252
253 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
254
255 if (chip == ERR) {
256 rc = ERR_PROG_ERROR;
257 goto outahere;
258 }
259 if (chip == TMO) {
260 rc = ERR_TIMOUT;
261 goto outahere;
262 }
263
264 printf ("ok.\n");
265 } else { /* it was protected */
266
267 printf ("protected!\n");
268 }
269 }
270
271 if (ctrlc ())
272 printf ("User Interrupt!\n");
273
274 outahere:
275 /* allow flash to settle - wait 10 ms */
276 udelay_masked (10000);
277
278 if (iflag)
279 enable_interrupts ();
280
281 if (cflag)
282 icache_enable ();
283
284 return rc;
285}
286
287/*-----------------------------------------------------------------------
288 * Copy memory to flash
289 */
290
Wolfgang Denk8412d812007-11-18 17:11:09 +0100291static int write_hword (flash_info_t * info, ulong dest, ushort data)
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200292{
293 vu_short *addr = (vu_short *) dest;
294 ushort result;
295 int rc = ERR_OK;
296 int cflag, iflag;
297 int chip;
298
299 /*
300 * Check if Flash is (sufficiently) erased
301 */
302 result = *addr;
303 if ((result & data) != data)
304 return ERR_NOT_ERASED;
305
306
307 /*
308 * Disable interrupts which might cause a timeout
309 * here. Remember that our exception vectors are
310 * at address 0 in the flash, and we don't want a
311 * (ticker) exception to happen while the flash
312 * chip is in programming mode.
313 */
314 cflag = icache_status ();
315 icache_disable ();
316 iflag = disable_interrupts ();
317
318 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
319 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
320 MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
321 *addr = CMD_PROGRAM;
322 *addr = data;
323
324 /* arm simple, non interrupt dependent timer */
325 reset_timer_masked ();
326
327 /* wait until flash is ready */
328 chip = 0;
329 do {
330 result = *addr;
331
332 /* check timeout */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200333 if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200334 chip = ERR | TMO;
335 break;
336 }
337 if (!chip && ((result & 0x80) == (data & 0x80)))
338 chip = READY;
339
340 if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
341 result = *addr;
342
343 if ((result & 0x80) == (data & 0x80))
344 chip = READY;
345 else
346 chip = ERR;
347 }
348
349 } while (!chip);
350
351 *addr = CMD_READ_ARRAY;
352
353 if (chip == ERR || *addr != data)
354 rc = ERR_PROG_ERROR;
355
356 if (iflag)
357 enable_interrupts ();
358
359 if (cflag)
360 icache_enable ();
361
362 return rc;
363}
364
365/*-----------------------------------------------------------------------
366 * Copy memory to flash.
367 */
368
369int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
370{
371 ulong cp, wp;
372 int l;
373 int i, rc;
374 ushort data;
375
376 wp = (addr & ~1); /* get lower word aligned address */
377
378 /*
379 * handle unaligned start bytes
380 */
381 if ((l = addr - wp) != 0) {
382 data = 0;
383 for (i = 0, cp = wp; i < l; ++i, ++cp) {
384 data = (data >> 8) | (*(uchar *) cp << 8);
385 }
386 for (; i < 2 && cnt > 0; ++i) {
387 data = (data >> 8) | (*src++ << 8);
388 --cnt;
389 ++cp;
390 }
391 for (; cnt == 0 && i < 2; ++i, ++cp) {
392 data = (data >> 8) | (*(uchar *) cp << 8);
393 }
394
395 if ((rc = write_hword (info, wp, data)) != 0) {
396 return (rc);
397 }
398 wp += 2;
399 }
400
401 /*
402 * handle word aligned part
403 */
404 while (cnt >= 2) {
405 data = *((vu_short *) src);
406 if ((rc = write_hword (info, wp, data)) != 0) {
407 return (rc);
408 }
409 src += 2;
410 wp += 2;
411 cnt -= 2;
412 }
413
414 if (cnt == 0) {
415 return ERR_OK;
416 }
417
418 /*
419 * handle unaligned tail bytes
420 */
421 data = 0;
422 for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
423 data = (data >> 8) | (*src++ << 8);
424 --cnt;
425 }
426 for (; i < 2; ++i, ++cp) {
427 data = (data >> 8) | (*(uchar *) cp << 8);
428 }
429
430 return write_hword (info, wp, data);
431}