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wdenk81a88242002-10-26 15:22:42 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * I2C Functions similar to the standard memory functions.
26 *
27 * There are several parameters in many of the commands that bear further
28 * explanations:
29 *
wdenk81a88242002-10-26 15:22:42 +000030 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
31 * Each I2C chip on the bus has a unique address. On the I2C data bus,
32 * the address is the upper seven bits and the LSB is the "read/write"
33 * bit. Note that the {i2c_chip} address specified on the command
34 * line is not shifted up: e.g. a typical EEPROM memory chip may have
35 * an I2C address of 0x50, but the data put on the bus will be 0xA0
36 * for write and 0xA1 for read. This "non shifted" address notation
37 * matches at least half of the data sheets :-/.
38 *
39 * {addr} is the address (or offset) within the chip. Small memory
40 * chips have 8 bit addresses. Large memory chips have 16 bit
41 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
42 * Many non-memory chips have multiple registers and {addr} is used
43 * as the register index. Some non-memory chips have only one register
44 * and therefore don't need any {addr} parameter.
45 *
46 * The default {addr} parameter is one byte (.1) which works well for
47 * memories and registers with 8 bits of address space.
48 *
49 * You can specify the length of the {addr} field with the optional .0,
50 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
51 * manipulating a single register device which doesn't use an address
52 * field, use "0.0" for the address and the ".0" length field will
53 * suppress the address in the I2C data stream. This also works for
54 * successive reads using the I2C auto-incrementing memory pointer.
55 *
56 * If you are manipulating a large memory with 2-byte addresses, use
57 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
58 *
59 * Then there are the unfortunate memory chips that spill the most
60 * significant 1, 2, or 3 bits of address into the chip address byte.
61 * This effectively makes one chip (logically) look like 2, 4, or
62 * 8 chips. This is handled (awkwardly) by #defining
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
wdenk81a88242002-10-26 15:22:42 +000064 * {addr} field (since .1 is the default, it doesn't actually have to
65 * be specified). Examples: given a memory chip at I2C chip address
66 * 0x50, the following would happen...
Peter Tyser0f89c542009-04-18 22:34:03 -050067 * i2c md 50 0 10 display 16 bytes starting at 0x000
wdenk81a88242002-10-26 15:22:42 +000068 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
Peter Tyser0f89c542009-04-18 22:34:03 -050069 * i2c md 50 100 10 display 16 bytes starting at 0x100
wdenk81a88242002-10-26 15:22:42 +000070 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
Peter Tyser0f89c542009-04-18 22:34:03 -050071 * i2c md 50 210 10 display 16 bytes starting at 0x210
wdenk81a88242002-10-26 15:22:42 +000072 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
73 * This is awfully ugly. It would be nice if someone would think up
74 * a better way of handling this.
75 *
76 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
77 */
78
79#include <common.h>
80#include <command.h>
Heiko Schocher67b23a32008-10-15 09:39:47 +020081#include <environment.h>
wdenk81a88242002-10-26 15:22:42 +000082#include <i2c.h>
Heiko Schocher67b23a32008-10-15 09:39:47 +020083#include <malloc.h>
wdenk81a88242002-10-26 15:22:42 +000084#include <asm/byteorder.h>
85
wdenk81a88242002-10-26 15:22:42 +000086/* Display values from last command.
87 * Memory modify remembered values are different from display memory.
88 */
89static uchar i2c_dp_last_chip;
90static uint i2c_dp_last_addr;
91static uint i2c_dp_last_alen;
92static uint i2c_dp_last_length = 0x10;
93
94static uchar i2c_mm_last_chip;
95static uint i2c_mm_last_addr;
96static uint i2c_mm_last_alen;
97
Ben Warrenbb99ad62006-09-07 16:50:54 -040098/* If only one I2C bus is present, the list of devices to ignore when
99 * the probe command is issued is represented by a 1D array of addresses.
100 * When multiple buses are present, the list is an array of bus-address
101 * pairs. The following macros take care of this */
102
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200103#if defined(CONFIG_SYS_I2C_NOPROBES)
Ben Warrenbb99ad62006-09-07 16:50:54 -0400104#if defined(CONFIG_I2C_MULTI_BUS)
105static struct
106{
107 uchar bus;
108 uchar addr;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109} i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
Ben Warrenbb99ad62006-09-07 16:50:54 -0400110#define GET_BUS_NUM i2c_get_bus_num()
111#define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
112#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
113#define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
114#else /* single bus */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
Ben Warrenbb99ad62006-09-07 16:50:54 -0400116#define GET_BUS_NUM 0
117#define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
118#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
119#define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
120#endif /* CONFIG_MULTI_BUS */
121
122#define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0]))
wdenk81a88242002-10-26 15:22:42 +0000123#endif
124
Heiko Schocher67b23a32008-10-15 09:39:47 +0200125#if defined(CONFIG_I2C_MUX)
126static I2C_MUX_DEVICE *i2c_mux_devices = NULL;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS;
Heiko Schocher67b23a32008-10-15 09:39:47 +0200128
129DECLARE_GLOBAL_DATA_PTR;
130
131#endif
132
Peter Tyser655b34a2009-04-18 22:34:01 -0500133/* TODO: Implement architecture-specific get/set functions */
134unsigned int __def_i2c_get_bus_speed(void)
135{
136 return CONFIG_SYS_I2C_SPEED;
137}
138unsigned int i2c_get_bus_speed(void)
139 __attribute__((weak, alias("__def_i2c_get_bus_speed")));
140
141int __def_i2c_set_bus_speed(unsigned int speed)
142{
143 if (speed != CONFIG_SYS_I2C_SPEED)
144 return -1;
145
146 return 0;
147}
148int i2c_set_bus_speed(unsigned int)
149 __attribute__((weak, alias("__def_i2c_set_bus_speed")));
150
wdenk81a88242002-10-26 15:22:42 +0000151/*
152 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500153 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
wdenk81a88242002-10-26 15:22:42 +0000154 */
155#define DISP_LINE_LEN 16
156
157int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
158{
159 u_char chip;
160 uint addr, alen, length;
161 int j, nbytes, linebytes;
162
163 /* We use the last specified parameters, unless new ones are
164 * entered.
165 */
166 chip = i2c_dp_last_chip;
167 addr = i2c_dp_last_addr;
168 alen = i2c_dp_last_alen;
169 length = i2c_dp_last_length;
170
171 if (argc < 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600172 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000173 return 1;
174 }
175
176 if ((flag & CMD_FLAG_REPEAT) == 0) {
177 /*
178 * New command specified.
179 */
180 alen = 1;
181
182 /*
183 * I2C chip address
184 */
185 chip = simple_strtoul(argv[1], NULL, 16);
186
187 /*
188 * I2C data address within the chip. This can be 1 or
189 * 2 bytes long. Some day it might be 3 bytes long :-).
190 */
191 addr = simple_strtoul(argv[2], NULL, 16);
192 alen = 1;
Timur Tabie857a5b2006-11-28 12:09:35 -0600193 for (j = 0; j < 8; j++) {
wdenk81a88242002-10-26 15:22:42 +0000194 if (argv[2][j] == '.') {
195 alen = argv[2][j+1] - '0';
196 if (alen > 4) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600197 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000198 return 1;
199 }
200 break;
Timur Tabie857a5b2006-11-28 12:09:35 -0600201 } else if (argv[2][j] == '\0')
wdenk81a88242002-10-26 15:22:42 +0000202 break;
wdenk81a88242002-10-26 15:22:42 +0000203 }
204
205 /*
206 * If another parameter, it is the length to display.
207 * Length is the number of objects, not number of bytes.
208 */
209 if (argc > 3)
210 length = simple_strtoul(argv[3], NULL, 16);
211 }
212
213 /*
214 * Print the lines.
215 *
216 * We buffer all read data, so we can make sure data is read only
217 * once.
218 */
219 nbytes = length;
220 do {
221 unsigned char linebuf[DISP_LINE_LEN];
222 unsigned char *cp;
223
224 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
225
Timur Tabie857a5b2006-11-28 12:09:35 -0600226 if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
wdenk4b9206e2004-03-23 22:14:11 +0000227 puts ("Error reading the chip.\n");
Timur Tabie857a5b2006-11-28 12:09:35 -0600228 else {
wdenk81a88242002-10-26 15:22:42 +0000229 printf("%04x:", addr);
230 cp = linebuf;
231 for (j=0; j<linebytes; j++) {
232 printf(" %02x", *cp++);
233 addr++;
234 }
wdenk4b9206e2004-03-23 22:14:11 +0000235 puts (" ");
wdenk81a88242002-10-26 15:22:42 +0000236 cp = linebuf;
237 for (j=0; j<linebytes; j++) {
238 if ((*cp < 0x20) || (*cp > 0x7e))
wdenk4b9206e2004-03-23 22:14:11 +0000239 puts (".");
wdenk81a88242002-10-26 15:22:42 +0000240 else
241 printf("%c", *cp);
242 cp++;
243 }
wdenk4b9206e2004-03-23 22:14:11 +0000244 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000245 }
246 nbytes -= linebytes;
247 } while (nbytes > 0);
248
249 i2c_dp_last_chip = chip;
250 i2c_dp_last_addr = addr;
251 i2c_dp_last_alen = alen;
252 i2c_dp_last_length = length;
253
254 return 0;
255}
256
wdenk81a88242002-10-26 15:22:42 +0000257
258/* Write (fill) memory
259 *
260 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500261 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
wdenk81a88242002-10-26 15:22:42 +0000262 */
263int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
264{
265 uchar chip;
266 ulong addr;
267 uint alen;
268 uchar byte;
269 int count;
270 int j;
271
272 if ((argc < 4) || (argc > 5)) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600273 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000274 return 1;
275 }
276
277 /*
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200278 * Chip is always specified.
279 */
wdenk81a88242002-10-26 15:22:42 +0000280 chip = simple_strtoul(argv[1], NULL, 16);
281
282 /*
283 * Address is always specified.
284 */
285 addr = simple_strtoul(argv[2], NULL, 16);
286 alen = 1;
Timur Tabie857a5b2006-11-28 12:09:35 -0600287 for (j = 0; j < 8; j++) {
wdenk81a88242002-10-26 15:22:42 +0000288 if (argv[2][j] == '.') {
289 alen = argv[2][j+1] - '0';
Timur Tabie857a5b2006-11-28 12:09:35 -0600290 if (alen > 4) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600291 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000292 return 1;
293 }
294 break;
Timur Tabie857a5b2006-11-28 12:09:35 -0600295 } else if (argv[2][j] == '\0')
wdenk81a88242002-10-26 15:22:42 +0000296 break;
wdenk81a88242002-10-26 15:22:42 +0000297 }
298
299 /*
300 * Value to write is always specified.
301 */
302 byte = simple_strtoul(argv[3], NULL, 16);
303
304 /*
305 * Optional count
306 */
Timur Tabie857a5b2006-11-28 12:09:35 -0600307 if (argc == 5)
wdenk81a88242002-10-26 15:22:42 +0000308 count = simple_strtoul(argv[4], NULL, 16);
Timur Tabie857a5b2006-11-28 12:09:35 -0600309 else
wdenk81a88242002-10-26 15:22:42 +0000310 count = 1;
wdenk81a88242002-10-26 15:22:42 +0000311
312 while (count-- > 0) {
Timur Tabie857a5b2006-11-28 12:09:35 -0600313 if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
wdenk4b9206e2004-03-23 22:14:11 +0000314 puts ("Error writing the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000315 /*
316 * Wait for the write to complete. The write can take
317 * up to 10mSec (we allow a little more time).
318 *
319 * On some chips, while the write is in progress, the
320 * chip doesn't respond. This apparently isn't a
321 * universal feature so we don't take advantage of it.
322 */
d4f5c722005-08-12 21:16:13 +0200323/*
324 * No write delay with FRAM devices.
325 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200326#if !defined(CONFIG_SYS_I2C_FRAM)
wdenk81a88242002-10-26 15:22:42 +0000327 udelay(11000);
d4f5c722005-08-12 21:16:13 +0200328#endif
329
wdenk81a88242002-10-26 15:22:42 +0000330#if 0
Timur Tabie857a5b2006-11-28 12:09:35 -0600331 for (timeout = 0; timeout < 10; timeout++) {
wdenk81a88242002-10-26 15:22:42 +0000332 udelay(2000);
Timur Tabie857a5b2006-11-28 12:09:35 -0600333 if (i2c_probe(chip) == 0)
wdenk81a88242002-10-26 15:22:42 +0000334 break;
335 }
336#endif
337 }
338
339 return (0);
340}
341
wdenk81a88242002-10-26 15:22:42 +0000342/* Calculate a CRC on memory
343 *
344 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500345 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
wdenk81a88242002-10-26 15:22:42 +0000346 */
347int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
348{
349 uchar chip;
350 ulong addr;
351 uint alen;
352 int count;
353 uchar byte;
354 ulong crc;
355 ulong err;
356 int j;
357
358 if (argc < 4) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600359 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000360 return 1;
361 }
362
363 /*
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200364 * Chip is always specified.
365 */
wdenk81a88242002-10-26 15:22:42 +0000366 chip = simple_strtoul(argv[1], NULL, 16);
367
368 /*
369 * Address is always specified.
370 */
371 addr = simple_strtoul(argv[2], NULL, 16);
372 alen = 1;
Timur Tabie857a5b2006-11-28 12:09:35 -0600373 for (j = 0; j < 8; j++) {
wdenk81a88242002-10-26 15:22:42 +0000374 if (argv[2][j] == '.') {
375 alen = argv[2][j+1] - '0';
Timur Tabie857a5b2006-11-28 12:09:35 -0600376 if (alen > 4) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600377 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000378 return 1;
379 }
380 break;
Timur Tabie857a5b2006-11-28 12:09:35 -0600381 } else if (argv[2][j] == '\0')
wdenk81a88242002-10-26 15:22:42 +0000382 break;
wdenk81a88242002-10-26 15:22:42 +0000383 }
384
385 /*
386 * Count is always specified
387 */
388 count = simple_strtoul(argv[3], NULL, 16);
389
390 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
391 /*
392 * CRC a byte at a time. This is going to be slooow, but hey, the
393 * memories are small and slow too so hopefully nobody notices.
394 */
395 crc = 0;
396 err = 0;
Timur Tabie857a5b2006-11-28 12:09:35 -0600397 while (count-- > 0) {
398 if (i2c_read(chip, addr, alen, &byte, 1) != 0)
wdenk81a88242002-10-26 15:22:42 +0000399 err++;
wdenk81a88242002-10-26 15:22:42 +0000400 crc = crc32 (crc, &byte, 1);
401 addr++;
402 }
Timur Tabie857a5b2006-11-28 12:09:35 -0600403 if (err > 0)
wdenk4b9206e2004-03-23 22:14:11 +0000404 puts ("Error reading the chip,\n");
Timur Tabie857a5b2006-11-28 12:09:35 -0600405 else
wdenk81a88242002-10-26 15:22:42 +0000406 printf ("%08lx\n", crc);
wdenk81a88242002-10-26 15:22:42 +0000407
408 return 0;
409}
410
wdenk81a88242002-10-26 15:22:42 +0000411/* Modify memory.
412 *
413 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500414 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
415 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
wdenk81a88242002-10-26 15:22:42 +0000416 */
417
418static int
419mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
420{
421 uchar chip;
422 ulong addr;
423 uint alen;
424 ulong data;
425 int size = 1;
426 int nbytes;
427 int j;
428 extern char console_buffer[];
429
430 if (argc != 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600431 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000432 return 1;
433 }
434
435#ifdef CONFIG_BOOT_RETRY_TIME
436 reset_cmd_timeout(); /* got a good command to get here */
437#endif
438 /*
439 * We use the last specified parameters, unless new ones are
440 * entered.
441 */
442 chip = i2c_mm_last_chip;
443 addr = i2c_mm_last_addr;
444 alen = i2c_mm_last_alen;
445
446 if ((flag & CMD_FLAG_REPEAT) == 0) {
447 /*
448 * New command specified. Check for a size specification.
449 * Defaults to byte if no or incorrect specification.
450 */
451 size = cmd_get_data_size(argv[0], 1);
452
453 /*
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200454 * Chip is always specified.
455 */
wdenk81a88242002-10-26 15:22:42 +0000456 chip = simple_strtoul(argv[1], NULL, 16);
457
458 /*
459 * Address is always specified.
460 */
461 addr = simple_strtoul(argv[2], NULL, 16);
462 alen = 1;
Timur Tabie857a5b2006-11-28 12:09:35 -0600463 for (j = 0; j < 8; j++) {
wdenk81a88242002-10-26 15:22:42 +0000464 if (argv[2][j] == '.') {
465 alen = argv[2][j+1] - '0';
Timur Tabie857a5b2006-11-28 12:09:35 -0600466 if (alen > 4) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600467 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000468 return 1;
469 }
470 break;
Timur Tabie857a5b2006-11-28 12:09:35 -0600471 } else if (argv[2][j] == '\0')
wdenk81a88242002-10-26 15:22:42 +0000472 break;
wdenk81a88242002-10-26 15:22:42 +0000473 }
474 }
475
476 /*
477 * Print the address, followed by value. Then accept input for
478 * the next value. A non-converted value exits.
479 */
480 do {
481 printf("%08lx:", addr);
Timur Tabie857a5b2006-11-28 12:09:35 -0600482 if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0)
wdenk4b9206e2004-03-23 22:14:11 +0000483 puts ("\nError reading the chip,\n");
Timur Tabie857a5b2006-11-28 12:09:35 -0600484 else {
wdenk81a88242002-10-26 15:22:42 +0000485 data = cpu_to_be32(data);
Timur Tabie857a5b2006-11-28 12:09:35 -0600486 if (size == 1)
wdenk81a88242002-10-26 15:22:42 +0000487 printf(" %02lx", (data >> 24) & 0x000000FF);
Timur Tabie857a5b2006-11-28 12:09:35 -0600488 else if (size == 2)
wdenk81a88242002-10-26 15:22:42 +0000489 printf(" %04lx", (data >> 16) & 0x0000FFFF);
Timur Tabie857a5b2006-11-28 12:09:35 -0600490 else
wdenk81a88242002-10-26 15:22:42 +0000491 printf(" %08lx", data);
wdenk81a88242002-10-26 15:22:42 +0000492 }
493
494 nbytes = readline (" ? ");
495 if (nbytes == 0) {
496 /*
497 * <CR> pressed as only input, don't modify current
498 * location and move to next.
499 */
500 if (incrflag)
501 addr += size;
502 nbytes = size;
503#ifdef CONFIG_BOOT_RETRY_TIME
504 reset_cmd_timeout(); /* good enough to not time out */
505#endif
506 }
507#ifdef CONFIG_BOOT_RETRY_TIME
Timur Tabie857a5b2006-11-28 12:09:35 -0600508 else if (nbytes == -2)
wdenk81a88242002-10-26 15:22:42 +0000509 break; /* timed out, exit the command */
wdenk81a88242002-10-26 15:22:42 +0000510#endif
511 else {
512 char *endp;
513
514 data = simple_strtoul(console_buffer, &endp, 16);
Timur Tabie857a5b2006-11-28 12:09:35 -0600515 if (size == 1)
wdenk81a88242002-10-26 15:22:42 +0000516 data = data << 24;
Timur Tabie857a5b2006-11-28 12:09:35 -0600517 else if (size == 2)
wdenk81a88242002-10-26 15:22:42 +0000518 data = data << 16;
wdenk81a88242002-10-26 15:22:42 +0000519 data = be32_to_cpu(data);
520 nbytes = endp - console_buffer;
521 if (nbytes) {
522#ifdef CONFIG_BOOT_RETRY_TIME
523 /*
524 * good enough to not time out
525 */
526 reset_cmd_timeout();
527#endif
Timur Tabie857a5b2006-11-28 12:09:35 -0600528 if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0)
wdenk4b9206e2004-03-23 22:14:11 +0000529 puts ("Error writing the chip.\n");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200530#ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
531 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
wdenk2535d602003-07-17 23:16:40 +0000532#endif
wdenk81a88242002-10-26 15:22:42 +0000533 if (incrflag)
534 addr += size;
535 }
536 }
537 } while (nbytes);
538
Peter Tyser08007072008-08-15 14:36:32 -0500539 i2c_mm_last_chip = chip;
540 i2c_mm_last_addr = addr;
541 i2c_mm_last_alen = alen;
wdenk81a88242002-10-26 15:22:42 +0000542
543 return 0;
544}
545
546/*
547 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500548 * i2c probe {addr}{.0, .1, .2}
wdenk81a88242002-10-26 15:22:42 +0000549 */
550int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
551{
552 int j;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200553#if defined(CONFIG_SYS_I2C_NOPROBES)
wdenk81a88242002-10-26 15:22:42 +0000554 int k, skip;
Ben Warrenbb99ad62006-09-07 16:50:54 -0400555 uchar bus = GET_BUS_NUM;
556#endif /* NOPROBES */
wdenk81a88242002-10-26 15:22:42 +0000557
wdenk4b9206e2004-03-23 22:14:11 +0000558 puts ("Valid chip addresses:");
Timur Tabie857a5b2006-11-28 12:09:35 -0600559 for (j = 0; j < 128; j++) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200560#if defined(CONFIG_SYS_I2C_NOPROBES)
wdenk81a88242002-10-26 15:22:42 +0000561 skip = 0;
Timur Tabie857a5b2006-11-28 12:09:35 -0600562 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
563 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
wdenk81a88242002-10-26 15:22:42 +0000564 skip = 1;
565 break;
566 }
567 }
568 if (skip)
569 continue;
570#endif
Timur Tabie857a5b2006-11-28 12:09:35 -0600571 if (i2c_probe(j) == 0)
wdenk81a88242002-10-26 15:22:42 +0000572 printf(" %02X", j);
wdenk81a88242002-10-26 15:22:42 +0000573 }
wdenk4b9206e2004-03-23 22:14:11 +0000574 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000575
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200576#if defined(CONFIG_SYS_I2C_NOPROBES)
wdenk81a88242002-10-26 15:22:42 +0000577 puts ("Excluded chip addresses:");
Timur Tabie857a5b2006-11-28 12:09:35 -0600578 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
579 if (COMPARE_BUS(bus,k))
Ben Warrenbb99ad62006-09-07 16:50:54 -0400580 printf(" %02X", NO_PROBE_ADDR(k));
581 }
wdenk4b9206e2004-03-23 22:14:11 +0000582 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000583#endif
584
585 return 0;
586}
587
wdenk81a88242002-10-26 15:22:42 +0000588/*
589 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500590 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
wdenk81a88242002-10-26 15:22:42 +0000591 * {length} - Number of bytes to read
592 * {delay} - A DECIMAL number and defaults to 1000 uSec
593 */
594int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
595{
596 u_char chip;
597 ulong alen;
598 uint addr;
599 uint length;
600 u_char bytes[16];
601 int delay;
602 int j;
603
604 if (argc < 3) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600605 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000606 return 1;
607 }
608
609 /*
610 * Chip is always specified.
611 */
612 chip = simple_strtoul(argv[1], NULL, 16);
613
614 /*
615 * Address is always specified.
616 */
617 addr = simple_strtoul(argv[2], NULL, 16);
618 alen = 1;
Timur Tabie857a5b2006-11-28 12:09:35 -0600619 for (j = 0; j < 8; j++) {
wdenk81a88242002-10-26 15:22:42 +0000620 if (argv[2][j] == '.') {
621 alen = argv[2][j+1] - '0';
622 if (alen > 4) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600623 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000624 return 1;
625 }
626 break;
Timur Tabie857a5b2006-11-28 12:09:35 -0600627 } else if (argv[2][j] == '\0')
wdenk81a88242002-10-26 15:22:42 +0000628 break;
wdenk81a88242002-10-26 15:22:42 +0000629 }
630
631 /*
632 * Length is the number of objects, not number of bytes.
633 */
634 length = 1;
635 length = simple_strtoul(argv[3], NULL, 16);
Timur Tabie857a5b2006-11-28 12:09:35 -0600636 if (length > sizeof(bytes))
wdenk81a88242002-10-26 15:22:42 +0000637 length = sizeof(bytes);
wdenk81a88242002-10-26 15:22:42 +0000638
639 /*
640 * The delay time (uSec) is optional.
641 */
642 delay = 1000;
Timur Tabie857a5b2006-11-28 12:09:35 -0600643 if (argc > 3)
wdenk81a88242002-10-26 15:22:42 +0000644 delay = simple_strtoul(argv[4], NULL, 10);
wdenk81a88242002-10-26 15:22:42 +0000645 /*
646 * Run the loop...
647 */
Timur Tabie857a5b2006-11-28 12:09:35 -0600648 while (1) {
649 if (i2c_read(chip, addr, alen, bytes, length) != 0)
wdenk4b9206e2004-03-23 22:14:11 +0000650 puts ("Error reading the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000651 udelay(delay);
652 }
653
654 /* NOTREACHED */
655 return 0;
656}
657
wdenk81a88242002-10-26 15:22:42 +0000658/*
659 * The SDRAM command is separately configured because many
660 * (most?) embedded boards don't use SDRAM DIMMs.
661 */
Jon Loeligerc76fe472007-07-08 18:02:23 -0500662#if defined(CONFIG_CMD_SDRAM)
Larry Johnson632de062008-01-11 23:26:18 -0500663static void print_ddr2_tcyc (u_char const b)
664{
665 printf ("%d.", (b >> 4) & 0x0F);
666 switch (b & 0x0F) {
667 case 0x0:
668 case 0x1:
669 case 0x2:
670 case 0x3:
671 case 0x4:
672 case 0x5:
673 case 0x6:
674 case 0x7:
675 case 0x8:
676 case 0x9:
677 printf ("%d ns\n", b & 0x0F);
678 break;
679 case 0xA:
680 puts ("25 ns\n");
681 break;
682 case 0xB:
683 puts ("33 ns\n");
684 break;
685 case 0xC:
686 puts ("66 ns\n");
687 break;
688 case 0xD:
689 puts ("75 ns\n");
690 break;
691 default:
692 puts ("?? ns\n");
693 break;
694 }
695}
696
697static void decode_bits (u_char const b, char const *str[], int const do_once)
698{
699 u_char mask;
700
701 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
702 if (b & mask) {
703 puts (*str);
704 if (do_once)
705 return;
706 }
707 }
708}
wdenk81a88242002-10-26 15:22:42 +0000709
710/*
711 * Syntax:
Peter Tyser0f89c542009-04-18 22:34:03 -0500712 * i2c sdram {i2c_chip}
wdenk81a88242002-10-26 15:22:42 +0000713 */
Larry Johnson632de062008-01-11 23:26:18 -0500714int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
wdenk81a88242002-10-26 15:22:42 +0000715{
Larry Johnson632de062008-01-11 23:26:18 -0500716 enum { unknown, EDO, SDRAM, DDR2 } type;
717
wdenk81a88242002-10-26 15:22:42 +0000718 u_char chip;
719 u_char data[128];
720 u_char cksum;
721 int j;
722
Larry Johnson632de062008-01-11 23:26:18 -0500723 static const char *decode_CAS_DDR2[] = {
724 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
725 };
726
727 static const char *decode_CAS_default[] = {
728 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
729 };
730
731 static const char *decode_CS_WE_default[] = {
732 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
733 };
734
735 static const char *decode_byte21_default[] = {
736 " TBD (bit 7)\n",
737 " Redundant row address\n",
738 " Differential clock input\n",
739 " Registerd DQMB inputs\n",
740 " Buffered DQMB inputs\n",
741 " On-card PLL\n",
742 " Registered address/control lines\n",
743 " Buffered address/control lines\n"
744 };
745
746 static const char *decode_byte22_DDR2[] = {
747 " TBD (bit 7)\n",
748 " TBD (bit 6)\n",
749 " TBD (bit 5)\n",
750 " TBD (bit 4)\n",
751 " TBD (bit 3)\n",
752 " Supports partial array self refresh\n",
753 " Supports 50 ohm ODT\n",
754 " Supports weak driver\n"
755 };
756
757 static const char *decode_row_density_DDR2[] = {
758 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
759 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
760 };
761
762 static const char *decode_row_density_default[] = {
763 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
764 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
765 };
766
wdenk81a88242002-10-26 15:22:42 +0000767 if (argc < 2) {
Peter Tyser62c3ae72009-01-27 18:03:10 -0600768 cmd_usage(cmdtp);
wdenk81a88242002-10-26 15:22:42 +0000769 return 1;
770 }
771 /*
772 * Chip is always specified.
Larry Johnson632de062008-01-11 23:26:18 -0500773 */
774 chip = simple_strtoul (argv[1], NULL, 16);
wdenk81a88242002-10-26 15:22:42 +0000775
Larry Johnson632de062008-01-11 23:26:18 -0500776 if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000777 puts ("No SDRAM Serial Presence Detect found.\n");
wdenk81a88242002-10-26 15:22:42 +0000778 return 1;
779 }
780
781 cksum = 0;
782 for (j = 0; j < 63; j++) {
783 cksum += data[j];
784 }
Timur Tabie857a5b2006-11-28 12:09:35 -0600785 if (cksum != data[63]) {
wdenk81a88242002-10-26 15:22:42 +0000786 printf ("WARNING: Configuration data checksum failure:\n"
Larry Johnson632de062008-01-11 23:26:18 -0500787 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
wdenk81a88242002-10-26 15:22:42 +0000788 }
Larry Johnson632de062008-01-11 23:26:18 -0500789 printf ("SPD data revision %d.%d\n",
wdenk81a88242002-10-26 15:22:42 +0000790 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
Larry Johnson632de062008-01-11 23:26:18 -0500791 printf ("Bytes used 0x%02X\n", data[0]);
792 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
793
wdenk4b9206e2004-03-23 22:14:11 +0000794 puts ("Memory type ");
Larry Johnson632de062008-01-11 23:26:18 -0500795 switch (data[2]) {
Larry Johnson0df6b842008-01-10 22:23:39 -0500796 case 2:
797 type = EDO;
798 puts ("EDO\n");
799 break;
800 case 4:
801 type = SDRAM;
802 puts ("SDRAM\n");
803 break;
804 case 8:
805 type = DDR2;
806 puts ("DDR2\n");
807 break;
808 default:
809 type = unknown;
810 puts ("unknown\n");
811 break;
wdenk81a88242002-10-26 15:22:42 +0000812 }
Larry Johnson632de062008-01-11 23:26:18 -0500813
wdenk4b9206e2004-03-23 22:14:11 +0000814 puts ("Row address bits ");
Timur Tabie857a5b2006-11-28 12:09:35 -0600815 if ((data[3] & 0x00F0) == 0)
Larry Johnson632de062008-01-11 23:26:18 -0500816 printf ("%d\n", data[3] & 0x0F);
Timur Tabie857a5b2006-11-28 12:09:35 -0600817 else
Larry Johnson632de062008-01-11 23:26:18 -0500818 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
819
wdenk4b9206e2004-03-23 22:14:11 +0000820 puts ("Column address bits ");
Timur Tabie857a5b2006-11-28 12:09:35 -0600821 if ((data[4] & 0x00F0) == 0)
Larry Johnson632de062008-01-11 23:26:18 -0500822 printf ("%d\n", data[4] & 0x0F);
Timur Tabie857a5b2006-11-28 12:09:35 -0600823 else
Larry Johnson632de062008-01-11 23:26:18 -0500824 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500825
826 switch (type) {
827 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -0500828 printf ("Number of ranks %d\n",
829 (data[5] & 0x07) + 1);
Larry Johnson0df6b842008-01-10 22:23:39 -0500830 break;
831 default:
Larry Johnson632de062008-01-11 23:26:18 -0500832 printf ("Module rows %d\n", data[5]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500833 break;
834 }
835
836 switch (type) {
837 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -0500838 printf ("Module data width %d bits\n", data[6]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500839 break;
840 default:
Larry Johnson632de062008-01-11 23:26:18 -0500841 printf ("Module data width %d bits\n",
842 (data[7] << 8) | data[6]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500843 break;
844 }
845
wdenk4b9206e2004-03-23 22:14:11 +0000846 puts ("Interface signal levels ");
wdenk81a88242002-10-26 15:22:42 +0000847 switch(data[8]) {
Larry Johnson0df6b842008-01-10 22:23:39 -0500848 case 0: puts ("TTL 5.0 V\n"); break;
wdenk4b9206e2004-03-23 22:14:11 +0000849 case 1: puts ("LVTTL\n"); break;
Larry Johnson0df6b842008-01-10 22:23:39 -0500850 case 2: puts ("HSTL 1.5 V\n"); break;
851 case 3: puts ("SSTL 3.3 V\n"); break;
852 case 4: puts ("SSTL 2.5 V\n"); break;
853 case 5: puts ("SSTL 1.8 V\n"); break;
wdenk4b9206e2004-03-23 22:14:11 +0000854 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000855 }
Larry Johnson0df6b842008-01-10 22:23:39 -0500856
857 switch (type) {
858 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -0500859 printf ("SDRAM cycle time ");
860 print_ddr2_tcyc (data[9]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500861 break;
862 default:
Larry Johnson632de062008-01-11 23:26:18 -0500863 printf ("SDRAM cycle time %d.%d ns\n",
864 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500865 break;
866 }
867
868 switch (type) {
869 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -0500870 printf ("SDRAM access time 0.%d%d ns\n",
871 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500872 break;
873 default:
Larry Johnson632de062008-01-11 23:26:18 -0500874 printf ("SDRAM access time %d.%d ns\n",
875 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500876 break;
877 }
878
wdenk4b9206e2004-03-23 22:14:11 +0000879 puts ("EDC configuration ");
Larry Johnson632de062008-01-11 23:26:18 -0500880 switch (data[11]) {
wdenk4b9206e2004-03-23 22:14:11 +0000881 case 0: puts ("None\n"); break;
882 case 1: puts ("Parity\n"); break;
883 case 2: puts ("ECC\n"); break;
884 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000885 }
Larry Johnson632de062008-01-11 23:26:18 -0500886
Timur Tabie857a5b2006-11-28 12:09:35 -0600887 if ((data[12] & 0x80) == 0)
wdenk4b9206e2004-03-23 22:14:11 +0000888 puts ("No self refresh, rate ");
Timur Tabie857a5b2006-11-28 12:09:35 -0600889 else
wdenk4b9206e2004-03-23 22:14:11 +0000890 puts ("Self refresh, rate ");
Larry Johnson632de062008-01-11 23:26:18 -0500891
wdenk81a88242002-10-26 15:22:42 +0000892 switch(data[12] & 0x7F) {
Larry Johnson632de062008-01-11 23:26:18 -0500893 case 0: puts ("15.625 us\n"); break;
894 case 1: puts ("3.9 us\n"); break;
895 case 2: puts ("7.8 us\n"); break;
896 case 3: puts ("31.3 us\n"); break;
897 case 4: puts ("62.5 us\n"); break;
898 case 5: puts ("125 us\n"); break;
wdenk4b9206e2004-03-23 22:14:11 +0000899 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000900 }
Larry Johnson0df6b842008-01-10 22:23:39 -0500901
902 switch (type) {
903 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -0500904 printf ("SDRAM width (primary) %d\n", data[13]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500905 break;
906 default:
Larry Johnson632de062008-01-11 23:26:18 -0500907 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500908 if ((data[13] & 0x80) != 0) {
Larry Johnson632de062008-01-11 23:26:18 -0500909 printf (" (second bank) %d\n",
910 2 * (data[13] & 0x7F));
Larry Johnson0df6b842008-01-10 22:23:39 -0500911 }
912 break;
wdenk81a88242002-10-26 15:22:42 +0000913 }
Larry Johnson0df6b842008-01-10 22:23:39 -0500914
915 switch (type) {
916 case DDR2:
917 if (data[14] != 0)
Larry Johnson632de062008-01-11 23:26:18 -0500918 printf ("EDC width %d\n", data[14]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500919 break;
920 default:
921 if (data[14] != 0) {
Larry Johnson632de062008-01-11 23:26:18 -0500922 printf ("EDC width %d\n",
923 data[14] & 0x7F);
Larry Johnson0df6b842008-01-10 22:23:39 -0500924
925 if ((data[14] & 0x80) != 0) {
Larry Johnson632de062008-01-11 23:26:18 -0500926 printf (" (second bank) %d\n",
927 2 * (data[14] & 0x7F));
Larry Johnson0df6b842008-01-10 22:23:39 -0500928 }
929 }
930 break;
931 }
932
Larry Johnson632de062008-01-11 23:26:18 -0500933 if (DDR2 != type) {
934 printf ("Min clock delay, back-to-back random column addresses "
935 "%d\n", data[15]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500936 }
937
wdenk4b9206e2004-03-23 22:14:11 +0000938 puts ("Burst length(s) ");
939 if (data[16] & 0x80) puts (" Page");
940 if (data[16] & 0x08) puts (" 8");
941 if (data[16] & 0x04) puts (" 4");
942 if (data[16] & 0x02) puts (" 2");
943 if (data[16] & 0x01) puts (" 1");
944 putc ('\n');
Larry Johnson632de062008-01-11 23:26:18 -0500945 printf ("Number of banks %d\n", data[17]);
Larry Johnson0df6b842008-01-10 22:23:39 -0500946
947 switch (type) {
948 case DDR2:
949 puts ("CAS latency(s) ");
Larry Johnson632de062008-01-11 23:26:18 -0500950 decode_bits (data[18], decode_CAS_DDR2, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -0500951 putc ('\n');
952 break;
953 default:
954 puts ("CAS latency(s) ");
Larry Johnson632de062008-01-11 23:26:18 -0500955 decode_bits (data[18], decode_CAS_default, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -0500956 putc ('\n');
957 break;
958 }
959
960 if (DDR2 != type) {
961 puts ("CS latency(s) ");
Larry Johnson632de062008-01-11 23:26:18 -0500962 decode_bits (data[19], decode_CS_WE_default, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -0500963 putc ('\n');
964 }
965
966 if (DDR2 != type) {
967 puts ("WE latency(s) ");
Larry Johnson632de062008-01-11 23:26:18 -0500968 decode_bits (data[20], decode_CS_WE_default, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -0500969 putc ('\n');
970 }
971
972 switch (type) {
973 case DDR2:
974 puts ("Module attributes:\n");
975 if (data[21] & 0x80)
976 puts (" TBD (bit 7)\n");
977 if (data[21] & 0x40)
978 puts (" Analysis probe installed\n");
979 if (data[21] & 0x20)
980 puts (" TBD (bit 5)\n");
981 if (data[21] & 0x10)
982 puts (" FET switch external enable\n");
Larry Johnson632de062008-01-11 23:26:18 -0500983 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
Larry Johnson0df6b842008-01-10 22:23:39 -0500984 if (data[20] & 0x11) {
Larry Johnson632de062008-01-11 23:26:18 -0500985 printf (" %d active registers on DIMM\n",
986 (data[21] & 0x03) + 1);
Larry Johnson0df6b842008-01-10 22:23:39 -0500987 }
988 break;
989 default:
990 puts ("Module attributes:\n");
991 if (!data[21])
992 puts (" (none)\n");
Larry Johnson632de062008-01-11 23:26:18 -0500993 else
994 decode_bits (data[21], decode_byte21_default, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -0500995 break;
996 }
997
998 switch (type) {
999 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001000 decode_bits (data[22], decode_byte22_DDR2, 0);
Larry Johnson0df6b842008-01-10 22:23:39 -05001001 break;
1002 default:
1003 puts ("Device attributes:\n");
1004 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
1005 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
1006 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1007 else puts (" Upper Vcc tolerance 10%\n");
1008 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1009 else puts (" Lower Vcc tolerance 10%\n");
1010 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1011 if (data[22] & 0x04) puts (" Supports precharge all\n");
1012 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1013 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1014 break;
1015 }
1016
1017 switch (type) {
1018 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001019 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1020 print_ddr2_tcyc (data[23]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001021 break;
1022 default:
Larry Johnson632de062008-01-11 23:26:18 -05001023 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1024 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001025 break;
1026 }
1027
1028 switch (type) {
1029 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001030 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1031 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001032 break;
1033 default:
Larry Johnson632de062008-01-11 23:26:18 -05001034 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1035 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001036 break;
1037 }
1038
1039 switch (type) {
1040 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001041 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1042 print_ddr2_tcyc (data[25]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001043 break;
1044 default:
Larry Johnson632de062008-01-11 23:26:18 -05001045 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1046 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001047 break;
1048 }
1049
1050 switch (type) {
1051 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001052 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1053 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001054 break;
1055 default:
Larry Johnson632de062008-01-11 23:26:18 -05001056 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1057 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001058 break;
1059 }
1060
1061 switch (type) {
1062 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001063 printf ("Minimum row precharge %d.%02d ns\n",
1064 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
Larry Johnson0df6b842008-01-10 22:23:39 -05001065 break;
1066 default:
Larry Johnson632de062008-01-11 23:26:18 -05001067 printf ("Minimum row precharge %d ns\n", data[27]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001068 break;
1069 }
1070
1071 switch (type) {
1072 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001073 printf ("Row active to row active min %d.%02d ns\n",
1074 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
Larry Johnson0df6b842008-01-10 22:23:39 -05001075 break;
1076 default:
Larry Johnson632de062008-01-11 23:26:18 -05001077 printf ("Row active to row active min %d ns\n", data[28]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001078 break;
1079 }
1080
1081 switch (type) {
1082 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001083 printf ("RAS to CAS delay min %d.%02d ns\n",
1084 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
Larry Johnson0df6b842008-01-10 22:23:39 -05001085 break;
1086 default:
Larry Johnson632de062008-01-11 23:26:18 -05001087 printf ("RAS to CAS delay min %d ns\n", data[29]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001088 break;
1089 }
1090
Larry Johnson632de062008-01-11 23:26:18 -05001091 printf ("Minimum RAS pulse width %d ns\n", data[30]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001092
1093 switch (type) {
1094 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001095 puts ("Density of each row ");
1096 decode_bits (data[31], decode_row_density_DDR2, 1);
1097 putc ('\n');
Larry Johnson0df6b842008-01-10 22:23:39 -05001098 break;
1099 default:
Larry Johnson632de062008-01-11 23:26:18 -05001100 puts ("Density of each row ");
1101 decode_bits (data[31], decode_row_density_default, 1);
1102 putc ('\n');
Larry Johnson0df6b842008-01-10 22:23:39 -05001103 break;
1104 }
1105
1106 switch (type) {
1107 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001108 puts ("Command and Address setup ");
Larry Johnson0df6b842008-01-10 22:23:39 -05001109 if (data[32] >= 0xA0) {
Larry Johnson632de062008-01-11 23:26:18 -05001110 printf ("1.%d%d ns\n",
1111 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001112 } else {
Larry Johnson632de062008-01-11 23:26:18 -05001113 printf ("0.%d%d ns\n",
1114 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001115 }
1116 break;
1117 default:
Larry Johnson632de062008-01-11 23:26:18 -05001118 printf ("Command and Address setup %c%d.%d ns\n",
1119 (data[32] & 0x80) ? '-' : '+',
1120 (data[32] >> 4) & 0x07, data[32] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001121 break;
1122 }
1123
1124 switch (type) {
1125 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001126 puts ("Command and Address hold ");
Larry Johnson0df6b842008-01-10 22:23:39 -05001127 if (data[33] >= 0xA0) {
Larry Johnson632de062008-01-11 23:26:18 -05001128 printf ("1.%d%d ns\n",
1129 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001130 } else {
Larry Johnson632de062008-01-11 23:26:18 -05001131 printf ("0.%d%d ns\n",
1132 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001133 }
1134 break;
1135 default:
Larry Johnson632de062008-01-11 23:26:18 -05001136 printf ("Command and Address hold %c%d.%d ns\n",
1137 (data[33] & 0x80) ? '-' : '+',
1138 (data[33] >> 4) & 0x07, data[33] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001139 break;
1140 }
1141
1142 switch (type) {
1143 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001144 printf ("Data signal input setup 0.%d%d ns\n",
1145 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001146 break;
1147 default:
Larry Johnson632de062008-01-11 23:26:18 -05001148 printf ("Data signal input setup %c%d.%d ns\n",
1149 (data[34] & 0x80) ? '-' : '+',
1150 (data[34] >> 4) & 0x07, data[34] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001151 break;
1152 }
1153
1154 switch (type) {
1155 case DDR2:
Larry Johnson632de062008-01-11 23:26:18 -05001156 printf ("Data signal input hold 0.%d%d ns\n",
1157 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001158 break;
1159 default:
Larry Johnson632de062008-01-11 23:26:18 -05001160 printf ("Data signal input hold %c%d.%d ns\n",
1161 (data[35] & 0x80) ? '-' : '+',
1162 (data[35] >> 4) & 0x07, data[35] & 0x0F);
Larry Johnson0df6b842008-01-10 22:23:39 -05001163 break;
1164 }
1165
wdenk4b9206e2004-03-23 22:14:11 +00001166 puts ("Manufacturer's JEDEC ID ");
Timur Tabie857a5b2006-11-28 12:09:35 -06001167 for (j = 64; j <= 71; j++)
Larry Johnson632de062008-01-11 23:26:18 -05001168 printf ("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +00001169 putc ('\n');
Larry Johnson632de062008-01-11 23:26:18 -05001170 printf ("Manufacturing Location %02X\n", data[72]);
wdenk4b9206e2004-03-23 22:14:11 +00001171 puts ("Manufacturer's Part Number ");
Timur Tabie857a5b2006-11-28 12:09:35 -06001172 for (j = 73; j <= 90; j++)
Larry Johnson632de062008-01-11 23:26:18 -05001173 printf ("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +00001174 putc ('\n');
Larry Johnson632de062008-01-11 23:26:18 -05001175 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1176 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
wdenk4b9206e2004-03-23 22:14:11 +00001177 puts ("Assembly Serial Number ");
Timur Tabie857a5b2006-11-28 12:09:35 -06001178 for (j = 95; j <= 98; j++)
Larry Johnson632de062008-01-11 23:26:18 -05001179 printf ("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +00001180 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +00001181
Larry Johnson0df6b842008-01-10 22:23:39 -05001182 if (DDR2 != type) {
Larry Johnson632de062008-01-11 23:26:18 -05001183 printf ("Speed rating PC%d\n",
1184 data[126] == 0x66 ? 66 : data[126]);
Larry Johnson0df6b842008-01-10 22:23:39 -05001185 }
wdenk81a88242002-10-26 15:22:42 +00001186 return 0;
1187}
Jon Loeliger90253172007-07-10 11:02:44 -05001188#endif
wdenk81a88242002-10-26 15:22:42 +00001189
Heiko Schocher67b23a32008-10-15 09:39:47 +02001190#if defined(CONFIG_I2C_MUX)
1191int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1192{
1193 int ret=0;
1194
1195 if (argc == 1) {
1196 /* show all busses */
1197 I2C_MUX *mux;
1198 I2C_MUX_DEVICE *device = i2c_mux_devices;
1199
1200 printf ("Busses reached over muxes:\n");
1201 while (device != NULL) {
1202 printf ("Bus ID: %x\n", device->busid);
1203 printf (" reached over Mux(es):\n");
1204 mux = device->mux;
1205 while (mux != NULL) {
1206 printf (" %s@%x ch: %x\n", mux->name, mux->chip, mux->channel);
1207 mux = mux->next;
1208 }
1209 device = device->next;
1210 }
1211 } else {
1212 I2C_MUX_DEVICE *dev;
1213
1214 dev = i2c_mux_ident_muxstring ((uchar *)argv[1]);
1215 ret = 0;
1216 }
1217 return ret;
1218}
1219#endif /* CONFIG_I2C_MUX */
1220
Ben Warrenbb99ad62006-09-07 16:50:54 -04001221#if defined(CONFIG_I2C_MULTI_BUS)
1222int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1223{
1224 int bus_idx, ret=0;
1225
Timur Tabie857a5b2006-11-28 12:09:35 -06001226 if (argc == 1)
1227 /* querying current setting */
Ben Warrenbb99ad62006-09-07 16:50:54 -04001228 printf("Current bus is %d\n", i2c_get_bus_num());
Timur Tabie857a5b2006-11-28 12:09:35 -06001229 else {
Ben Warrenbb99ad62006-09-07 16:50:54 -04001230 bus_idx = simple_strtoul(argv[1], NULL, 10);
1231 printf("Setting bus to %d\n", bus_idx);
1232 ret = i2c_set_bus_num(bus_idx);
Timur Tabie857a5b2006-11-28 12:09:35 -06001233 if (ret)
Ben Warrenbb99ad62006-09-07 16:50:54 -04001234 printf("Failure changing bus number (%d)\n", ret);
Ben Warrenbb99ad62006-09-07 16:50:54 -04001235 }
1236 return ret;
1237}
1238#endif /* CONFIG_I2C_MULTI_BUS */
1239
1240int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1241{
1242 int speed, ret=0;
1243
Timur Tabie857a5b2006-11-28 12:09:35 -06001244 if (argc == 1)
1245 /* querying current speed */
Ben Warrenbb99ad62006-09-07 16:50:54 -04001246 printf("Current bus speed=%d\n", i2c_get_bus_speed());
Timur Tabie857a5b2006-11-28 12:09:35 -06001247 else {
Ben Warrenbb99ad62006-09-07 16:50:54 -04001248 speed = simple_strtoul(argv[1], NULL, 10);
1249 printf("Setting bus speed to %d Hz\n", speed);
1250 ret = i2c_set_bus_speed(speed);
Timur Tabie857a5b2006-11-28 12:09:35 -06001251 if (ret)
Ben Warrenbb99ad62006-09-07 16:50:54 -04001252 printf("Failure changing bus speed (%d)\n", ret);
Ben Warrenbb99ad62006-09-07 16:50:54 -04001253 }
1254 return ret;
1255}
1256
1257int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1258{
Peter Tysere96ad5d2009-04-18 22:34:04 -05001259 /* Strip off leading 'i2c' command argument */
1260 argc--;
1261 argv++;
1262
Heiko Schocher67b23a32008-10-15 09:39:47 +02001263#if defined(CONFIG_I2C_MUX)
Peter Tysere96ad5d2009-04-18 22:34:04 -05001264 if (!strncmp(argv[0], "bu", 2))
1265 return do_i2c_add_bus(cmdtp, flag, argc, argv);
Heiko Schocher67b23a32008-10-15 09:39:47 +02001266#endif /* CONFIG_I2C_MUX */
Peter Tysere96ad5d2009-04-18 22:34:04 -05001267 if (!strncmp(argv[0], "sp", 2))
1268 return do_i2c_bus_speed(cmdtp, flag, argc, argv);
Ben Warrenbb99ad62006-09-07 16:50:54 -04001269#if defined(CONFIG_I2C_MULTI_BUS)
Peter Tysere96ad5d2009-04-18 22:34:04 -05001270 if (!strncmp(argv[0], "de", 2))
1271 return do_i2c_bus_num(cmdtp, flag, argc, argv);
Ben Warrenbb99ad62006-09-07 16:50:54 -04001272#endif /* CONFIG_I2C_MULTI_BUS */
Peter Tysere96ad5d2009-04-18 22:34:04 -05001273 if (!strncmp(argv[0], "md", 2))
1274 return do_i2c_md(cmdtp, flag, argc, argv);
1275 if (!strncmp(argv[0], "mm", 2))
Peter Tyser0a45a632009-04-18 22:34:05 -05001276 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
Peter Tysere96ad5d2009-04-18 22:34:04 -05001277 if (!strncmp(argv[0], "mw", 2))
1278 return do_i2c_mw(cmdtp, flag, argc, argv);
1279 if (!strncmp(argv[0], "nm", 2))
Peter Tyser0a45a632009-04-18 22:34:05 -05001280 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
Peter Tysere96ad5d2009-04-18 22:34:04 -05001281 if (!strncmp(argv[0], "cr", 2))
1282 return do_i2c_crc(cmdtp, flag, argc, argv);
1283 if (!strncmp(argv[0], "pr", 2))
1284 return do_i2c_probe(cmdtp, flag, argc, argv);
1285 if (!strncmp(argv[0], "re", 2))
Peter Tyser0a45a632009-04-18 22:34:05 -05001286 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
1287 return 0;
Peter Tysere96ad5d2009-04-18 22:34:04 -05001288 if (!strncmp(argv[0], "lo", 2))
1289 return do_i2c_loop(cmdtp, flag, argc, argv);
Jon Loeligerc76fe472007-07-08 18:02:23 -05001290#if defined(CONFIG_CMD_SDRAM)
Peter Tysere96ad5d2009-04-18 22:34:04 -05001291 if (!strncmp(argv[0], "sd", 2))
1292 return do_sdram(cmdtp, flag, argc, argv);
Jon Loeliger90253172007-07-10 11:02:44 -05001293#endif
Ben Warrenbb99ad62006-09-07 16:50:54 -04001294 else
Peter Tyser62c3ae72009-01-27 18:03:10 -06001295 cmd_usage(cmdtp);
Ben Warrenbb99ad62006-09-07 16:50:54 -04001296 return 0;
1297}
wdenk8bde7f72003-06-27 21:31:46 +00001298
1299/***************************************************/
1300
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001301U_BOOT_CMD(
1302 i2c, 6, 1, do_i2c,
Peter Tyser2fb26042009-01-27 18:03:12 -06001303 "I2C sub-system",
Peter Tyser9bc2e4e2008-10-01 12:25:04 -05001304 "speed [speed] - show or set I2C bus speed\n"
Peter Tyser9166b772009-04-18 22:34:06 -05001305#if defined(CONFIG_I2C_MUX)
1306 "i2c bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\n"
1307#endif /* CONFIG_I2C_MUX */
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001308#if defined(CONFIG_I2C_MULTI_BUS)
Peter Tyser9bc2e4e2008-10-01 12:25:04 -05001309 "i2c dev [dev] - show or set current I2C bus\n"
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001310#endif /* CONFIG_I2C_MULTI_BUS */
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001311 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1312 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1313 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1314 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
1315 "i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
1316 "i2c probe - show devices on the I2C bus\n"
Heiko Schochere43a27c2008-10-15 09:33:30 +02001317 "i2c reset - re-init the I2C Controller\n"
Wolfgang Denka89c33d2009-05-24 17:06:54 +02001318 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device"
Jon Loeligerc76fe472007-07-08 18:02:23 -05001319#if defined(CONFIG_CMD_SDRAM)
Wolfgang Denka89c33d2009-05-24 17:06:54 +02001320 "\n"
1321 "i2c sdram chip - print SDRAM configuration information"
Jon Loeliger90253172007-07-10 11:02:44 -05001322#endif
Matthias Fuchsd9fc7032007-03-08 16:25:47 +01001323);
Heiko Schocher67b23a32008-10-15 09:39:47 +02001324
1325#if defined(CONFIG_I2C_MUX)
1326
1327int i2c_mux_add_device(I2C_MUX_DEVICE *dev)
1328{
1329 I2C_MUX_DEVICE *devtmp = i2c_mux_devices;
1330
1331 if (i2c_mux_devices == NULL) {
1332 i2c_mux_devices = dev;
1333 return 0;
1334 }
1335 while (devtmp->next != NULL)
1336 devtmp = devtmp->next;
1337
1338 devtmp->next = dev;
1339 return 0;
1340}
1341
1342I2C_MUX_DEVICE *i2c_mux_search_device(int id)
1343{
1344 I2C_MUX_DEVICE *device = i2c_mux_devices;
1345
1346 while (device != NULL) {
1347 if (device->busid == id)
1348 return device;
1349 device = device->next;
1350 }
1351 return NULL;
1352}
1353
1354/* searches in the buf from *pos the next ':'.
1355 * returns:
1356 * 0 if found (with *pos = where)
1357 * < 0 if an error occured
1358 * > 0 if the end of buf is reached
1359 */
1360static int i2c_mux_search_next (int *pos, uchar *buf, int len)
1361{
1362 while ((buf[*pos] != ':') && (*pos < len)) {
1363 *pos += 1;
1364 }
1365 if (*pos >= len)
1366 return 1;
1367 if (buf[*pos] != ':')
1368 return -1;
1369 return 0;
1370}
1371
1372static int i2c_mux_get_busid (void)
1373{
1374 int tmp = i2c_mux_busid;
1375
1376 i2c_mux_busid ++;
1377 return tmp;
1378}
1379
1380/* Analyses a Muxstring and sends immediately the
1381 Commands to the Muxes. Runs from Flash.
1382 */
1383int i2c_mux_ident_muxstring_f (uchar *buf)
1384{
1385 int pos = 0;
1386 int oldpos;
1387 int ret = 0;
1388 int len = strlen((char *)buf);
1389 int chip;
1390 uchar channel;
1391 int was = 0;
1392
1393 while (ret == 0) {
1394 oldpos = pos;
1395 /* search name */
1396 ret = i2c_mux_search_next(&pos, buf, len);
1397 if (ret != 0)
1398 printf ("ERROR\n");
1399 /* search address */
1400 pos ++;
1401 oldpos = pos;
1402 ret = i2c_mux_search_next(&pos, buf, len);
1403 if (ret != 0)
1404 printf ("ERROR\n");
1405 buf[pos] = 0;
1406 chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1407 buf[pos] = ':';
1408 /* search channel */
1409 pos ++;
1410 oldpos = pos;
1411 ret = i2c_mux_search_next(&pos, buf, len);
1412 if (ret < 0)
1413 printf ("ERROR\n");
1414 was = 0;
1415 if (buf[pos] != 0) {
1416 buf[pos] = 0;
1417 was = 1;
1418 }
1419 channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1420 if (was)
1421 buf[pos] = ':';
1422 if (i2c_write(chip, 0, 0, &channel, 1) != 0) {
1423 printf ("Error setting Mux: chip:%x channel: \
1424 %x\n", chip, channel);
1425 return -1;
1426 }
1427 pos ++;
1428 oldpos = pos;
1429
1430 }
1431
1432 return 0;
1433}
1434
1435/* Analyses a Muxstring and if this String is correct
1436 * adds a new I2C Bus.
1437 */
1438I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf)
1439{
1440 I2C_MUX_DEVICE *device;
1441 I2C_MUX *mux;
1442 int pos = 0;
1443 int oldpos;
1444 int ret = 0;
1445 int len = strlen((char *)buf);
1446 int was = 0;
1447
1448 device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE));
1449 device->mux = NULL;
1450 device->busid = i2c_mux_get_busid ();
1451 device->next = NULL;
1452 while (ret == 0) {
1453 mux = (I2C_MUX *)malloc (sizeof(I2C_MUX));
1454 mux->next = NULL;
1455 /* search name of mux */
1456 oldpos = pos;
1457 ret = i2c_mux_search_next(&pos, buf, len);
1458 if (ret != 0)
1459 printf ("%s no name.\n", __FUNCTION__);
1460 mux->name = (char *)malloc (pos - oldpos + 1);
1461 memcpy (mux->name, &buf[oldpos], pos - oldpos);
1462 mux->name[pos - oldpos] = 0;
1463 /* search address */
1464 pos ++;
1465 oldpos = pos;
1466 ret = i2c_mux_search_next(&pos, buf, len);
1467 if (ret != 0)
1468 printf ("%s no mux address.\n", __FUNCTION__);
1469 buf[pos] = 0;
1470 mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1471 buf[pos] = ':';
1472 /* search channel */
1473 pos ++;
1474 oldpos = pos;
1475 ret = i2c_mux_search_next(&pos, buf, len);
1476 if (ret < 0)
1477 printf ("%s no mux channel.\n", __FUNCTION__);
1478 was = 0;
1479 if (buf[pos] != 0) {
1480 buf[pos] = 0;
1481 was = 1;
1482 }
1483 mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1484 if (was)
1485 buf[pos] = ':';
1486 if (device->mux == NULL)
1487 device->mux = mux;
1488 else {
1489 I2C_MUX *muxtmp = device->mux;
1490 while (muxtmp->next != NULL) {
1491 muxtmp = muxtmp->next;
1492 }
1493 muxtmp->next = mux;
1494 }
1495 pos ++;
1496 oldpos = pos;
1497 }
1498 if (ret > 0) {
1499 /* Add Device */
1500 i2c_mux_add_device (device);
1501 return device;
1502 }
1503
1504 return NULL;
1505}
1506
1507int i2x_mux_select_mux(int bus)
1508{
1509 I2C_MUX_DEVICE *dev;
1510 I2C_MUX *mux;
1511
1512 if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) {
1513 /* select Default Mux Bus */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001514#if defined(CONFIG_SYS_I2C_IVM_BUS)
1515 i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS);
Heiko Schocher67b23a32008-10-15 09:39:47 +02001516#else
1517 {
1518 unsigned char *buf;
1519 buf = (unsigned char *) getenv("EEprom_ivm");
1520 if (buf != NULL)
1521 i2c_mux_ident_muxstring_f (buf);
1522 }
1523#endif
1524 return 0;
1525 }
1526 dev = i2c_mux_search_device(bus);
1527 if (dev == NULL)
1528 return -1;
1529
1530 mux = dev->mux;
1531 while (mux != NULL) {
1532 if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) {
1533 printf ("Error setting Mux: chip:%x channel: \
1534 %x\n", mux->chip, mux->channel);
1535 return -1;
1536 }
1537 mux = mux->next;
1538 }
1539 return 0;
1540}
1541#endif /* CONFIG_I2C_MUX */