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Sumit Gargd35b2112022-07-12 12:42:08 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Qualcomm Robotics RB3 Development (dragonboard845c) board device
4 * tree source
5 *
6 * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
7 */
8
9/dts-v1/;
10
Caleb Connolly7505ce12023-10-03 12:36:22 +010011#include <dt-bindings/arm/qcom,ids.h>
12
Sumit Gargd35b2112022-07-12 12:42:08 +053013#include "sdm845.dtsi"
Caleb Connolly1a7474c2023-08-15 17:36:10 +010014#include "pm8998.dtsi"
Sumit Gargd35b2112022-07-12 12:42:08 +053015
16/ {
17 model = "Thundercomm Dragonboard 845c";
18 compatible = "thundercomm,db845c", "qcom,sdm845";
Caleb Connolly7505ce12023-10-03 12:36:22 +010019 qcom,msm-id = <QCOM_ID_SDA845 0x20001>;
20 qcom,board-id = <QCOM_BOARD_ID(MTP, 0, 0) 0>;
Sumit Gargd35b2112022-07-12 12:42:08 +053021
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 aliases {
Vladimir Zapolskiy0e889a72023-04-21 20:50:41 +030027 serial0 = &uart9;
Sumit Gargd35b2112022-07-12 12:42:08 +053028 };
29
Caleb Connolly1a7474c2023-08-15 17:36:10 +010030 memory@80000000 {
Sumit Gargd35b2112022-07-12 12:42:08 +053031 device_type = "memory";
32 reg = <0 0x80000000 0 0xfdfa0000>;
33 };
Caleb Connolly32581492023-09-12 16:14:21 +010034
Caleb Connolly58e32772023-10-03 12:49:15 +010035 smbios {
36 compatible = "u-boot,sysinfo-smbios";
37
38 smbios {
39 system {
40 manufacturer = "Qualcomm Technologies, Inc.";
41 product = "Qualcomm Robotics Dragonboard 845c";
42 };
43
44 baseboard {
45 manufacturer = "Thundercomm";
46 product = "TurboX-845-SoM";
47 };
48 };
49 };
50
Caleb Connolly32581492023-09-12 16:14:21 +010051 pcie_usb_dual_pwr: vldo-3v3-regulator {
52 compatible = "regulator-gpio";
53 regulator-name = "VLDO_3V3";
54
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
57
58 enable-gpios = <&tlmm 90 GPIO_ACTIVE_HIGH>;
59 enable-active-high;
60 states = <0 0>, <1800000 1>;
61 };
Caleb Connollyebad4042023-10-17 13:46:15 +010062
63 gpio-keys {
64 compatible = "gpio-keys";
65
66 key-vol-up {
67 label = "Volume Up";
68 linux,code = <KEY_UP>;
69 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_LOW>;
70 };
71 };
Sumit Gargd35b2112022-07-12 12:42:08 +053072};
73
Caleb Connolly5df679a2023-11-30 16:13:50 +000074&pm8998_resin {
75 status = "okay";
76};
77
Caleb Connollye8b00492023-12-04 17:35:32 +000078&sdhc_2 {
79 status = "okay";
80
81 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
82 <&gcc GCC_SDCC2_APPS_CLK>;
83 clock-names = "iface", "core";
84
85 clock-frequency = <200000000>;
86
87 bus-width = <4>;
88 non-removable;
89};
90
Caleb Connolly1a7474c2023-08-15 17:36:10 +010091&uart9 {
92 status = "okay";
93};
Caleb Connolly32581492023-09-12 16:14:21 +010094
Caleb Connollyff0a7b42023-10-03 12:48:21 +010095&ufs_mem_hc {
96 status = "okay";
97};
98
99&ufs_mem_phy {
100 status = "okay";
101};
102
Caleb Connolly6d159ed2023-12-04 15:12:07 +0000103&usb_1 {
104 status = "okay";
105 qcom,select-utmi-as-pipe-clk;
106};
107
108&usb_1_dwc3 {
109 dr_mode = "peripheral";
110
111 /* We don't support superspeed in u-boot so remove the SSPHY */
112 phys = <&usb_1_hsphy>;
113 phy-names = "usb2-phy";
114
115 /* fastest mode for USB 2 */
116 maximum-speed = "high-speed";
117};
118
119&usb_1_hsphy {
120 /* Remove ref clk because rmphcc isn't available */
121 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
122 clock-names = "cfg_ahb";
123
124 status = "okay";
125};
126
Caleb Connolly32581492023-09-12 16:14:21 +0100127&usb_2 {
128 status = "okay";
129 qcom,select-utmi-as-pipe-clk;
130};
131
132&usb_2_dwc3 {
133 dr_mode = "host";
134
135 /* We don't support superspeed in u-boot so remove the SSPHY */
136 phys = <&usb_2_hsphy>;
137 phy-names = "usb2-phy";
138
139 /* fastest mode for USB 2 */
140 maximum-speed = "high-speed";
141
142 vbus-supply = <&pcie_usb_dual_pwr>;
143};
144
145&usb_2_hsphy {
146 /* Remove ref clk because rmphcc isn't available */
147 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
148 clock-names = "cfg_ahb";
149
150 status = "okay";
151};