Blame - include/configs/lager.h - platform/external/u-boot

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Nobuhiro Iwamatsu	f4ec452	2013-11-21 17:06:46 +0900	[diff] [blame]	1	/*
				2	* include/configs/lager.h
				3	* This file is lager board configuration.
				4	*
Nobuhiro Iwamatsu	5ca6dfe	2014-11-10 14:34:07 +0900	[diff] [blame]	5	* Copyright (C) 2013, 2014 Renesas Electronics Corporation
Nobuhiro Iwamatsu	f4ec452	2013-11-21 17:06:46 +0900	[diff] [blame]	6	*
				7	* SPDX-License-Identifier: GPL-2.0
				8	*/
				9
				10	#ifndef __LAGER_H
				11	#define __LAGER_H
				12
				13	#undef DEBUG
Nobuhiro Iwamatsu	1cc95f6	2015-10-10 05:58:28 +0900	[diff] [blame]	14	#define CONFIG_ARCH_RMOBILE_BOARD_STRING "Lager"
Nobuhiro Iwamatsu	f4ec452	2013-11-21 17:06:46 +0900	[diff] [blame]	15
Nobuhiro Iwamatsu	5ca6dfe	2014-11-10 14:34:07 +0900	[diff] [blame]	16	#include "rcar-gen2-common.h"
Nobuhiro Iwamatsu	d80149b	2014-03-31 15:22:31 +0900	[diff] [blame]	17
Marek Vasut	e6027e6	2018-04-23 20:24:06 +0200	[diff] [blame^]	18	#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
				19	#define STACK_AREA_SIZE 0x00100000
				20	#define LOW_LEVEL_MERAM_STACK \
Nobuhiro Iwamatsu	f4ec452	2013-11-21 17:06:46 +0900	[diff] [blame]	21	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
				22
				23	/* MEMORY */
Nobuhiro Iwamatsu	5ca6dfe	2014-11-10 14:34:07 +0900	[diff] [blame]	24	#define RCAR_GEN2_SDRAM_BASE 0x40000000
				25	#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
				26	#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
Nobuhiro Iwamatsu	f4ec452	2013-11-21 17:06:46 +0900	[diff] [blame]	27
				28	/* SCIF */
Nobuhiro Iwamatsu	f4ec452	2013-11-21 17:06:46 +0900	[diff] [blame]	29
Marek Vasut	e6027e6	2018-04-23 20:24:06 +0200	[diff] [blame^]	30	/* FLASH */
Nobuhiro Iwamatsu	0e05b21	2014-01-08 10:32:22 +0900	[diff] [blame]	31	#define CONFIG_SPI
Nobuhiro Iwamatsu	0e05b21	2014-01-08 10:32:22 +0900	[diff] [blame]	32
Nobuhiro Iwamatsu	23565c6	2013-10-20 20:28:24 +0900	[diff] [blame]	33	/* SH Ether */
Nobuhiro Iwamatsu	23565c6	2013-10-20 20:28:24 +0900	[diff] [blame]	34	#define CONFIG_SH_ETHER_USE_PORT 0
				35	#define CONFIG_SH_ETHER_PHY_ADDR 0x1
				36	#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
Nobuhiro Iwamatsu	23565c6	2013-10-20 20:28:24 +0900	[diff] [blame]	37	#define CONFIG_SH_ETHER_CACHE_WRITEBACK
				38	#define CONFIG_SH_ETHER_CACHE_INVALIDATE
Marek Vasut	e6027e6	2018-04-23 20:24:06 +0200	[diff] [blame^]	39	#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
Nobuhiro Iwamatsu	23565c6	2013-10-20 20:28:24 +0900	[diff] [blame]	40	#define CONFIG_BITBANGMII
				41	#define CONFIG_BITBANGMII_MULTI
				42
Nobuhiro Iwamatsu	f4ec452	2013-11-21 17:06:46 +0900	[diff] [blame]	43	/* Board Clock */
Nobuhiro Iwamatsu	b1f78a2	2014-03-31 14:03:07 +0900	[diff] [blame]	44	#define RMOBILE_XTAL_CLK 20000000u
				45	#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
Marek Vasut	e6027e6	2018-04-23 20:24:06 +0200	[diff] [blame^]	46	#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
Nobuhiro Iwamatsu	f4ec452	2013-11-21 17:06:46 +0900	[diff] [blame]	47
				48	#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu	f4ec452	2013-11-21 17:06:46 +0900	[diff] [blame]	49
Marek Vasut	e6027e6	2018-04-23 20:24:06 +0200	[diff] [blame^]	50	#define CONFIG_EXTRA_ENV_SETTINGS \
				51	"fdt_high=0xffffffff\0" \
				52	"initrd_high=0xffffffff\0"
Nobuhiro Iwamatsu	5c4bb96	2014-03-27 14:14:58 +0900	[diff] [blame]	53
Marek Vasut	e6027e6	2018-04-23 20:24:06 +0200	[diff] [blame^]	54	/* SPL support */
				55	#define CONFIG_SPL_TEXT_BASE 0xe6300000
				56	#define CONFIG_SPL_STACK 0xe6340000
				57	#define CONFIG_SPL_MAX_SIZE 0x4000
				58	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
				59	#ifdef CONFIG_SPL_BUILD
				60	#define CONFIG_CONS_SCIF0
				61	#define CONFIG_SH_SCIF_CLK_FREQ 65000000
				62	#endif
Nobuhiro Iwamatsu	acdfecb	2014-11-21 10:19:32 +0900	[diff] [blame]	63
Nobuhiro Iwamatsu	f4ec452	2013-11-21 17:06:46 +0900	[diff] [blame]	64	#endif /* __LAGER_H */