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wdenk232c1502004-03-12 00:14:09 +00001/*
2 * (C) Copyright 2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23#ifndef __CONFIG_H
24#define __CONFIG_H
25
26/*
wdenk232c1502004-03-12 00:14:09 +000027 * High Level Configuration Options
28 * (easy to change)
29 */
30#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
31#define CONFIG_OMAP 1 /* in a TI OMAP core */
32#define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */
33#define CONFIG_OMAP_SX1 1 /* a SX1 Board */
34
35/* input clock of PLL */
36#define CONFIG_SYS_CLK_FREQ 12000000 /* the SX1 has 12MHz input clock */
37
wdenk232c1502004-03-12 00:14:09 +000038#define CONFIG_MISC_INIT_R
39
40#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
41#define CONFIG_SETUP_MEMORY_TAGS 1
42#define CONFIG_INITRD_TAG 1
43
44/*
45 * Size of malloc() pool
46 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020047#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
wdenk232c1502004-03-12 00:14:09 +000048
49/*
50 * Hardware drivers
51 */
52
53/*
54 * NS16550 Configuration
55 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020056#define CONFIG_SYS_NS16550
57#define CONFIG_SYS_NS16550_SERIAL
58#define CONFIG_SYS_NS16550_REG_SIZE (-4)
59#define CONFIG_SYS_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */
60#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
wdenk232c1502004-03-12 00:14:09 +000061
62/*
63 * select serial console configuration
64 */
65#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SX1 */
66
67/*
68 * USB device configuration
69 */
70#define CONFIG_USB_DEVICE 1
71#define CONFIG_USB_TTY 1
72
73#define CONFIG_USBD_VENDORID 0x1234
74#define CONFIG_USBD_PRODUCTID 0x5678
75#define CONFIG_USBD_MANUFACTURER "Siemens"
76#define CONFIG_USBD_PRODUCT_NAME "SX1"
wdenk232c1502004-03-12 00:14:09 +000077
78/*
79 * I2C configuration
80 */
81#define CONFIG_HARD_I2C
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_I2C_SPEED 100000
83#define CONFIG_SYS_I2C_SLAVE 1
wdenk232c1502004-03-12 00:14:09 +000084#define CONFIG_DRIVER_OMAP1510_I2C
85
86#define CONFIG_ENV_OVERWRITE
87
88#define CONFIG_ENV_OVERWRITE
89#define CONFIG_CONS_INDEX 1
90#define CONFIG_BAUDRATE 115200
wdenk232c1502004-03-12 00:14:09 +000091
Jon Loeligerfe7f7822007-07-08 15:02:44 -050092/*
Jon Loeligera1aa0bb2007-07-10 09:22:23 -050093 * BOOTP options
94 */
95#define CONFIG_BOOTP_BOOTFILESIZE
96#define CONFIG_BOOTP_BOOTPATH
97#define CONFIG_BOOTP_GATEWAY
98#define CONFIG_BOOTP_HOSTNAME
99
100
101/*
Jon Loeligerfe7f7822007-07-08 15:02:44 -0500102 * Command line configuration.
103 */
104#include <config_cmd_default.h>
105
106#define CONFIG_CMD_I2C
107
108#undef CONFIG_CMD_NET
109
110
wdenk232c1502004-03-12 00:14:09 +0000111#include <configs/omap1510.h>
112
wdenk232c1502004-03-12 00:14:09 +0000113#define CONFIG_BOOTARGS "mem=16M console=ttyS0,115200n8 root=/dev/mtdblock3 rw"
Jean-Christophe PLAGNIOL-VILLARD47fd3bf2009-01-28 21:58:03 +0100114#ifdef CONFIG_STDOUT_USBTTY
wdenk6629d2f2004-03-12 15:38:25 +0000115#define CONFIG_PREBOOT "setenv stdout usbtty;setenv stdin usbtty"
Jean-Christophe PLAGNIOL-VILLARD47fd3bf2009-01-28 21:58:03 +0100116#endif
wdenk232c1502004-03-12 00:14:09 +0000117
118/*
119 * Miscellaneous configurable options
120 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200121#define CONFIG_SYS_LONGHELP /* undef to save memory */
122#define CONFIG_SYS_PROMPT "SX1# " /* Monitor Command Prompt */
123#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
124#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
125#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
126#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk232c1502004-03-12 00:14:09 +0000127
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200128#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
129#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
wdenk232c1502004-03-12 00:14:09 +0000130
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
wdenk232c1502004-03-12 00:14:09 +0000132
Ladislav Michl3791a112009-04-22 01:12:04 +0200133/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
wdenk232c1502004-03-12 00:14:09 +0000134 * This time is further subdivided by a local divisor.
135 */
Ladislav Michl81472d82009-03-30 18:58:41 +0200136#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */
Ladislav Michl3791a112009-04-22 01:12:04 +0200137#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
138#define CONFIG_SYS_HZ 1000
wdenk232c1502004-03-12 00:14:09 +0000139
140/*-----------------------------------------------------------------------
wdenk232c1502004-03-12 00:14:09 +0000141 * Physical Memory Map
142 */
143#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
144#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
145#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
146
147#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
148#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
149
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
wdenk232c1502004-03-12 00:14:09 +0000151
152/*-----------------------------------------------------------------------
153 * FLASH and environment organization
Jean-Christophe PLAGNIOL-VILLARD4e690872009-01-28 21:58:04 +0100154 * V1
155 * PHYS_FLASH_SIZE_1 (16 << 10) 16 MB
156 * PHYS_FLASH_SIZE_2 (8 << 10) 8 MB
157 * V2 only 1 flash
158 * PHYS_FLASH_SIZE_1 (32 << 10) 32 MB
wdenk232c1502004-03-12 00:14:09 +0000159 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
wdenk656658d2004-10-10 22:16:06 +0000161#define PHYS_FLASH_SECT_SIZE (128*1024) /* Size of a sector (128kB) */
Jean-Christophe PLAGNIOL-VILLARD4e690872009-01-28 21:58:04 +0100162#define CONFIG_SYS_MAX_FLASH_SECT (256) /* max number of sectors on one chip */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */
164#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
165#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */
Jean-Christophe PLAGNIOL-VILLARDf877f222009-01-28 21:58:03 +0100166#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, PHYS_FLASH_2 }
wdenk656658d2004-10-10 22:16:06 +0000167
168/*-----------------------------------------------------------------------
169 * FLASH driver setup
170 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200172#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
174#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
wdenk232c1502004-03-12 00:14:09 +0000175
176/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
178#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenk232c1502004-03-12 00:14:09 +0000179
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200180#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200181#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
182#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Total Size of Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183#define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */
wdenk232c1502004-03-12 00:14:09 +0000184
wdenk6629d2f2004-03-12 15:38:25 +0000185/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200186#define CONFIG_ENV_SIZE_REDUND 0x20000
187#define CONFIG_ENV_OFFSET_REDUND 0x40000
wdenk6629d2f2004-03-12 15:38:25 +0000188
wdenk232c1502004-03-12 00:14:09 +0000189#endif /* __CONFIG_H */