Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / e6672392e79887f15ede2f594c69fd95d7c9ade2 / . / include / dm / uclass-id.h
blob: eb78c4dac485ac7a5bbe901b83b009ff827db278 [file] [log] [blame]
Simon Glass6494d702014-02-26 15:59:18 -0700[diff] [blame]1/*
2 * Copyright (c) 2013 Google, Inc
3 *
4 * (C) Copyright 2012
5 * Pavel Herrmann <morpheus.ibis@gmail.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef _DM_UCLASS_ID_H
11#define _DM_UCLASS_ID_H
12
13/* TODO(sjg@chromium.org): this could be compile-time generated */
14enum uclass_id {
15 /* These are used internally by driver model */
16 UCLASS_ROOT = 0,
17 UCLASS_DEMO,
18 UCLASS_TEST,
19 UCLASS_TEST_FDT,
Simon Glass1ca7e202014-07-23 06:55:18 -0600[diff] [blame]20 UCLASS_TEST_BUS,
Simon Glassc60e1f22014-10-13 23:41:53 -0600[diff] [blame]21 UCLASS_SPI_EMUL, /* sandbox SPI device emulator */
Simon Glassc70c71d2014-12-10 08:55:49 -0700[diff] [blame]22 UCLASS_I2C_EMUL, /* sandbox I2C device emulator */
Simon Glass36d0d3b2015-03-05 12:25:28 -0700[diff] [blame]23 UCLASS_PCI_EMUL, /* sandbox PCI device emulator */
Simon Glass019808f2015-03-25 12:22:37 -0600[diff] [blame]24 UCLASS_USB_EMUL, /* sandbox USB bus device emulator */
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]25 UCLASS_SIMPLE_BUS, /* bus with child devices */
Simon Glass6494d702014-02-26 15:59:18 -0700[diff] [blame]26
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]27 /* U-Boot uclasses start here - in alphabetical order */
Przemyslaw Marczak5decbf52015-10-27 13:08:00 +0100[diff] [blame]28 UCLASS_ADC, /* Analog-to-digital converter */
Simon Glassa2196392016-05-01 11:35:52 -0600[diff] [blame]29 UCLASS_AHCI, /* SATA disk controller */
Simon Glass09d71aa2016-02-29 15:25:55 -0700[diff] [blame]30 UCLASS_BLK, /* Block device */
Simon Glassf26c8a82015-06-23 15:39:15 -0600[diff] [blame]31 UCLASS_CLK, /* Clock source, e.g. used by peripherals */
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]32 UCLASS_CPU, /* CPU, typically part of an SoC */
33 UCLASS_CROS_EC, /* Chrome OS EC */
Simon Glass2dcf1432016-01-21 19:45:00 -0700[diff] [blame]34 UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
Mugunthan V Na0594ce2016-02-15 15:31:37 +0530[diff] [blame]35 UCLASS_DMA, /* Direct Memory Access */
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]36 UCLASS_ETH, /* Ethernet device */
Simon Glass0040b942014-07-23 06:55:17 -0600[diff] [blame]37 UCLASS_GPIO, /* Bank of general-purpose I/O pins */
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]38 UCLASS_I2C, /* I2C bus */
39 UCLASS_I2C_EEPROM, /* I2C EEPROM device */
40 UCLASS_I2C_GENERIC, /* Generic I2C device */
Simon Glass3d1957f2015-08-03 08:19:21 -0600[diff] [blame]41 UCLASS_I2C_MUX, /* I2C multiplexer */
Simon Glasse76187a2016-01-19 21:32:25 -0700[diff] [blame]42 UCLASS_IRQ, /* Interrupt controller */
Simon Glass34ab37e2015-09-08 11:15:11 -0600[diff] [blame]43 UCLASS_KEYBOARD, /* Keyboard input device */
Simon Glass59171122015-06-23 15:38:45 -0600[diff] [blame]44 UCLASS_LED, /* Light-emitting diode (LED) */
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]45 UCLASS_LPC, /* x86 'low pin count' interface */
Stephen Warren62389352016-05-13 15:50:29 -0600[diff] [blame]46 UCLASS_MAILBOX, /* Mailbox controller */
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]47 UCLASS_MASS_STORAGE, /* Mass storage device */
Thomas Chou4395e062015-10-07 20:20:51 +0800[diff] [blame]48 UCLASS_MISC, /* Miscellaneous device */
Simon Glasse7ecf7c2015-06-23 15:38:48 -0600[diff] [blame]49 UCLASS_MMC, /* SD / MMC card or chip */
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]50 UCLASS_MOD_EXP, /* RSA Mod Exp device */
Thomas Choud8587992015-11-07 14:20:31 +0800[diff] [blame]51 UCLASS_MTD, /* Memory Technology Device (MTD) device */
Simon Glass55447572016-01-17 16:11:14 -0700[diff] [blame]52 UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */
Simon Glassf563dc12016-01-21 19:44:58 -0700[diff] [blame]53 UCLASS_PANEL, /* Display panel, such as an LCD */
Simon Glass363bf772016-01-21 19:44:56 -0700[diff] [blame]54 UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]55 UCLASS_PCH, /* x86 platform controller hub */
56 UCLASS_PCI, /* PCI bus */
57 UCLASS_PCI_GENERIC, /* Generic PCI bus device */
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900[diff] [blame]58 UCLASS_PINCONFIG, /* Pin configuration node device */
Bin Meng6f0e7a32016-06-22 02:29:47 -0700[diff] [blame]59 UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */
Simon Glass4e389362015-05-22 15:42:14 -0600[diff] [blame]60 UCLASS_PMIC, /* PMIC I/O device */
Simon Glassfc760cb2016-01-21 19:44:54 -0700[diff] [blame]61 UCLASS_PWM, /* Pulse-width modulator */
Stephen Warren61f5ddc2016-07-13 13:45:31 -0600[diff] [blame]62 UCLASS_POWER_DOMAIN, /* (SoC) Power domains */
Simon Glass5fd6bad2016-01-21 19:43:31 -0700[diff] [blame]63 UCLASS_PWRSEQ, /* Power sequence device */
Bin Meng6f0e7a32016-06-22 02:29:47 -0700[diff] [blame]64 UCLASS_RAM, /* RAM controller */
Simon Glass4e389362015-05-22 15:42:14 -0600[diff] [blame]65 UCLASS_REGULATOR, /* Regulator device */
Nishanth Menonddf56bc2015-09-17 15:42:39 -0500[diff] [blame]66 UCLASS_REMOTEPROC, /* Remote Processor device */
Stephen Warren89c1e2d2016-06-17 09:43:58 -0600[diff] [blame]67 UCLASS_RESET, /* Reset controller device */
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]68 UCLASS_RTC, /* Real time clock device */
Simon Glass57d92752014-09-04 16:27:26 -0600[diff] [blame]69 UCLASS_SERIAL, /* Serial UART */
Simon Glassd7af6a42014-10-13 23:41:52 -0600[diff] [blame]70 UCLASS_SPI, /* SPI bus */
Mateusz Kulikowski04868b42016-03-31 23:12:27 +0200[diff] [blame]71 UCLASS_SPMI, /* System Power Management Interface bus */
Simon Glass4c2dbef2014-10-13 23:42:06 -0600[diff] [blame]72 UCLASS_SPI_FLASH, /* SPI flash */
Simon Glass4e389362015-05-22 15:42:14 -0600[diff] [blame]73 UCLASS_SPI_GENERIC, /* Generic SPI flash target */
Simon Glass57251282015-06-23 15:38:43 -0600[diff] [blame]74 UCLASS_SYSCON, /* System configuration device */
Stephen Warren11636252016-05-12 12:03:35 -0600[diff] [blame]75 UCLASS_SYSRESET, /* System reset device */
Ye.Lie3568d22014-11-20 21:14:13 +0800[diff] [blame]76 UCLASS_THERMAL, /* Thermal sensor */
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800[diff] [blame]77 UCLASS_TIMER, /* Timer device */
Simon Glassf255d312015-08-22 18:31:31 -0600[diff] [blame]78 UCLASS_TPM, /* Trusted Platform Module TIS interface */
Simon Glassde312132015-03-25 12:21:59 -0600[diff] [blame]79 UCLASS_USB, /* USB bus */
Simon Glass449230f2015-03-25 12:22:31 -0600[diff] [blame]80 UCLASS_USB_DEV_GENERIC, /* USB generic device */
Simon Glass3d7cf412015-04-14 21:03:19 -0600[diff] [blame]81 UCLASS_USB_HUB, /* USB hub */
Simon Glass1acafc72016-01-18 19:52:15 -0700[diff] [blame]82 UCLASS_VIDEO, /* Video or LCD device */
Simon Glass801ab9e2015-07-02 18:16:08 -0600[diff] [blame]83 UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */
Simon Glass83510762016-01-18 19:52:17 -0700[diff] [blame]84 UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */
Simon Glass6494d702014-02-26 15:59:18 -0700[diff] [blame]85
Simon Glass6494d702014-02-26 15:59:18 -0700[diff] [blame]86 UCLASS_COUNT,
87 UCLASS_INVALID = -1,
88};
89
90#endif