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wdenk38635852002-08-27 05:55:31 +00001/*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
d4f5c722005-08-12 21:16:13 +020025/*
26 * Support for read and write access to EEPROM like memory devices. This
27 * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
28 * FRAM devices read and write data at bus speed. In particular, there is no
29 * write delay. Also, there is no limit imposed on the numer of bytes that can
30 * be transferred with a single read or write.
Wolfgang Denk6617aae2005-08-19 00:46:54 +020031 *
d4f5c722005-08-12 21:16:13 +020032 * Use the following configuration options to ensure no unneeded performance
33 * degradation (typical for EEPROM) is incured for FRAM memory:
Wolfgang Denk6617aae2005-08-19 00:46:54 +020034 *
d4f5c722005-08-12 21:16:13 +020035 * #define CFG_I2C_FRAM
36 * #undef CFG_EEPROM_PAGE_WRITE_DELAY_MS
37 *
38 */
39
wdenk38635852002-08-27 05:55:31 +000040#include <common.h>
41#include <config.h>
42#include <command.h>
43#include <i2c.h>
44
45#if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)
46
47extern void eeprom_init (void);
48extern int eeprom_read (unsigned dev_addr, unsigned offset,
49 uchar *buffer, unsigned cnt);
50extern int eeprom_write (unsigned dev_addr, unsigned offset,
51 uchar *buffer, unsigned cnt);
Stefan Roese98f4a3d2005-09-22 09:04:17 +020052#if defined(CFG_EEPROM_WREN)
53extern int eeprom_write_enable (unsigned dev_addr, int state);
54#endif
wdenk38635852002-08-27 05:55:31 +000055#endif
56
57
58#if defined(CFG_EEPROM_X40430)
59 /* Maximum number of times to poll for acknowledge after write */
60#define MAX_ACKNOWLEDGE_POLLS 10
61#endif
62
63/* ------------------------------------------------------------------------- */
64
65#if (CONFIG_COMMANDS & CFG_CMD_EEPROM)
66int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
67{
68 const char *const fmt =
69 "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
70
71#if defined(CFG_I2C_MULTI_EEPROMS)
72 if (argc == 6) {
73 ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
74 ulong addr = simple_strtoul (argv[3], NULL, 16);
75 ulong off = simple_strtoul (argv[4], NULL, 16);
76 ulong cnt = simple_strtoul (argv[5], NULL, 16);
77#else
78 if (argc == 5) {
79 ulong dev_addr = CFG_DEF_EEPROM_ADDR;
80 ulong addr = simple_strtoul (argv[2], NULL, 16);
81 ulong off = simple_strtoul (argv[3], NULL, 16);
82 ulong cnt = simple_strtoul (argv[4], NULL, 16);
83#endif /* CFG_I2C_MULTI_EEPROMS */
84
85# ifndef CONFIG_SPI
86 eeprom_init ();
87# endif /* !CONFIG_SPI */
88
89 if (strcmp (argv[1], "read") == 0) {
90 int rcode;
91
92 printf (fmt, dev_addr, argv[1], addr, off, cnt);
93
94 rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
95
wdenk4b9206e2004-03-23 22:14:11 +000096 puts ("done\n");
wdenk38635852002-08-27 05:55:31 +000097 return rcode;
98 } else if (strcmp (argv[1], "write") == 0) {
99 int rcode;
100
101 printf (fmt, dev_addr, argv[1], addr, off, cnt);
102
103 rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
104
wdenk4b9206e2004-03-23 22:14:11 +0000105 puts ("done\n");
wdenk38635852002-08-27 05:55:31 +0000106 return rcode;
107 }
108 }
109
110 printf ("Usage:\n%s\n", cmdtp->usage);
111 return 1;
112}
113#endif /* CFG_CMD_EEPROM */
114
115/*-----------------------------------------------------------------------
116 *
117 * for CFG_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
118 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
119 *
120 * for CFG_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
121 * 0x00000nxx for EEPROM address selectors and page number at n.
122 */
123
124#if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)
125
126#ifndef CONFIG_SPI
127#if !defined(CFG_I2C_EEPROM_ADDR_LEN) || CFG_I2C_EEPROM_ADDR_LEN < 1 || CFG_I2C_EEPROM_ADDR_LEN > 2
128#error CFG_I2C_EEPROM_ADDR_LEN must be 1 or 2
129#endif
130#endif
131
132int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
133{
134 unsigned end = offset + cnt;
135 unsigned blk_off;
136 int rcode = 0;
137
138 /* Read data until done or would cross a page boundary.
139 * We must write the address again when changing pages
140 * because the next page may be in a different device.
141 */
142 while (offset < end) {
d4f5c722005-08-12 21:16:13 +0200143 unsigned alen, len;
144#if !defined(CFG_I2C_FRAM)
145 unsigned maxlen;
146#endif
147
wdenk38635852002-08-27 05:55:31 +0000148#if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
149 uchar addr[2];
150
151 blk_off = offset & 0xFF; /* block offset */
152
153 addr[0] = offset >> 8; /* block number */
154 addr[1] = blk_off; /* block offset */
155 alen = 2;
156#else
157 uchar addr[3];
158
159 blk_off = offset & 0xFF; /* block offset */
160
161 addr[0] = offset >> 16; /* block number */
162 addr[1] = offset >> 8; /* upper address octet */
163 addr[2] = blk_off; /* lower address octet */
164 alen = 3;
165#endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
166
167 addr[0] |= dev_addr; /* insert device address */
168
d4f5c722005-08-12 21:16:13 +0200169 len = end - offset;
170
171 /*
172 * For a FRAM device there is no limit on the number of the
173 * bytes that can be ccessed with the single read or write
174 * operation.
175 */
176#if !defined(CFG_I2C_FRAM)
wdenk38635852002-08-27 05:55:31 +0000177 maxlen = 0x100 - blk_off;
178 if (maxlen > I2C_RXTX_LEN)
179 maxlen = I2C_RXTX_LEN;
wdenk38635852002-08-27 05:55:31 +0000180 if (len > maxlen)
181 len = maxlen;
d4f5c722005-08-12 21:16:13 +0200182#endif
183
wdenk38635852002-08-27 05:55:31 +0000184#ifdef CONFIG_SPI
185 spi_read (addr, alen, buffer, len);
186#else
187 if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0)
188 rcode = 1;
189#endif
190 buffer += len;
191 offset += len;
192 }
d4f5c722005-08-12 21:16:13 +0200193
wdenk38635852002-08-27 05:55:31 +0000194 return rcode;
195}
196
197/*-----------------------------------------------------------------------
198 *
199 * for CFG_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
200 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
201 *
202 * for CFG_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
203 * 0x00000nxx for EEPROM address selectors and page number at n.
204 */
205
206int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
207{
208 unsigned end = offset + cnt;
209 unsigned blk_off;
210 int rcode = 0;
211
212#if defined(CFG_EEPROM_X40430)
213 uchar contr_r_addr[2];
214 uchar addr_void[2];
215 uchar contr_reg[2];
216 uchar ctrl_reg_v;
217 int i;
218#endif
219
Stefan Roese98f4a3d2005-09-22 09:04:17 +0200220#if defined(CFG_EEPROM_WREN)
221 eeprom_write_enable (dev_addr,1);
222#endif
wdenk38635852002-08-27 05:55:31 +0000223 /* Write data until done or would cross a write page boundary.
224 * We must write the address again when changing pages
225 * because the address counter only increments within a page.
226 */
227
228 while (offset < end) {
d4f5c722005-08-12 21:16:13 +0200229 unsigned alen, len;
230#if !defined(CFG_I2C_FRAM)
231 unsigned maxlen;
232#endif
233
wdenk38635852002-08-27 05:55:31 +0000234#if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
235 uchar addr[2];
236
237 blk_off = offset & 0xFF; /* block offset */
238
239 addr[0] = offset >> 8; /* block number */
240 addr[1] = blk_off; /* block offset */
241 alen = 2;
242#else
243 uchar addr[3];
244
245 blk_off = offset & 0xFF; /* block offset */
246
247 addr[0] = offset >> 16; /* block number */
248 addr[1] = offset >> 8; /* upper address octet */
249 addr[2] = blk_off; /* lower address octet */
250 alen = 3;
251#endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
252
253 addr[0] |= dev_addr; /* insert device address */
254
d4f5c722005-08-12 21:16:13 +0200255 len = end - offset;
256
257 /*
258 * For a FRAM device there is no limit on the number of the
259 * bytes that can be ccessed with the single read or write
260 * operation.
261 */
262#if !defined(CFG_I2C_FRAM)
263
wdenk38635852002-08-27 05:55:31 +0000264#if defined(CFG_EEPROM_PAGE_WRITE_BITS)
265
266#define EEPROM_PAGE_SIZE (1 << CFG_EEPROM_PAGE_WRITE_BITS)
267#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
268
269 maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
270#else
271 maxlen = 0x100 - blk_off;
272#endif
273 if (maxlen > I2C_RXTX_LEN)
274 maxlen = I2C_RXTX_LEN;
275
wdenk38635852002-08-27 05:55:31 +0000276 if (len > maxlen)
277 len = maxlen;
d4f5c722005-08-12 21:16:13 +0200278#endif
279
wdenk38635852002-08-27 05:55:31 +0000280#ifdef CONFIG_SPI
281 spi_write (addr, alen, buffer, len);
282#else
283#if defined(CFG_EEPROM_X40430)
284 /* Get the value of the control register.
285 * Set current address (internal pointer in the x40430)
286 * to 0x1ff.
287 */
288 contr_r_addr[0] = 9;
289 contr_r_addr[1] = 0xff;
290 addr_void[0] = 0;
291 addr_void[1] = addr[1];
292#ifdef CFG_I2C_EEPROM_ADDR
293 contr_r_addr[0] |= CFG_I2C_EEPROM_ADDR;
294 addr_void[0] |= CFG_I2C_EEPROM_ADDR;
295#endif
296 contr_reg[0] = 0xff;
297 if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
298 rcode = 1;
299 }
300 ctrl_reg_v = contr_reg[0];
301
302 /* Are any of the eeprom blocks write protected?
303 */
304 if (ctrl_reg_v & 0x18) {
305 ctrl_reg_v &= ~0x18; /* reset block protect bits */
306 ctrl_reg_v |= 0x02; /* set write enable latch */
307 ctrl_reg_v &= ~0x04; /* clear RWEL */
308
309 /* Set write enable latch.
310 */
311 contr_reg[0] = 0x02;
312 if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
313 rcode = 1;
314 }
315
316 /* Set register write enable latch.
317 */
318 contr_reg[0] = 0x06;
319 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
320 rcode = 1;
321 }
322
323 /* Modify ctrl register.
324 */
325 contr_reg[0] = ctrl_reg_v;
326 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
327 rcode = 1;
328 }
329
330 /* The write (above) is an operation on NV memory.
331 * These can take some time (~5ms), and the device
332 * will not respond to further I2C messages till
333 * it's completed the write.
334 * So poll device for an I2C acknowledge.
335 * When we get one we know we can continue with other
336 * operations.
337 */
338 contr_reg[0] = 0;
339 for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
wdenkaacf9a42003-01-17 16:27:01 +0000340 if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
wdenk38635852002-08-27 05:55:31 +0000341 break; /* got ack */
342#if defined(CFG_EEPROM_PAGE_WRITE_DELAY_MS)
343 udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
344#endif
345 }
346 if (i == MAX_ACKNOWLEDGE_POLLS) {
wdenk4b9206e2004-03-23 22:14:11 +0000347 puts ("EEPROM poll acknowledge failed\n");
wdenk38635852002-08-27 05:55:31 +0000348 rcode = 1;
349 }
350 }
351
352 /* Is the write enable latch on?.
353 */
354 else if (!(ctrl_reg_v & 0x02)) {
355 /* Set write enable latch.
356 */
357 contr_reg[0] = 0x02;
358 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
359 rcode = 1;
360 }
361 }
362 /* Write is enabled ... now write eeprom value.
363 */
364#endif
365 if (i2c_write (addr[0], offset, alen-1, buffer, len) != 0)
366 rcode = 1;
367
368#endif
369 buffer += len;
370 offset += len;
371
372#if defined(CFG_EEPROM_PAGE_WRITE_DELAY_MS)
373 udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
374#endif
375 }
Stefan Roese98f4a3d2005-09-22 09:04:17 +0200376#if defined(CFG_EEPROM_WREN)
377 eeprom_write_enable (dev_addr,0);
378#endif
wdenk38635852002-08-27 05:55:31 +0000379 return rcode;
380}
381
wdenk6dd652f2003-06-19 23:40:20 +0000382#ifndef CONFIG_SPI
383int
384eeprom_probe (unsigned dev_addr, unsigned offset)
385{
386 unsigned char chip;
387
388 /* Probe the chip address
389 */
390#if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
391 chip = offset >> 8; /* block number */
392#else
393 chip = offset >> 16; /* block number */
394#endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
395
396 chip |= dev_addr; /* insert device address */
397
398 return (i2c_probe (chip));
399}
400#endif
401
wdenk38635852002-08-27 05:55:31 +0000402/*-----------------------------------------------------------------------
403 * Set default values
404 */
405#ifndef CFG_I2C_SPEED
406#define CFG_I2C_SPEED 50000
407#endif
408
409#ifndef CFG_I2C_SLAVE
410#define CFG_I2C_SLAVE 0xFE
411#endif
412
413void eeprom_init (void)
414{
415#if defined(CONFIG_SPI)
416 spi_init_f ();
417#endif
418#if defined(CONFIG_HARD_I2C) || \
419 defined(CONFIG_SOFT_I2C)
420 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
421#endif
422}
423/*-----------------------------------------------------------------------
424 */
425#endif /* CFG_CMD_EEPROM */
wdenk8bde7f72003-06-27 21:31:46 +0000426/***************************************************/
427
428#if (CONFIG_COMMANDS & CFG_CMD_EEPROM)
429
430#ifdef CFG_I2C_MULTI_EEPROMS
wdenk0d498392003-07-01 21:06:45 +0000431U_BOOT_CMD(
432 eeprom, 6, 1, do_eeprom,
wdenk8bde7f72003-06-27 21:31:46 +0000433 "eeprom - EEPROM sub-system\n",
434 "read devaddr addr off cnt\n"
435 "eeprom write devaddr addr off cnt\n"
436 " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'\n"
437);
438#else /* One EEPROM */
wdenk0d498392003-07-01 21:06:45 +0000439U_BOOT_CMD(
440 eeprom, 5, 1, do_eeprom,
wdenk8bde7f72003-06-27 21:31:46 +0000441 "eeprom - EEPROM sub-system\n",
442 "read addr off cnt\n"
443 "eeprom write addr off cnt\n"
444 " - read/write `cnt' bytes at EEPROM offset `off'\n"
445);
446#endif /* CFG_I2C_MULTI_EEPROMS */
447
448#endif /* CFG_CMD_EEPROM */