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Faiz Abbas7feafb02019-10-15 18:24:36 +05301/* SPDX-License-Identifier: GPL-2.0+ */
2#ifndef _UNIPRO_H_
3#define _UNIPRO_H_
4
5/*
6 * M-TX Configuration Attributes
7 */
8#define TX_HIBERN8TIME_CAPABILITY 0x000F
9#define TX_MODE 0x0021
10#define TX_HSRATE_SERIES 0x0022
11#define TX_HSGEAR 0x0023
12#define TX_PWMGEAR 0x0024
13#define TX_AMPLITUDE 0x0025
14#define TX_HS_SLEWRATE 0x0026
15#define TX_SYNC_SOURCE 0x0027
16#define TX_HS_SYNC_LENGTH 0x0028
17#define TX_HS_PREPARE_LENGTH 0x0029
18#define TX_LS_PREPARE_LENGTH 0x002A
19#define TX_HIBERN8_CONTROL 0x002B
20#define TX_LCC_ENABLE 0x002C
21#define TX_PWM_BURST_CLOSURE_EXTENSION 0x002D
22#define TX_BYPASS_8B10B_ENABLE 0x002E
23#define TX_DRIVER_POLARITY 0x002F
24#define TX_HS_UNTERMINATED_LINE_DRIVE_ENABLE 0x0030
25#define TX_LS_TERMINATED_LINE_DRIVE_ENABLE 0x0031
26#define TX_LCC_SEQUENCER 0x0032
27#define TX_MIN_ACTIVATETIME 0x0033
28#define TX_PWM_G6_G7_SYNC_LENGTH 0x0034
29#define TX_REFCLKFREQ 0x00EB
30#define TX_CFGCLKFREQVAL 0x00EC
31#define CFGEXTRATTR 0x00F0
32#define DITHERCTRL2 0x00F1
33
34/*
35 * M-RX Configuration Attributes
36 */
37#define RX_MODE 0x00A1
38#define RX_HSRATE_SERIES 0x00A2
39#define RX_HSGEAR 0x00A3
40#define RX_PWMGEAR 0x00A4
41#define RX_LS_TERMINATED_ENABLE 0x00A5
42#define RX_HS_UNTERMINATED_ENABLE 0x00A6
43#define RX_ENTER_HIBERN8 0x00A7
44#define RX_BYPASS_8B10B_ENABLE 0x00A8
45#define RX_TERMINATION_FORCE_ENABLE 0x0089
46#define RX_MIN_ACTIVATETIME_CAPABILITY 0x008F
47#define RX_HIBERN8TIME_CAPABILITY 0x0092
48#define RX_REFCLKFREQ 0x00EB
49#define RX_CFGCLKFREQVAL 0x00EC
50#define CFGWIDEINLN 0x00F0
51#define CFGRXCDR8 0x00BA
52#define ENARXDIRECTCFG4 0x00F2
53#define CFGRXOVR8 0x00BD
54#define RXDIRECTCTRL2 0x00C7
55#define ENARXDIRECTCFG3 0x00F3
56#define RXCALCTRL 0x00B4
57#define ENARXDIRECTCFG2 0x00F4
58#define CFGRXOVR4 0x00E9
59#define RXSQCTRL 0x00B5
60#define CFGRXOVR6 0x00BF
61
62#define is_mphy_tx_attr(attr) (attr < RX_MODE)
63#define RX_MIN_ACTIVATETIME_UNIT_US 100
64#define HIBERN8TIME_UNIT_US 100
65
66/*
67 * Common Block Attributes
68 */
69#define TX_GLOBALHIBERNATE UNIPRO_CB_OFFSET(0x002B)
70#define REFCLKMODE UNIPRO_CB_OFFSET(0x00BF)
71#define DIRECTCTRL19 UNIPRO_CB_OFFSET(0x00CD)
72#define DIRECTCTRL10 UNIPRO_CB_OFFSET(0x00E6)
73#define CDIRECTCTRL6 UNIPRO_CB_OFFSET(0x00EA)
74#define RTOBSERVESELECT UNIPRO_CB_OFFSET(0x00F0)
75#define CBDIVFACTOR UNIPRO_CB_OFFSET(0x00F1)
76#define CBDCOCTRL5 UNIPRO_CB_OFFSET(0x00F3)
77#define CBPRGPLL2 UNIPRO_CB_OFFSET(0x00F8)
78#define CBPRGTUNING UNIPRO_CB_OFFSET(0x00FB)
79
80#define UNIPRO_CB_OFFSET(x) (0x8000 | x)
81
82/*
83 * PHY Adpater attributes
84 */
85#define PA_ACTIVETXDATALANES 0x1560
86#define PA_ACTIVERXDATALANES 0x1580
87#define PA_TXTRAILINGCLOCKS 0x1564
88#define PA_PHY_TYPE 0x1500
89#define PA_AVAILTXDATALANES 0x1520
90#define PA_AVAILRXDATALANES 0x1540
91#define PA_MINRXTRAILINGCLOCKS 0x1543
92#define PA_TXPWRSTATUS 0x1567
93#define PA_RXPWRSTATUS 0x1582
94#define PA_TXFORCECLOCK 0x1562
95#define PA_TXPWRMODE 0x1563
96#define PA_LEGACYDPHYESCDL 0x1570
97#define PA_MAXTXSPEEDFAST 0x1521
98#define PA_MAXTXSPEEDSLOW 0x1522
99#define PA_MAXRXSPEEDFAST 0x1541
100#define PA_MAXRXSPEEDSLOW 0x1542
101#define PA_TXLINKSTARTUPHS 0x1544
102#define PA_LOCAL_TX_LCC_ENABLE 0x155E
103#define PA_TXSPEEDFAST 0x1565
104#define PA_TXSPEEDSLOW 0x1566
105#define PA_REMOTEVERINFO 0x15A0
106#define PA_TXGEAR 0x1568
107#define PA_TXTERMINATION 0x1569
108#define PA_HSSERIES 0x156A
109#define PA_PWRMODE 0x1571
110#define PA_RXGEAR 0x1583
111#define PA_RXTERMINATION 0x1584
112#define PA_MAXRXPWMGEAR 0x1586
113#define PA_MAXRXHSGEAR 0x1587
114#define PA_RXHSUNTERMCAP 0x15A5
115#define PA_RXLSTERMCAP 0x15A6
116#define PA_GRANULARITY 0x15AA
117#define PA_PACPREQTIMEOUT 0x1590
118#define PA_PACPREQEOBTIMEOUT 0x1591
119#define PA_HIBERN8TIME 0x15A7
120#define PA_LOCALVERINFO 0x15A9
121#define PA_TACTIVATE 0x15A8
122#define PA_PACPFRAMECOUNT 0x15C0
123#define PA_PACPERRORCOUNT 0x15C1
124#define PA_PHYTESTCONTROL 0x15C2
125#define PA_PWRMODEUSERDATA0 0x15B0
126#define PA_PWRMODEUSERDATA1 0x15B1
127#define PA_PWRMODEUSERDATA2 0x15B2
128#define PA_PWRMODEUSERDATA3 0x15B3
129#define PA_PWRMODEUSERDATA4 0x15B4
130#define PA_PWRMODEUSERDATA5 0x15B5
131#define PA_PWRMODEUSERDATA6 0x15B6
132#define PA_PWRMODEUSERDATA7 0x15B7
133#define PA_PWRMODEUSERDATA8 0x15B8
134#define PA_PWRMODEUSERDATA9 0x15B9
135#define PA_PWRMODEUSERDATA10 0x15BA
136#define PA_PWRMODEUSERDATA11 0x15BB
137#define PA_CONNECTEDTXDATALANES 0x1561
138#define PA_CONNECTEDRXDATALANES 0x1581
139#define PA_LOGICALLANEMAP 0x15A1
140#define PA_SLEEPNOCONFIGTIME 0x15A2
141#define PA_STALLNOCONFIGTIME 0x15A3
142#define PA_SAVECONFIGTIME 0x15A4
143
144#define PA_TACTIVATE_TIME_UNIT_US 10
145#define PA_HIBERN8_TIME_UNIT_US 100
146
147/*Other attributes*/
148#define VS_MPHYCFGUPDT 0xD085
149#define VS_DEBUGOMC 0xD09E
150#define VS_POWERSTATE 0xD083
151
152#define PA_GRANULARITY_MIN_VAL 1
153#define PA_GRANULARITY_MAX_VAL 6
154
155/* PHY Adapter Protocol Constants */
156#define PA_MAXDATALANES 4
157
158/* PA power modes */
159enum {
160 FAST_MODE = 1,
161 SLOW_MODE = 2,
162 FASTAUTO_MODE = 4,
163 SLOWAUTO_MODE = 5,
164 UNCHANGED = 7,
165};
166
167/* PA TX/RX Frequency Series */
168enum {
169 PA_HS_MODE_A = 1,
170 PA_HS_MODE_B = 2,
171};
172
173enum ufs_pwm_gear_tag {
174 UFS_PWM_DONT_CHANGE, /* Don't change Gear */
175 UFS_PWM_G1, /* PWM Gear 1 (default for reset) */
176 UFS_PWM_G2, /* PWM Gear 2 */
177 UFS_PWM_G3, /* PWM Gear 3 */
178 UFS_PWM_G4, /* PWM Gear 4 */
179 UFS_PWM_G5, /* PWM Gear 5 */
180 UFS_PWM_G6, /* PWM Gear 6 */
181 UFS_PWM_G7, /* PWM Gear 7 */
182};
183
184enum ufs_hs_gear_tag {
185 UFS_HS_DONT_CHANGE, /* Don't change Gear */
186 UFS_HS_G1, /* HS Gear 1 (default for reset) */
187 UFS_HS_G2, /* HS Gear 2 */
188 UFS_HS_G3, /* HS Gear 3 */
189};
190
191enum ufs_unipro_ver {
192 UFS_UNIPRO_VER_RESERVED = 0,
193 UFS_UNIPRO_VER_1_40 = 1, /* UniPro version 1.40 */
194 UFS_UNIPRO_VER_1_41 = 2, /* UniPro version 1.41 */
195 UFS_UNIPRO_VER_1_6 = 3, /* UniPro version 1.6 */
196 UFS_UNIPRO_VER_MAX = 4, /* UniPro unsupported version */
197 /* UniPro version field mask in PA_LOCALVERINFO */
198 UFS_UNIPRO_VER_MASK = 0xF,
199};
200
201/*
202 * Data Link Layer Attributes
203 */
204#define DL_TC0TXFCTHRESHOLD 0x2040
205#define DL_FC0PROTTIMEOUTVAL 0x2041
206#define DL_TC0REPLAYTIMEOUTVAL 0x2042
207#define DL_AFC0REQTIMEOUTVAL 0x2043
208#define DL_AFC0CREDITTHRESHOLD 0x2044
209#define DL_TC0OUTACKTHRESHOLD 0x2045
210#define DL_TC1TXFCTHRESHOLD 0x2060
211#define DL_FC1PROTTIMEOUTVAL 0x2061
212#define DL_TC1REPLAYTIMEOUTVAL 0x2062
213#define DL_AFC1REQTIMEOUTVAL 0x2063
214#define DL_AFC1CREDITTHRESHOLD 0x2064
215#define DL_TC1OUTACKTHRESHOLD 0x2065
216#define DL_TXPREEMPTIONCAP 0x2000
217#define DL_TC0TXMAXSDUSIZE 0x2001
218#define DL_TC0RXINITCREDITVAL 0x2002
219#define DL_TC0TXBUFFERSIZE 0x2005
220#define DL_PEERTC0PRESENT 0x2046
221#define DL_PEERTC0RXINITCREVAL 0x2047
222#define DL_TC1TXMAXSDUSIZE 0x2003
223#define DL_TC1RXINITCREDITVAL 0x2004
224#define DL_TC1TXBUFFERSIZE 0x2006
225#define DL_PEERTC1PRESENT 0x2066
226#define DL_PEERTC1RXINITCREVAL 0x2067
227
228/*
229 * Network Layer Attributes
230 */
231#define N_DEVICEID 0x3000
232#define N_DEVICEID_VALID 0x3001
233#define N_TC0TXMAXSDUSIZE 0x3020
234#define N_TC1TXMAXSDUSIZE 0x3021
235
236/*
237 * Transport Layer Attributes
238 */
239#define T_NUMCPORTS 0x4000
240#define T_NUMTESTFEATURES 0x4001
241#define T_CONNECTIONSTATE 0x4020
242#define T_PEERDEVICEID 0x4021
243#define T_PEERCPORTID 0x4022
244#define T_TRAFFICCLASS 0x4023
245#define T_PROTOCOLID 0x4024
246#define T_CPORTFLAGS 0x4025
247#define T_TXTOKENVALUE 0x4026
248#define T_RXTOKENVALUE 0x4027
249#define T_LOCALBUFFERSPACE 0x4028
250#define T_PEERBUFFERSPACE 0x4029
251#define T_CREDITSTOSEND 0x402A
252#define T_CPORTMODE 0x402B
253#define T_TC0TXMAXSDUSIZE 0x4060
254#define T_TC1TXMAXSDUSIZE 0x4061
255
256#ifdef FALSE
257#undef FALSE
258#endif
259
260#ifdef TRUE
261#undef TRUE
262#endif
263
264/* Boolean attribute values */
265enum {
266 FALSE = 0,
267 TRUE,
268};
269
270#endif /* _UNIPRO_H_ */