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Peng Fanc1583812019-08-08 09:55:37 +00001// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2//
3// Copyright 2016 Freescale Semiconductor, Inc.
Peng Fanb0a8e452016-08-11 14:02:55 +08004
Peng Fanc1583812019-08-08 09:55:37 +00005#include "imx6ul.dtsi"
Peng Fanb0a8e452016-08-11 14:02:55 +08006#include "imx6ull-pinfunc.h"
7#include "imx6ull-pinfunc-snvs.h"
Peng Fanc1583812019-08-08 09:55:37 +00008
9/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
10/delete-node/ &uart8;
11/* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
12/delete-node/ &crypto;
13
14&cpu0 {
15 operating-points = <
16 /* kHz uV */
17 900000 1275000
18 792000 1225000
19 528000 1175000
20 396000 1025000
21 198000 950000
22 >;
23 fsl,soc-operating-points = <
24 /* KHz uV */
25 900000 1250000
26 792000 1175000
27 528000 1175000
28 396000 1175000
29 198000 1175000
30 >;
31};
32
33&ocotp {
34 compatible = "fsl,imx6ull-ocotp", "syscon";
35};
36
37&usdhc1 {
38 compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
39};
40
41&usdhc2 {
42 compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
43};
Peng Fanb0a8e452016-08-11 14:02:55 +080044
45/ {
Peng Fanb0a8e452016-08-11 14:02:55 +080046 soc {
Oleksandr Suvorovcdb18042021-09-23 23:14:37 +030047 aips3: bus@2200000 {
Peng Fanb0a8e452016-08-11 14:02:55 +080048 compatible = "fsl,aips-bus", "simple-bus";
49 #address-cells = <1>;
50 #size-cells = <1>;
51 reg = <0x02200000 0x100000>;
52 ranges;
53
Peng Fanc1583812019-08-08 09:55:37 +000054 dcp: crypto@2280000 {
55 compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp";
Peng Fanb0a8e452016-08-11 14:02:55 +080056 reg = <0x02280000 0x4000>;
57 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
58 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
59 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
Peng Fanc1583812019-08-08 09:55:37 +000060 clocks = <&clks IMX6ULL_CLK_DCP_CLK>;
Peng Fanb0a8e452016-08-11 14:02:55 +080061 clock-names = "dcp";
Peng Fanb0a8e452016-08-11 14:02:55 +080062 };
63
Peng Fanc1583812019-08-08 09:55:37 +000064 iomuxc_snvs: iomuxc-snvs@2290000 {
65 compatible = "fsl,imx6ull-iomuxc-snvs";
66 reg = <0x02290000 0x4000>;
Peng Fanb0a8e452016-08-11 14:02:55 +080067 };
68
Peng Fanc1583812019-08-08 09:55:37 +000069 uart8: serial@2288000 {
Peng Fanb0a8e452016-08-11 14:02:55 +080070 compatible = "fsl,imx6ul-uart",
Peng Fanc1583812019-08-08 09:55:37 +000071 "fsl,imx6q-uart";
Peng Fanb0a8e452016-08-11 14:02:55 +080072 reg = <0x02288000 0x4000>;
73 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
74 clocks = <&clks IMX6UL_CLK_UART8_IPG>,
75 <&clks IMX6UL_CLK_UART8_SERIAL>;
76 clock-names = "ipg", "per";
Peng Fanb0a8e452016-08-11 14:02:55 +080077 status = "disabled";
78 };
Peng Fanb0a8e452016-08-11 14:02:55 +080079 };
80 };
81};