blob: 405637d8cd6db809dc6f6b44fbebda8540b8bf65 [file] [log] [blame]
Daniel Hellstrom1e9a1642008-03-26 22:51:29 +01001/* Interface for accessing Gaisler AMBA Plug&Play Bus.
2 * The AHB bus can be interfaced with a simpler bus -
3 * the APB bus, also freely available in GRLIB at
4 * www.gaisler.com.
5 *
6 * (C) Copyright 2007
7 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
8 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom1e9a1642008-03-26 22:51:29 +010010 */
11
12#ifndef __AMBAPP_H__
13#define __AMBAPP_H__
14
15/* Default location of Plug&Play info
16 * normally 0xfffff000 for AHB masters
17 * and 0xfffff800 for AHB slaves.
18 * Normally no need to change this.
19 */
20#define LEON3_IO_AREA 0xfff00000
21#define LEON3_CONF_AREA 0xff000
22#define LEON3_AHB_SLAVE_CONF_AREA (1 << 11)
23
24/* Max devices this software will support */
25#define LEON3_AHB_MASTERS 16
26#define LEON3_AHB_SLAVES 16
Wolfgang Denk1aeed8d2008-04-13 09:59:26 -070027/*#define LEON3_APB_MASTERS 1*/ /* Number of APB buses that has Plug&Play */
Daniel Hellstrom1e9a1642008-03-26 22:51:29 +010028#define LEON3_APB_SLAVES 16 /* Total number of APB slaves per APB bus */
29
30/* Vendor codes */
31#define VENDOR_GAISLER 1
32#define VENDOR_PENDER 2
33#define VENDOR_ESA 4
34#define VENDOR_ASTRIUM 6
35#define VENDOR_OPENCHIP 7
36#define VENDOR_OPENCORES 8
37#define VENDOR_CONTRIB 9
38#define VENDOR_EONIC 11
39#define VENDOR_RADIONOR 15
40#define VENDOR_GLEICHMANN 16
41#define VENDOR_MENTA 17
42#define VENDOR_SUN 19
43#define VENDOR_EMBEDDIT 234
44#define VENDOR_CAL 202
45
46/* Gaisler Research device id's */
47#define GAISLER_LEON3 0x003
48#define GAISLER_LEON3DSU 0x004
49#define GAISLER_ETHAHB 0x005
50#define GAISLER_APBMST 0x006
51#define GAISLER_AHBUART 0x007
52#define GAISLER_SRCTRL 0x008
53#define GAISLER_SDCTRL 0x009
54#define GAISLER_APBUART 0x00C
55#define GAISLER_IRQMP 0x00D
56#define GAISLER_AHBRAM 0x00E
57#define GAISLER_GPTIMER 0x011
58#define GAISLER_PCITRG 0x012
59#define GAISLER_PCISBRG 0x013
60#define GAISLER_PCIFBRG 0x014
61#define GAISLER_PCITRACE 0x015
62#define GAISLER_PCIDMA 0x016
63#define GAISLER_AHBTRACE 0x017
64#define GAISLER_ETHDSU 0x018
65#define GAISLER_PIOPORT 0x01A
66#define GAISLER_AHBJTAG 0x01c
67#define GAISLER_SPW 0x01f
68#define GAISLER_ATACTRL 0x024
69#define GAISLER_VGA 0x061
70#define GAISLER_KBD 0X060
71#define GAISLER_ETHMAC 0x01D
72#define GAISLER_DDRSPA 0x025
73#define GAISLER_EHCI 0x026
74#define GAISLER_UHCI 0x027
75#define GAISLER_SPW2 0x029
76#define GAISLER_DDR2SPA 0x02E
77#define GAISLER_AHBSTAT 0x052
78#define GAISLER_FTMCTRL 0x054
79
80#define GAISLER_L2TIME 0xffd /* internal device: leon2 timer */
81#define GAISLER_L2C 0xffe /* internal device: leon2compat */
82#define GAISLER_PLUGPLAY 0xfff /* internal device: plug & play configarea */
83
84/* European Space Agency device id's */
85#define ESA_LEON2 0x2
86#define ESA_MCTRL 0xF
87
88/* Opencores device id's */
89#define OPENCORES_PCIBR 0x4
90#define OPENCORES_ETHMAC 0x5
91
92/* Vendor codes */
93
94/*
95 *
96 * Macros for manipulating Configuration registers
97 *
98 */
99
100#define amba_vendor(x) (((x) >> 24) & 0xff)
101
102#define amba_device(x) (((x) >> 12) & 0xfff)
103
104#define amba_membar_start(mbar) \
105 (((mbar) & 0xfff00000) & (((mbar) & 0xfff0) << 16))
106
107#define amba_iobar_start(base, iobar) \
108 ((base) | ((((iobar) & 0xfff00000)>>12) & (((iobar) & 0xfff0)<<4)) )
109
110#define amba_irq(conf) ((conf) & 0xf)
111
112#define amba_ver(conf) (((conf)>>5) & 0x1f)
113
114#define amba_membar_type(mbar) ((mbar) & 0xf)
115
116#define amba_membar_mask(mbar) (((mbar)>>4) & 0xfff)
117
118#define AMBA_TYPE_APBIO 0x1
119#define AMBA_TYPE_MEM 0x2
120#define AMBA_TYPE_AHBIO 0x3
121
122#define AMBA_TYPE_AHBIO_ADDR(addr) (LEON3_IO_AREA | ((addr) >> 12))
123
124#ifndef __ASSEMBLER__
125
Daniel Hellstrom2a2fa792008-03-26 23:00:38 +0100126#ifdef CONFIG_CMD_AMBAPP
127
128/* AMBA Plug&Play relocation & initialization */
129int ambapp_init_reloc(void);
130
131/* AMBA Plug&Play Name of Vendors and devices */
132
133/* Return name of device */
134char *ambapp_device_id2str(int vendor, int id);
135
136/* Return name of vendor */
137char *ambapp_vendor_id2str(int vendor);
138#endif
139
Daniel Hellstrom1e9a1642008-03-26 22:51:29 +0100140/*
141 * Types and structure used for AMBA Plug & Play bus scanning
142 */
143
144/* AMBA Plug&Play AHB information layout */
145typedef struct {
146 unsigned int conf;
147 unsigned int userdef[3];
148 unsigned int bars[4];
149} ahbctrl_pp_dev;
150
151/* Prototypes for scanning AMBA Plug&Play bus for AMBA
152 * i) AHB Masters
153 * ii) AHB Slaves
154 * iii) APB Slaves (APB MST is a AHB Slave)
155 */
156
157typedef struct {
158 unsigned char irq;
159 unsigned char ver;
160 unsigned int address;
161} ambapp_apbdev;
162
163typedef struct {
164 unsigned char irq;
165 unsigned char ver;
166 unsigned int userdef[3];
167 unsigned int address[4];
168} ambapp_ahbdev;
169
170/* AMBA Plug&Play AHB Masters & Slaves information locations
171 * Max devices is 64 supported by HW, however often only 8
172 * are used.
173 */
174typedef struct {
175 ahbctrl_pp_dev masters[64];
176 ahbctrl_pp_dev slaves[64];
177} ahbctrl_info;
178
179/* AMBA Plug&Play AHB information layout */
180typedef struct {
181 unsigned int conf;
182 unsigned int bar;
183} apbctrl_pp_dev;
184
185/* All functions return the number of found devices
186 * 0 = no devices found
187 */
188
189/****************************** APB SLAVES ******************************/
190int ambapp_apb_count(unsigned int vendor, unsigned int driver);
191
192int ambapp_apb_first(unsigned int vendor,
193 unsigned int driver, ambapp_apbdev * dev);
194
195int ambapp_apb_next(unsigned int vendor,
196 unsigned int driver, ambapp_apbdev * dev, int index);
197
198int ambapp_apbs_first(unsigned int vendor,
199 unsigned int driver, ambapp_apbdev * dev, int max_cnt);
200
201/****************************** AHB MASTERS ******************************/
202int ambapp_ahbmst_count(unsigned int vendor, unsigned int driver);
203
204int ambapp_ahbmst_first(unsigned int vendor,
205 unsigned int driver, ambapp_ahbdev * dev);
206
207int ambapp_ahbmst_next(unsigned int vendor,
208 unsigned int driver, ambapp_ahbdev * dev, int index);
209
210int ambapp_ahbmsts_first(unsigned int vendor,
211 unsigned int driver, ambapp_ahbdev * dev, int max_cnt);
212
213/****************************** AHB SLAVES ******************************/
214int ambapp_ahbslv_count(unsigned int vendor, unsigned int driver);
215
216int ambapp_ahbslv_first(unsigned int vendor,
217 unsigned int driver, ambapp_ahbdev * dev);
218
219int ambapp_ahbslv_next(unsigned int vendor,
220 unsigned int driver, ambapp_ahbdev * dev, int index);
221
222int ambapp_ahbslvs_first(unsigned int vendor,
223 unsigned int driver, ambapp_ahbdev * dev, int max_cnt);
224
225/*************************** AHB/APB only regs functions *************************
226 * During start up, no memory is available we can use the simplified functions
227 * to get to the memory controller.
228 *
229 * Functions uses no stack/memory, only registers.
230 */
231unsigned int ambapp_apb_next_nomem(register unsigned int vendor, /* Plug&Play Vendor ID */
232 register unsigned int driver, /* Plug&Play Device ID */
233 register int index);
234
235ahbctrl_pp_dev *ambapp_ahb_next_nomem(register unsigned int vendor, /* Plug&Play Vendor ID */
236 register unsigned int driver, /* Plug&Play Device ID */
237 register unsigned int opts, /* scan for AHB 1=slave, 0=masters */
238 register int index);
239
240unsigned int ambapp_ahb_get_info(ahbctrl_pp_dev * ahb, int info);
241
242/*************************** AMBA Plug&Play device register MAPS *****************/
243
244/*
245 * The following defines the bits in the LEON UART Status Registers.
246 */
247
248#define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
249#define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
250#define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
251#define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
252#define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
253#define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
254#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
255#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
256
257/*
258 * The following defines the bits in the LEON UART Ctrl Registers.
259 */
260
261#define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
262#define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
263#define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
264#define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */
265#define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */
266#define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */
267#define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
268#define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
269#define LEON_REG_UART_CTRL_DBG (1<<11) /* Debug Bit used by GRMON */
270
271#define LEON3_GPTIMER_EN 1
272#define LEON3_GPTIMER_RL 2
273#define LEON3_GPTIMER_LD 4
274#define LEON3_GPTIMER_IRQEN 8
275
276/*
277 * The following defines the bits in the LEON PS/2 Status Registers.
278 */
279
280#define LEON_REG_PS2_STATUS_DR 0x00000001 /* Data Ready */
281#define LEON_REG_PS2_STATUS_PE 0x00000002 /* Parity error */
282#define LEON_REG_PS2_STATUS_FE 0x00000004 /* Framing error */
283#define LEON_REG_PS2_STATUS_KI 0x00000008 /* Keyboard inhibit */
284
285/*
286 * The following defines the bits in the LEON PS/2 Ctrl Registers.
287 */
288
289#define LEON_REG_PS2_CTRL_RE 0x00000001 /* Receiver enable */
290#define LEON_REG_PS2_CTRL_TE 0x00000002 /* Transmitter enable */
291#define LEON_REG_PS2_CTRL_RI 0x00000004 /* Keyboard receive interrupt */
292#define LEON_REG_PS2_CTRL_TI 0x00000008 /* Keyboard transmit interrupt */
293
294typedef struct {
295 volatile unsigned int ilevel;
296 volatile unsigned int ipend;
297 volatile unsigned int iforce;
298 volatile unsigned int iclear;
299 volatile unsigned int mstatus;
300 volatile unsigned int notused[11];
301 volatile unsigned int cpu_mask[16];
302 volatile unsigned int cpu_force[16];
303} ambapp_dev_irqmp;
304
305typedef struct {
306 volatile unsigned int data;
307 volatile unsigned int status;
308 volatile unsigned int ctrl;
309 volatile unsigned int scaler;
310} ambapp_dev_apbuart;
311
312typedef struct {
313 volatile unsigned int val;
314 volatile unsigned int rld;
315 volatile unsigned int ctrl;
316 volatile unsigned int unused;
317} ambapp_dev_gptimer_element;
318
319#define LEON3_GPTIMER_CTRL_EN 0x1 /* Timer enable */
320#define LEON3_GPTIMER_CTRL_RS 0x2 /* Timer reStart */
321#define LEON3_GPTIMER_CTRL_LD 0x4 /* Timer reLoad */
322#define LEON3_GPTIMER_CTRL_IE 0x8 /* interrupt enable */
323#define LEON3_GPTIMER_CTRL_IP 0x10 /* interrupt flag/pending */
324#define LEON3_GPTIMER_CTRL_CH 0x20 /* Chain with previous timer */
325
326typedef struct {
327 volatile unsigned int scalar;
328 volatile unsigned int scalar_reload;
329 volatile unsigned int config;
330 volatile unsigned int unused;
331 volatile ambapp_dev_gptimer_element e[8];
332} ambapp_dev_gptimer;
333
334typedef struct {
335 volatile unsigned int iodata;
336 volatile unsigned int ioout;
337 volatile unsigned int iodir;
338 volatile unsigned int irqmask;
339 volatile unsigned int irqpol;
340 volatile unsigned int irqedge;
341} ambapp_dev_ioport;
342
343typedef struct {
344 volatile unsigned int write;
345 volatile unsigned int dummy;
346 volatile unsigned int txcolor;
347 volatile unsigned int bgcolor;
348} ambapp_dev_textvga;
349
350typedef struct {
351 volatile unsigned int data;
352 volatile unsigned int status;
353 volatile unsigned int ctrl;
354} ambapp_dev_apbps2;
355
356typedef struct {
357 unsigned int mcfg1, mcfg2, mcfg3;
358} ambapp_dev_mctrl;
359
360typedef struct {
361 unsigned int sdcfg;
362} ambapp_dev_sdctrl;
363
364typedef struct {
365 unsigned int cfg1;
366 unsigned int cfg2;
367 unsigned int cfg3;
368} ambapp_dev_ddr2spa;
369
370typedef struct {
371 unsigned int ctrl;
372 unsigned int cfg;
373} ambapp_dev_ddrspa;
374
375#endif
376
377#endif