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wdenkc6097192002-11-03 00:24:07 +00001/*
wdenkd4ca31c2004-01-02 14:00:00 +00002 * (C) Copyright 2000-2004
wdenkc6097192002-11-03 00:24:07 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
wdenkd4ca31c2004-01-02 14:00:00 +000024#if 0
25#define DEBUG
26#endif
wdenk73a8b272003-06-05 19:27:42 +000027
wdenkc6097192002-11-03 00:24:07 +000028#include <common.h>
29#include <mpc8xx.h>
wdenk71f95112003-06-15 22:40:42 +000030#include <environment.h>
wdenkc6097192002-11-03 00:24:07 +000031
32#ifndef CFG_ENV_ADDR
33#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
34#endif
35
36flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
37
38/*-----------------------------------------------------------------------
39 * Functions
40 */
41static ulong flash_get_size (vu_long *addr, flash_info_t *info);
42static int write_word (flash_info_t *info, ulong dest, ulong data);
43
44/*-----------------------------------------------------------------------
45 */
46
47unsigned long flash_init (void)
48{
49 volatile immap_t *immap = (immap_t *)CFG_IMMR;
50 volatile memctl8xx_t *memctl = &immap->im_memctl;
51 unsigned long size_b0, size_b1;
52 int i;
53
54 /* Init: no FLASHes known */
55 for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
56 flash_info[i].flash_id = FLASH_UNKNOWN;
57 }
58
59 /* Static FLASH Bank configuration here - FIXME XXX */
60
wdenk73a8b272003-06-05 19:27:42 +000061 debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
62
wdenkc6097192002-11-03 00:24:07 +000063 size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
64
wdenk73a8b272003-06-05 19:27:42 +000065 debug ("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);
66
wdenkc6097192002-11-03 00:24:07 +000067 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
68 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
69 size_b0, size_b0<<20);
70 }
71
72 size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
73
wdenk73a8b272003-06-05 19:27:42 +000074 debug ("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
75
wdenkc6097192002-11-03 00:24:07 +000076 if (size_b1 > size_b0) {
77 printf ("## ERROR: "
78 "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
79 size_b1, size_b1<<20,
80 size_b0, size_b0<<20
81 );
82 flash_info[0].flash_id = FLASH_UNKNOWN;
83 flash_info[1].flash_id = FLASH_UNKNOWN;
84 flash_info[0].sector_count = -1;
85 flash_info[1].sector_count = -1;
86 flash_info[0].size = 0;
87 flash_info[1].size = 0;
88 return (0);
89 }
90
wdenk73a8b272003-06-05 19:27:42 +000091 debug ("## Before remap: "
92 "BR0: 0x%08x OR0: 0x%08x "
93 "BR1: 0x%08x OR1: 0x%08x\n",
94 memctl->memc_br0, memctl->memc_or0,
95 memctl->memc_br1, memctl->memc_or1);
96
wdenkc6097192002-11-03 00:24:07 +000097 /* Remap FLASH according to real size */
98 memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
99 memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
100
wdenk73a8b272003-06-05 19:27:42 +0000101 debug ("## BR0: 0x%08x OR0: 0x%08x\n",
102 memctl->memc_br0, memctl->memc_or0);
103
wdenkc6097192002-11-03 00:24:07 +0000104 /* Re-do sizing to get full correct info */
105 size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
106
107#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
108 /* monitor protection ON by default */
wdenk71f95112003-06-15 22:40:42 +0000109 debug ("Protect monitor: %08lx ... %08lx\n",
110 (ulong)CFG_MONITOR_BASE,
111 (ulong)CFG_MONITOR_BASE + monitor_flash_len - 1);
112
wdenkc6097192002-11-03 00:24:07 +0000113 flash_protect(FLAG_PROTECT_SET,
114 CFG_MONITOR_BASE,
wdenk71f95112003-06-15 22:40:42 +0000115 CFG_MONITOR_BASE + monitor_flash_len - 1,
wdenkc6097192002-11-03 00:24:07 +0000116 &flash_info[0]);
117#endif
118
119#ifdef CFG_ENV_IS_IN_FLASH
120 /* ENV protection ON by default */
wdenk71f95112003-06-15 22:40:42 +0000121# ifdef CFG_ENV_ADDR_REDUND
wdenke0ac62d2003-08-17 18:55:18 +0000122 debug ("Protect primary environment: %08lx ... %08lx\n",
wdenk71f95112003-06-15 22:40:42 +0000123 (ulong)CFG_ENV_ADDR,
124 (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
wdenke0ac62d2003-08-17 18:55:18 +0000125# else
126 debug ("Protect environment: %08lx ... %08lx\n",
127 (ulong)CFG_ENV_ADDR,
128 (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
129# endif
wdenk71f95112003-06-15 22:40:42 +0000130
wdenkc6097192002-11-03 00:24:07 +0000131 flash_protect(FLAG_PROTECT_SET,
132 CFG_ENV_ADDR,
wdenk71f95112003-06-15 22:40:42 +0000133 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
134 &flash_info[0]);
135#endif
136
137#ifdef CFG_ENV_ADDR_REDUND
138 debug ("Protect redundand environment: %08lx ... %08lx\n",
139 (ulong)CFG_ENV_ADDR_REDUND,
140 (ulong)CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1);
141
142 flash_protect(FLAG_PROTECT_SET,
143 CFG_ENV_ADDR_REDUND,
144 CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
wdenkc6097192002-11-03 00:24:07 +0000145 &flash_info[0]);
146#endif
147
148 if (size_b1) {
149 memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
150 memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
151 BR_MS_GPCM | BR_V;
152
wdenk73a8b272003-06-05 19:27:42 +0000153 debug ("## BR1: 0x%08x OR1: 0x%08x\n",
154 memctl->memc_br1, memctl->memc_or1);
155
wdenkc6097192002-11-03 00:24:07 +0000156 /* Re-do sizing to get full correct info */
157 size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
158 &flash_info[1]);
159
160#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
161 /* monitor protection ON by default */
162 flash_protect(FLAG_PROTECT_SET,
163 CFG_MONITOR_BASE,
wdenk3b57fe02003-05-30 12:48:29 +0000164 CFG_MONITOR_BASE+monitor_flash_len-1,
wdenkc6097192002-11-03 00:24:07 +0000165 &flash_info[1]);
166#endif
167
168#ifdef CFG_ENV_IS_IN_FLASH
169 /* ENV protection ON by default */
170 flash_protect(FLAG_PROTECT_SET,
171 CFG_ENV_ADDR,
172 CFG_ENV_ADDR+CFG_ENV_SIZE-1,
173 &flash_info[1]);
174#endif
175 } else {
176 memctl->memc_br1 = 0; /* invalidate bank */
177
178 flash_info[1].flash_id = FLASH_UNKNOWN;
179 flash_info[1].sector_count = -1;
wdenk73a8b272003-06-05 19:27:42 +0000180 flash_info[1].size = 0;
181
182 debug ("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
183 memctl->memc_br1, memctl->memc_or1);
wdenkc6097192002-11-03 00:24:07 +0000184 }
185
wdenk73a8b272003-06-05 19:27:42 +0000186 debug ("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
187
wdenkc6097192002-11-03 00:24:07 +0000188 flash_info[0].size = size_b0;
189 flash_info[1].size = size_b1;
190
191 return (size_b0 + size_b1);
192}
193
194/*-----------------------------------------------------------------------
195 */
196void flash_print_info (flash_info_t *info)
197{
198 int i;
199
200 if (info->flash_id == FLASH_UNKNOWN) {
201 printf ("missing or unknown FLASH type\n");
202 return;
203 }
204
205 switch (info->flash_id & FLASH_VENDMASK) {
206 case FLASH_MAN_AMD: printf ("AMD "); break;
207 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
208 default: printf ("Unknown Vendor "); break;
209 }
210
211 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk71f95112003-06-15 22:40:42 +0000212#ifdef CONFIG_TQM8xxM /* mirror bit flash */
213 case FLASH_AMLV128U: printf ("AM29LV128ML (128Mbit, uniform sector size)\n");
214 break;
wdenkf12e5682003-07-07 20:07:54 +0000215 case FLASH_AMLV320U: printf ("AM29LV320ML (32Mbit, uniform sector size)\n");
216 break;
217 case FLASH_AMLV640U: printf ("AM29LV640ML (64Mbit, uniform sector size)\n");
218 break;
wdenkd4ca31c2004-01-02 14:00:00 +0000219 case FLASH_AMLV320B: printf ("AM29LV320MB (32Mbit, bottom boot sect)\n");
220 break;
wdenk71f95112003-06-15 22:40:42 +0000221# else /* ! TQM8xxM */
wdenkc6097192002-11-03 00:24:07 +0000222 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
223 break;
224 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
225 break;
226 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
227 break;
228 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
229 break;
wdenkc6097192002-11-03 00:24:07 +0000230 case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
231 break;
232 case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
233 break;
wdenk71f95112003-06-15 22:40:42 +0000234#endif /* TQM8xxM */
wdenkf12e5682003-07-07 20:07:54 +0000235 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
236 break;
237 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
238 break;
wdenkd4ca31c2004-01-02 14:00:00 +0000239 case FLASH_AMDL163B: printf ("AM29DL163B (16 Mbit, bottom boot sect)\n");
240 break;
wdenkc6097192002-11-03 00:24:07 +0000241 default: printf ("Unknown Chip Type\n");
242 break;
243 }
244
245 printf (" Size: %ld MB in %d Sectors\n",
246 info->size >> 20, info->sector_count);
247
248 printf (" Sector Start Addresses:");
249 for (i=0; i<info->sector_count; ++i) {
250 if ((i % 5) == 0)
251 printf ("\n ");
252 printf (" %08lX%s",
253 info->start[i],
254 info->protect[i] ? " (RO)" : " "
255 );
256 }
257 printf ("\n");
258 return;
259}
260
261/*-----------------------------------------------------------------------
262 */
263
264
265/*-----------------------------------------------------------------------
266 */
267
268/*
269 * The following code cannot be run from FLASH!
270 */
271
272static ulong flash_get_size (vu_long *addr, flash_info_t *info)
273{
274 short i;
275 ulong value;
276 ulong base = (ulong)addr;
277
278 /* Write auto select command: read Manufacturer ID */
279 addr[0x0555] = 0x00AA00AA;
280 addr[0x02AA] = 0x00550055;
281 addr[0x0555] = 0x00900090;
282
283 value = addr[0];
284
wdenk73a8b272003-06-05 19:27:42 +0000285 debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
286
wdenkc6097192002-11-03 00:24:07 +0000287 switch (value) {
288 case AMD_MANUFACT:
wdenkd4ca31c2004-01-02 14:00:00 +0000289 debug ("Manufacturer: AMD\n");
wdenkc6097192002-11-03 00:24:07 +0000290 info->flash_id = FLASH_MAN_AMD;
291 break;
292 case FUJ_MANUFACT:
wdenkd4ca31c2004-01-02 14:00:00 +0000293 debug ("Manufacturer: FUJITSU\n");
wdenkc6097192002-11-03 00:24:07 +0000294 info->flash_id = FLASH_MAN_FUJ;
295 break;
296 default:
wdenkd4ca31c2004-01-02 14:00:00 +0000297 debug ("Manufacturer: *** unknown ***\n");
wdenkc6097192002-11-03 00:24:07 +0000298 info->flash_id = FLASH_UNKNOWN;
299 info->sector_count = 0;
300 info->size = 0;
301 return (0); /* no or unknown flash */
302 }
303
304 value = addr[1]; /* device ID */
305
wdenk73a8b272003-06-05 19:27:42 +0000306 debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
307
wdenkc6097192002-11-03 00:24:07 +0000308 switch (value) {
wdenk71f95112003-06-15 22:40:42 +0000309#ifdef CONFIG_TQM8xxM /* mirror bit flash */
310 case AMD_ID_MIRROR:
wdenkd4ca31c2004-01-02 14:00:00 +0000311 debug ("Mirror Bit flash: addr[14] = %08lX addr[15] = %08lX\n",
312 addr[14], addr[15]);
wdenkf12e5682003-07-07 20:07:54 +0000313 /* Special case for AMLV320MH/L */
314 if ((addr[14] & 0x00ff00ff) == 0x001d001d &&
wdenkd4ca31c2004-01-02 14:00:00 +0000315 (addr[15] & 0x00ff00ff) == 0x00000000) {
316 debug ("Chip: AMLV320MH/L\n");
wdenkf12e5682003-07-07 20:07:54 +0000317 info->flash_id += FLASH_AMLV320U;
318 info->sector_count = 64;
wdenkd4ca31c2004-01-02 14:00:00 +0000319 info->size = 0x00800000; /* => 8 MB */
wdenkf12e5682003-07-07 20:07:54 +0000320 break;
wdenk945af8d2003-07-16 21:53:01 +0000321 }
wdenk71f95112003-06-15 22:40:42 +0000322 switch(addr[14]) {
323 case AMD_ID_LV128U_2:
324 if (addr[15] != AMD_ID_LV128U_3) {
wdenkd4ca31c2004-01-02 14:00:00 +0000325 debug ("Chip: AMLV128U -> unknown\n");
wdenk71f95112003-06-15 22:40:42 +0000326 info->flash_id = FLASH_UNKNOWN;
wdenkd4ca31c2004-01-02 14:00:00 +0000327 } else {
328 debug ("Chip: AMLV128U\n");
wdenk71f95112003-06-15 22:40:42 +0000329 info->flash_id += FLASH_AMLV128U;
330 info->sector_count = 256;
331 info->size = 0x02000000;
332 }
wdenkd4ca31c2004-01-02 14:00:00 +0000333 break; /* => 32 MB */
wdenkf12e5682003-07-07 20:07:54 +0000334 case AMD_ID_LV640U_2:
335 if (addr[15] != AMD_ID_LV640U_3) {
wdenkd4ca31c2004-01-02 14:00:00 +0000336 debug ("Chip: AMLV640U -> unknown\n");
wdenkf12e5682003-07-07 20:07:54 +0000337 info->flash_id = FLASH_UNKNOWN;
wdenkd4ca31c2004-01-02 14:00:00 +0000338 } else {
339 debug ("Chip: AMLV640U\n");
wdenkf12e5682003-07-07 20:07:54 +0000340 info->flash_id += FLASH_AMLV640U;
341 info->sector_count = 128;
342 info->size = 0x01000000;
343 }
wdenkd4ca31c2004-01-02 14:00:00 +0000344 break; /* => 16 MB */
345 case AMD_ID_LV320B_2:
346 if (addr[15] != AMD_ID_LV320B_3) {
347 debug ("Chip: AMLV320B -> unknown\n");
348 info->flash_id = FLASH_UNKNOWN;
349 } else {
350 debug ("Chip: AMLV320B\n");
351 info->flash_id += FLASH_AMLV320B;
352 info->sector_count = 71;
353 info->size = 0x00800000;
354 }
355 break; /* => 8 MB */
wdenk71f95112003-06-15 22:40:42 +0000356 default:
wdenkd4ca31c2004-01-02 14:00:00 +0000357 debug ("Chip: *** unknown ***\n");
wdenk71f95112003-06-15 22:40:42 +0000358 info->flash_id = FLASH_UNKNOWN;
359 break;
360 }
361 break;
362# else /* ! TQM8xxM */
wdenkc6097192002-11-03 00:24:07 +0000363 case AMD_ID_LV400T:
364 info->flash_id += FLASH_AM400T;
365 info->sector_count = 11;
366 info->size = 0x00100000;
wdenkd4ca31c2004-01-02 14:00:00 +0000367 break; /* => 1 MB */
wdenkc6097192002-11-03 00:24:07 +0000368
369 case AMD_ID_LV400B:
370 info->flash_id += FLASH_AM400B;
371 info->sector_count = 11;
372 info->size = 0x00100000;
wdenkd4ca31c2004-01-02 14:00:00 +0000373 break; /* => 1 MB */
wdenkc6097192002-11-03 00:24:07 +0000374
375 case AMD_ID_LV800T:
376 info->flash_id += FLASH_AM800T;
377 info->sector_count = 19;
378 info->size = 0x00200000;
wdenkd4ca31c2004-01-02 14:00:00 +0000379 break; /* => 2 MB */
wdenkc6097192002-11-03 00:24:07 +0000380
381 case AMD_ID_LV800B:
382 info->flash_id += FLASH_AM800B;
383 info->sector_count = 19;
384 info->size = 0x00200000;
wdenkd4ca31c2004-01-02 14:00:00 +0000385 break; /* => 2 MB */
wdenkc6097192002-11-03 00:24:07 +0000386
wdenkc6097192002-11-03 00:24:07 +0000387 case AMD_ID_LV320T:
388 info->flash_id += FLASH_AM320T;
389 info->sector_count = 71;
390 info->size = 0x00800000;
wdenkd4ca31c2004-01-02 14:00:00 +0000391 break; /* => 8 MB */
wdenkc6097192002-11-03 00:24:07 +0000392
393 case AMD_ID_LV320B:
394 info->flash_id += FLASH_AM320B;
395 info->sector_count = 71;
396 info->size = 0x00800000;
wdenkd4ca31c2004-01-02 14:00:00 +0000397 break; /* => 8 MB */
wdenk71f95112003-06-15 22:40:42 +0000398#endif /* TQM8xxM */
wdenkf12e5682003-07-07 20:07:54 +0000399
400 case AMD_ID_LV160T:
401 info->flash_id += FLASH_AM160T;
402 info->sector_count = 35;
403 info->size = 0x00400000;
wdenkd4ca31c2004-01-02 14:00:00 +0000404 break; /* => 4 MB */
wdenkf12e5682003-07-07 20:07:54 +0000405
406 case AMD_ID_LV160B:
407 info->flash_id += FLASH_AM160B;
408 info->sector_count = 35;
409 info->size = 0x00400000;
wdenkd4ca31c2004-01-02 14:00:00 +0000410 break; /* => 4 MB */
411
412 case AMD_ID_DL163B:
413 info->flash_id += FLASH_AMDL163B;
414 info->sector_count = 39;
415 info->size = 0x00400000;
416 break; /* => 4 MB */
wdenkf12e5682003-07-07 20:07:54 +0000417
wdenkc6097192002-11-03 00:24:07 +0000418 default:
419 info->flash_id = FLASH_UNKNOWN;
420 return (0); /* => no or unknown flash */
421 }
422
423 /* set up sector start address table */
424 switch (value) {
wdenk71f95112003-06-15 22:40:42 +0000425#ifdef CONFIG_TQM8xxM /* mirror bit flash */
426 case AMD_ID_MIRROR:
427 switch (info->flash_id & FLASH_TYPEMASK) {
428 /* only known types here - no default */
429 case FLASH_AMLV128U:
wdenkf12e5682003-07-07 20:07:54 +0000430 case FLASH_AMLV640U:
431 case FLASH_AMLV320U:
wdenk71f95112003-06-15 22:40:42 +0000432 for (i = 0; i < info->sector_count; i++) {
433 info->start[i] = base;
434 base += 0x20000;
435 }
436 break;
wdenkd4ca31c2004-01-02 14:00:00 +0000437 case FLASH_AMLV320B:
438 for (i = 0; i < info->sector_count; i++) {
439 info->start[i] = base;
440 /*
441 * The first 8 sectors are 8 kB,
442 * all the other ones are 64 kB
443 */
444 base += (i < 8)
445 ? 2 * ( 8 << 10)
446 : 2 * (64 << 10);
447 }
448 break;
wdenk71f95112003-06-15 22:40:42 +0000449 }
450 break;
451# else /* ! TQM8xxM */
wdenkc6097192002-11-03 00:24:07 +0000452 case AMD_ID_LV400B:
453 case AMD_ID_LV800B:
wdenkc6097192002-11-03 00:24:07 +0000454 /* set sector offsets for bottom boot block type */
455 info->start[0] = base + 0x00000000;
456 info->start[1] = base + 0x00008000;
457 info->start[2] = base + 0x0000C000;
458 info->start[3] = base + 0x00010000;
459 for (i = 4; i < info->sector_count; i++) {
460 info->start[i] = base + (i * 0x00020000) - 0x00060000;
461 }
462 break;
463 case AMD_ID_LV400T:
464 case AMD_ID_LV800T:
wdenkc6097192002-11-03 00:24:07 +0000465 /* set sector offsets for top boot block type */
466 i = info->sector_count - 1;
467 info->start[i--] = base + info->size - 0x00008000;
468 info->start[i--] = base + info->size - 0x0000C000;
469 info->start[i--] = base + info->size - 0x00010000;
470 for (; i >= 0; i--) {
471 info->start[i] = base + i * 0x00020000;
472 }
473 break;
474 case AMD_ID_LV320B:
475 for (i = 0; i < info->sector_count; i++) {
476 info->start[i] = base;
477 /*
478 * The first 8 sectors are 8 kB,
479 * all the other ones are 64 kB
480 */
481 base += (i < 8)
482 ? 2 * ( 8 << 10)
483 : 2 * (64 << 10);
484 }
485 break;
486 case AMD_ID_LV320T:
487 for (i = 0; i < info->sector_count; i++) {
488 info->start[i] = base;
489 /*
490 * The last 8 sectors are 8 kB,
491 * all the other ones are 64 kB
492 */
493 base += (i < (info->sector_count - 8))
494 ? 2 * (64 << 10)
495 : 2 * ( 8 << 10);
496 }
497 break;
wdenk71f95112003-06-15 22:40:42 +0000498#endif /* TQM8xxM */
wdenkf12e5682003-07-07 20:07:54 +0000499 case AMD_ID_LV160B:
500 /* set sector offsets for bottom boot block type */
501 info->start[0] = base + 0x00000000;
502 info->start[1] = base + 0x00008000;
503 info->start[2] = base + 0x0000C000;
504 info->start[3] = base + 0x00010000;
505 for (i = 4; i < info->sector_count; i++) {
506 info->start[i] = base + (i * 0x00020000) - 0x00060000;
507 }
508 break;
509 case AMD_ID_LV160T:
510 /* set sector offsets for top boot block type */
511 i = info->sector_count - 1;
512 info->start[i--] = base + info->size - 0x00008000;
513 info->start[i--] = base + info->size - 0x0000C000;
514 info->start[i--] = base + info->size - 0x00010000;
515 for (; i >= 0; i--) {
516 info->start[i] = base + i * 0x00020000;
517 }
518 break;
wdenkd4ca31c2004-01-02 14:00:00 +0000519 case AMD_ID_DL163B:
520 for (i = 0; i < info->sector_count; i++) {
521 info->start[i] = base;
522 /*
523 * The first 8 sectors are 8 kB,
524 * all the other ones are 64 kB
525 */
526 base += (i < 8)
527 ? 2 * ( 8 << 10)
528 : 2 * (64 << 10);
529 }
530 break;
wdenkc6097192002-11-03 00:24:07 +0000531 default:
532 return (0);
533 break;
534 }
535
wdenkd4ca31c2004-01-02 14:00:00 +0000536#if 0
wdenkc6097192002-11-03 00:24:07 +0000537 /* check for protected sectors */
538 for (i = 0; i < info->sector_count; i++) {
539 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
540 /* D0 = 1 if protected */
541 addr = (volatile unsigned long *)(info->start[i]);
542 info->protect[i] = addr[2] & 1;
543 }
wdenkd4ca31c2004-01-02 14:00:00 +0000544#endif
wdenkc6097192002-11-03 00:24:07 +0000545
546 /*
547 * Prevent writes to uninitialized FLASH.
548 */
549 if (info->flash_id != FLASH_UNKNOWN) {
550 addr = (volatile unsigned long *)info->start[0];
551
552 *addr = 0x00F000F0; /* reset bank */
553 }
554
555 return (info->size);
556}
557
558
559/*-----------------------------------------------------------------------
560 */
561
562int flash_erase (flash_info_t *info, int s_first, int s_last)
563{
564 vu_long *addr = (vu_long*)(info->start[0]);
565 int flag, prot, sect, l_sect;
566 ulong start, now, last;
567
wdenk73a8b272003-06-05 19:27:42 +0000568 debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
569
wdenkc6097192002-11-03 00:24:07 +0000570 if ((s_first < 0) || (s_first > s_last)) {
571 if (info->flash_id == FLASH_UNKNOWN) {
572 printf ("- missing\n");
573 } else {
574 printf ("- no sectors to erase\n");
575 }
576 return 1;
577 }
578
579 if ((info->flash_id == FLASH_UNKNOWN) ||
580 (info->flash_id > FLASH_AMD_COMP)) {
581 printf ("Can't erase unknown flash type %08lx - aborted\n",
582 info->flash_id);
583 return 1;
584 }
585
586 prot = 0;
587 for (sect=s_first; sect<=s_last; ++sect) {
588 if (info->protect[sect]) {
589 prot++;
590 }
591 }
592
593 if (prot) {
594 printf ("- Warning: %d protected sectors will not be erased!\n",
595 prot);
596 } else {
597 printf ("\n");
598 }
599
600 l_sect = -1;
601
602 /* Disable interrupts which might cause a timeout here */
603 flag = disable_interrupts();
604
605 addr[0x0555] = 0x00AA00AA;
606 addr[0x02AA] = 0x00550055;
607 addr[0x0555] = 0x00800080;
608 addr[0x0555] = 0x00AA00AA;
609 addr[0x02AA] = 0x00550055;
610
611 /* Start erase on unprotected sectors */
612 for (sect = s_first; sect<=s_last; sect++) {
613 if (info->protect[sect] == 0) { /* not protected */
614 addr = (vu_long*)(info->start[sect]);
615 addr[0] = 0x00300030;
616 l_sect = sect;
617 }
618 }
619
620 /* re-enable interrupts if necessary */
621 if (flag)
622 enable_interrupts();
623
624 /* wait at least 80us - let's wait 1 ms */
625 udelay (1000);
626
627 /*
628 * We wait for the last triggered sector
629 */
630 if (l_sect < 0)
631 goto DONE;
632
633 start = get_timer (0);
634 last = start;
635 addr = (vu_long*)(info->start[l_sect]);
636 while ((addr[0] & 0x00800080) != 0x00800080) {
637 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
638 printf ("Timeout\n");
639 return 1;
640 }
641 /* show that we're waiting */
642 if ((now - last) > 1000) { /* every second */
643 putc ('.');
644 last = now;
645 }
646 }
647
648DONE:
649 /* reset to read mode */
650 addr = (volatile unsigned long *)info->start[0];
651 addr[0] = 0x00F000F0; /* reset bank */
652
653 printf (" done\n");
654 return 0;
655}
656
657/*-----------------------------------------------------------------------
658 * Copy memory to flash, returns:
659 * 0 - OK
660 * 1 - write timeout
661 * 2 - Flash not erased
662 */
663
664int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
665{
666 ulong cp, wp, data;
667 int i, l, rc;
668
669 wp = (addr & ~3); /* get lower word aligned address */
670
671 /*
672 * handle unaligned start bytes
673 */
674 if ((l = addr - wp) != 0) {
675 data = 0;
676 for (i=0, cp=wp; i<l; ++i, ++cp) {
677 data = (data << 8) | (*(uchar *)cp);
678 }
679 for (; i<4 && cnt>0; ++i) {
680 data = (data << 8) | *src++;
681 --cnt;
682 ++cp;
683 }
684 for (; cnt==0 && i<4; ++i, ++cp) {
685 data = (data << 8) | (*(uchar *)cp);
686 }
687
688 if ((rc = write_word(info, wp, data)) != 0) {
689 return (rc);
690 }
691 wp += 4;
692 }
693
694 /*
695 * handle word aligned part
696 */
697 while (cnt >= 4) {
698 data = 0;
699 for (i=0; i<4; ++i) {
700 data = (data << 8) | *src++;
701 }
702 if ((rc = write_word(info, wp, data)) != 0) {
703 return (rc);
704 }
705 wp += 4;
706 cnt -= 4;
707 }
708
709 if (cnt == 0) {
710 return (0);
711 }
712
713 /*
714 * handle unaligned tail bytes
715 */
716 data = 0;
717 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
718 data = (data << 8) | *src++;
719 --cnt;
720 }
721 for (; i<4; ++i, ++cp) {
722 data = (data << 8) | (*(uchar *)cp);
723 }
724
725 return (write_word(info, wp, data));
726}
727
728/*-----------------------------------------------------------------------
729 * Write a word to Flash, returns:
730 * 0 - OK
731 * 1 - write timeout
732 * 2 - Flash not erased
733 */
734static int write_word (flash_info_t *info, ulong dest, ulong data)
735{
736 vu_long *addr = (vu_long*)(info->start[0]);
737 ulong start;
738 int flag;
739
740 /* Check if Flash is (sufficiently) erased */
741 if ((*((vu_long *)dest) & data) != data) {
742 return (2);
743 }
744 /* Disable interrupts which might cause a timeout here */
745 flag = disable_interrupts();
746
747 addr[0x0555] = 0x00AA00AA;
748 addr[0x02AA] = 0x00550055;
749 addr[0x0555] = 0x00A000A0;
750
751 *((vu_long *)dest) = data;
752
753 /* re-enable interrupts if necessary */
754 if (flag)
755 enable_interrupts();
756
757 /* data polling for D7 */
758 start = get_timer (0);
759 while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
760 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
761 return (1);
762 }
763 }
764 return (0);
765}
766
767/*-----------------------------------------------------------------------
768 */