blob: 1ccd4c5183a208d6ffcbc4b48f918f8eec93a453 [file] [log] [blame]
Kumar Gala0e7927d2008-08-27 01:04:07 -05001/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
7 */
8
9#include <common.h>
10#include <i2c.h>
11
York Sun5614e712013-09-30 09:22:09 -070012#include <fsl_ddr_sdram.h>
13#include <fsl_ddr_dimm_params.h>
Kumar Gala0e7927d2008-08-27 01:04:07 -050014
Haiying Wangdfb49102008-10-03 12:36:55 -040015void fsl_ddr_board_options(memctl_options_t *popts,
16 dimm_params_t *pdimm,
17 unsigned int ctrl_num)
Kumar Gala0e7927d2008-08-27 01:04:07 -050018{
19 /*
20 * Factors to consider for CPO:
21 * - frequency
22 * - ddr1 vs. ddr2
23 */
24 popts->cpo_override = 0;
25
26 /*
27 * Factors to consider for write data delay:
28 * - number of DIMMs
29 *
30 * 1 = 1/4 clock delay
31 * 2 = 1/2 clock delay
32 * 3 = 3/4 clock delay
33 * 4 = 1 clock delay
34 * 5 = 5/4 clock delay
35 * 6 = 3/2 clock delay
36 */
37 popts->write_data_delay = 3;
38
Dave Liub4983e12008-11-21 16:31:43 +080039 /* 2T timing enable */
Priyanka Jain0dd38a32013-09-25 10:41:19 +053040 popts->twot_en = 1;
Dave Liub4983e12008-11-21 16:31:43 +080041
Kumar Gala0e7927d2008-08-27 01:04:07 -050042 /*
43 * Factors to consider for half-strength driver enable:
44 * - number of DIMMs installed
45 */
46 popts->half_strength_driver_enable = 0;
47}