TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de> |
| 3 | * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com> |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 6 | */ |
| 7 | |
Wolfgang Denk | 25ddd1f | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 8 | #include <asm-offsets.h> |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 9 | #include <config.h> |
| 10 | #include "version.h" |
TsiChung Liew | dd9f054 | 2010-03-11 22:12:53 -0600 | [diff] [blame] | 11 | #include <asm/cache.h> |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 12 | |
| 13 | #ifndef CONFIG_IDENT_STRING |
| 14 | #define CONFIG_IDENT_STRING "" |
| 15 | #endif |
| 16 | |
| 17 | #define _START _start |
| 18 | #define _FAULT _fault |
| 19 | |
| 20 | #define SAVE_ALL \ |
| 21 | move.w #0x2700,%sr; /* disable intrs */ \ |
| 22 | subl #60,%sp; /* space for 15 regs */ \ |
| 23 | moveml %d0-%d7/%a0-%a6,%sp@; |
| 24 | |
| 25 | #define RESTORE_ALL \ |
| 26 | moveml %sp@,%d0-%d7/%a0-%a6; \ |
| 27 | addl #60,%sp; /* space for 15 regs */ \ |
| 28 | rte; |
| 29 | |
| 30 | .text |
| 31 | /* |
| 32 | * Vector table. This is used for initial platform startup. |
| 33 | * These vectors are to catch any un-intended traps. |
| 34 | */ |
| 35 | _vectors: |
| 36 | |
| 37 | INITSP: .long 0x00000000 /* Initial SP */ |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 38 | INITPC: .long _START /* Initial PC */ |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 39 | vector02: .long _FAULT /* Access Error */ |
| 40 | vector03: .long _FAULT /* Address Error */ |
| 41 | vector04: .long _FAULT /* Illegal Instruction */ |
| 42 | vector05: .long _FAULT /* Reserved */ |
| 43 | vector06: .long _FAULT /* Reserved */ |
| 44 | vector07: .long _FAULT /* Reserved */ |
| 45 | vector08: .long _FAULT /* Privilege Violation */ |
| 46 | vector09: .long _FAULT /* Trace */ |
| 47 | vector0A: .long _FAULT /* Unimplemented A-Line */ |
| 48 | vector0B: .long _FAULT /* Unimplemented F-Line */ |
| 49 | vector0C: .long _FAULT /* Debug Interrupt */ |
| 50 | vector0D: .long _FAULT /* Reserved */ |
| 51 | vector0E: .long _FAULT /* Format Error */ |
| 52 | vector0F: .long _FAULT /* Unitialized Int. */ |
| 53 | |
| 54 | /* Reserved */ |
| 55 | vector10_17: |
| 56 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 57 | |
| 58 | vector18: .long _FAULT /* Spurious Interrupt */ |
| 59 | vector19: .long _FAULT /* Autovector Level 1 */ |
| 60 | vector1A: .long _FAULT /* Autovector Level 2 */ |
| 61 | vector1B: .long _FAULT /* Autovector Level 3 */ |
| 62 | vector1C: .long _FAULT /* Autovector Level 4 */ |
| 63 | vector1D: .long _FAULT /* Autovector Level 5 */ |
| 64 | vector1E: .long _FAULT /* Autovector Level 6 */ |
| 65 | vector1F: .long _FAULT /* Autovector Level 7 */ |
| 66 | |
| 67 | /* TRAP #0 - #15 */ |
| 68 | vector20_2F: |
| 69 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 70 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 71 | |
| 72 | /* Reserved */ |
| 73 | vector30_3F: |
| 74 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 75 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 76 | |
| 77 | vector64_127: |
| 78 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 79 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 80 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 81 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 82 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 83 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 84 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 85 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 86 | |
| 87 | vector128_191: |
| 88 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 89 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 90 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 91 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 92 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 93 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 94 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 95 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 96 | |
| 97 | vector192_255: |
| 98 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 99 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 100 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 101 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 102 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 103 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 104 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 105 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
| 106 | |
| 107 | .text |
| 108 | |
| 109 | .globl _start |
| 110 | _start: |
| 111 | nop |
| 112 | nop |
| 113 | move.w #0x2700,%sr /* Mask off Interrupt */ |
| 114 | |
| 115 | /* Set vector base register at the beginning of the Flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 116 | move.l #CONFIG_SYS_FLASH_BASE, %d0 |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 117 | movec %d0, %VBR |
| 118 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 119 | move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0 |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 120 | movec %d0, %RAMBAR1 |
| 121 | |
| 122 | /* invalidate and disable cache */ |
TsiChung Liew | dd9f054 | 2010-03-11 22:12:53 -0600 | [diff] [blame] | 123 | move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */ |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 124 | movec %d0, %CACR /* Invalidate cache */ |
| 125 | nop |
| 126 | move.l #0, %d0 |
| 127 | movec %d0, %ACR0 |
| 128 | movec %d0, %ACR1 |
| 129 | |
| 130 | /* initialize general use internal ram */ |
| 131 | move.l #0, %d0 |
TsiChung Liew | dd9f054 | 2010-03-11 22:12:53 -0600 | [diff] [blame] | 132 | move.l #(ICACHE_STATUS), %a1 /* icache */ |
| 133 | move.l #(DCACHE_STATUS), %a2 /* icache */ |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 134 | move.l %d0, (%a1) |
| 135 | move.l %d0, (%a2) |
| 136 | |
| 137 | /* set stackpointer to end of internal ram to get some stackspace for the |
| 138 | first c-code */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 139 | move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 140 | clr.l %sp@- |
| 141 | |
| 142 | move.l #__got_start, %a5 /* put relocation table address to a5 */ |
| 143 | |
| 144 | bsr cpu_init_f /* run low-level CPU init code (from flash) */ |
| 145 | bsr board_init_f /* run low-level board init code (from flash) */ |
| 146 | |
| 147 | /* board_init_f() does not return */ |
| 148 | |
| 149 | /*------------------------------------------------------------------------------*/ |
| 150 | |
| 151 | /* |
| 152 | * void relocate_code (addr_sp, gd, addr_moni) |
| 153 | * |
| 154 | * This "function" does not return, instead it continues in RAM |
| 155 | * after relocating the monitor code. |
| 156 | * |
| 157 | * r3 = dest |
| 158 | * r4 = src |
| 159 | * r5 = length in bytes |
| 160 | * r6 = cachelinesize |
| 161 | */ |
| 162 | .globl relocate_code |
| 163 | relocate_code: |
| 164 | link.w %a6,#0 |
| 165 | move.l 8(%a6), %sp /* set new stack pointer */ |
| 166 | |
| 167 | move.l 12(%a6), %d0 /* Save copy of Global Data pointer */ |
| 168 | move.l 16(%a6), %a0 /* Save copy of Destination Address */ |
| 169 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 170 | move.l #CONFIG_SYS_MONITOR_BASE, %a1 |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 171 | move.l #__init_end, %a2 |
| 172 | move.l %a0, %a3 |
| 173 | |
| 174 | /* copy the code to RAM */ |
| 175 | 1: |
| 176 | move.l (%a1)+, (%a3)+ |
| 177 | cmp.l %a1,%a2 |
| 178 | bgt.s 1b |
| 179 | |
| 180 | /* |
| 181 | * We are done. Do not return, instead branch to second part of board |
| 182 | * initialization, now running from RAM. |
| 183 | */ |
| 184 | move.l %a0, %a1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 185 | add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1 |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 186 | jmp (%a1) |
| 187 | |
| 188 | in_ram: |
| 189 | |
| 190 | clear_bss: |
| 191 | /* |
| 192 | * Now clear BSS segment |
| 193 | */ |
| 194 | move.l %a0, %a1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 195 | add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1 |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 196 | move.l %a0, %d1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 197 | add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1 |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 198 | 6: |
| 199 | clr.l (%a1)+ |
| 200 | cmp.l %a1,%d1 |
| 201 | bgt.s 6b |
| 202 | |
| 203 | /* |
| 204 | * fix got table in RAM |
| 205 | */ |
| 206 | move.l %a0, %a1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 207 | add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1 |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 208 | move.l %a1,%a5 /* * fix got pointer register a5 */ |
| 209 | |
| 210 | move.l %a0, %a2 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 211 | add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2 |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 212 | |
| 213 | 7: |
| 214 | move.l (%a1),%d1 |
| 215 | sub.l #_start,%d1 |
| 216 | add.l %a0,%d1 |
| 217 | move.l %d1,(%a1)+ |
| 218 | cmp.l %a2, %a1 |
| 219 | bne 7b |
| 220 | |
| 221 | /* calculate relative jump to board_init_r in ram */ |
| 222 | move.l %a0, %a1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 223 | add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1 |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 224 | |
| 225 | /* set parameters for board_init_r */ |
| 226 | move.l %a0,-(%sp) /* dest_addr */ |
| 227 | move.l %d0,-(%sp) /* gd */ |
| 228 | jsr (%a1) |
| 229 | |
| 230 | /*------------------------------------------------------------------------------*/ |
| 231 | /* exception code */ |
| 232 | .globl _fault |
| 233 | _fault: |
Marek Vasut | 37d6cc3 | 2012-10-03 13:28:43 +0000 | [diff] [blame] | 234 | bra _fault |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 235 | .globl _exc_handler |
| 236 | |
| 237 | _exc_handler: |
| 238 | SAVE_ALL |
| 239 | movel %sp,%sp@- |
| 240 | bsr exc_handler |
| 241 | addql #4,%sp |
| 242 | RESTORE_ALL |
| 243 | |
| 244 | .globl _int_handler |
| 245 | _int_handler: |
| 246 | SAVE_ALL |
| 247 | movel %sp,%sp@- |
| 248 | bsr int_handler |
| 249 | addql #4,%sp |
| 250 | RESTORE_ALL |
| 251 | |
| 252 | /*------------------------------------------------------------------------------*/ |
TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 253 | |
| 254 | .globl version_string |
| 255 | version_string: |
Andreas Bießmann | 09c2e90 | 2011-07-18 20:24:04 +0200 | [diff] [blame] | 256 | .ascii U_BOOT_VERSION_STRING, "\0" |
TsiChung Liew | 9b46432 | 2008-03-28 08:47:45 -0500 | [diff] [blame] | 257 | .align 4 |