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wdenk531716e2003-09-13 19:01:12 +00001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk531716e2003-09-13 19:01:12 +00006 */
7
8#include <common.h>
9
Wolfgang Denkd87080b2006-03-31 18:32:53 +020010DECLARE_GLOBAL_DATA_PTR;
11
wdenk531716e2003-09-13 19:01:12 +000012#ifdef CONFIG_HARD_I2C
13
14#include <mpc5xxx.h>
15#include <i2c.h>
16
Heiko Schocher00913372010-11-10 08:57:55 +010017#if !defined(CONFIG_I2C_MULTI_BUS)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020018#if (CONFIG_SYS_I2C_MODULE == 2)
wdenk531716e2003-09-13 19:01:12 +000019#define I2C_BASE MPC5XXX_I2C2
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020020#elif (CONFIG_SYS_I2C_MODULE == 1)
wdenk531716e2003-09-13 19:01:12 +000021#define I2C_BASE MPC5XXX_I2C1
dzuab209d52003-09-30 14:08:43 +000022#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020023#error CONFIG_SYS_I2C_MODULE is not properly configured
wdenk531716e2003-09-13 19:01:12 +000024#endif
Heiko Schocher00913372010-11-10 08:57:55 +010025#else
26static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
27 CONFIG_SYS_SPD_BUS_NUM;
28static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED,
29 CONFIG_SYS_I2C_SPEED};
30
31static const unsigned long i2c_dev[2] = {
32 MPC5XXX_I2C1,
33 MPC5XXX_I2C2,
34};
35
36#define I2C_BASE ((struct mpc5xxx_i2c *)i2c_dev[i2c_bus_num])
37#endif
wdenk531716e2003-09-13 19:01:12 +000038
Jon Smirl3c853f32009-04-04 17:44:51 -040039#define I2C_TIMEOUT 6667
wdenk531716e2003-09-13 19:01:12 +000040#define I2C_RETRIES 3
41
dzuab209d52003-09-30 14:08:43 +000042struct mpc5xxx_i2c_tap {
43 int scl2tap;
44 int tap2tap;
45};
46
wdenk531716e2003-09-13 19:01:12 +000047static int mpc_reg_in (volatile u32 *reg);
48static void mpc_reg_out (volatile u32 *reg, int val, int mask);
49static int wait_for_bb (void);
50static int wait_for_pin (int *status);
51static int do_address (uchar chip, char rdwr_flag);
52static int send_bytes (uchar chip, char *buf, int len);
53static int receive_bytes (uchar chip, char *buf, int len);
dzuab209d52003-09-30 14:08:43 +000054static int mpc_get_fdr (int);
wdenk531716e2003-09-13 19:01:12 +000055
56static int mpc_reg_in(volatile u32 *reg)
57{
Wolfgang Denk77ddac92005-10-13 16:45:02 +020058 int ret = *reg >> 24;
wdenk531716e2003-09-13 19:01:12 +000059 __asm__ __volatile__ ("eieio");
Wolfgang Denk77ddac92005-10-13 16:45:02 +020060 return ret;
wdenk531716e2003-09-13 19:01:12 +000061}
62
63static void mpc_reg_out(volatile u32 *reg, int val, int mask)
64{
65 int tmp;
66
67 if (!mask) {
68 *reg = val << 24;
69 } else {
70 tmp = mpc_reg_in(reg);
71 *reg = ((tmp & ~mask) | (val & mask)) << 24;
72 }
73 __asm__ __volatile__ ("eieio");
74
75 return;
76}
77
78static int wait_for_bb(void)
79{
80 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
81 int timeout = I2C_TIMEOUT;
82 int status;
83
84 status = mpc_reg_in(&regs->msr);
85
86 while (timeout-- && (status & I2C_BB)) {
wdenk531716e2003-09-13 19:01:12 +000087 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
Wolfgang Denk93067492011-11-04 15:55:06 +000088 (void)mpc_reg_in(&regs->mdr);
wdenk531716e2003-09-13 19:01:12 +000089 mpc_reg_out(&regs->mcr, 0, I2C_STA);
90 mpc_reg_out(&regs->mcr, 0, 0);
91 mpc_reg_out(&regs->mcr, I2C_EN, 0);
Jon Smirl3c853f32009-04-04 17:44:51 -040092 udelay(15);
wdenk531716e2003-09-13 19:01:12 +000093 status = mpc_reg_in(&regs->msr);
94 }
95
96 return (status & I2C_BB);
97}
98
99static int wait_for_pin(int *status)
100{
101 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
102 int timeout = I2C_TIMEOUT;
103
104 *status = mpc_reg_in(&regs->msr);
105
106 while (timeout-- && !(*status & I2C_IF)) {
Jon Smirl3c853f32009-04-04 17:44:51 -0400107 udelay(15);
wdenk531716e2003-09-13 19:01:12 +0000108 *status = mpc_reg_in(&regs->msr);
109 }
110
111 if (!(*status & I2C_IF)) {
112 return -1;
113 }
114
115 mpc_reg_out(&regs->msr, 0, I2C_IF);
116
117 return 0;
118}
119
120static int do_address(uchar chip, char rdwr_flag)
121{
122 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
123 int status;
124
125 chip <<= 1;
126
127 if (rdwr_flag) {
128 chip |= 1;
129 }
130
131 mpc_reg_out(&regs->mcr, I2C_TX, I2C_TX);
132 mpc_reg_out(&regs->mdr, chip, 0);
133
wdenk42d1f032003-10-15 23:53:47 +0000134 if (wait_for_pin(&status)) {
135 return -2;
136 }
wdenk531716e2003-09-13 19:01:12 +0000137
wdenk42d1f032003-10-15 23:53:47 +0000138 if (status & I2C_RXAK) {
139 return -3;
140 }
wdenk531716e2003-09-13 19:01:12 +0000141
142 return 0;
143}
144
145static int send_bytes(uchar chip, char *buf, int len)
146{
147 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
148 int wrcount;
149 int status;
150
151 for (wrcount = 0; wrcount < len; ++wrcount) {
152
153 mpc_reg_out(&regs->mdr, buf[wrcount], 0);
154
155 if (wait_for_pin(&status)) {
156 break;
157 }
158
159 if (status & I2C_RXAK) {
160 break;
161 }
162
163 }
164
165 return !(wrcount == len);
166}
167
168static int receive_bytes(uchar chip, char *buf, int len)
169{
170 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
171 int dummy = 1;
172 int rdcount = 0;
173 int status;
174 int i;
175
176 mpc_reg_out(&regs->mcr, 0, I2C_TX);
177
178 for (i = 0; i < len; ++i) {
179 buf[rdcount] = mpc_reg_in(&regs->mdr);
180
181 if (dummy) {
182 dummy = 0;
183 } else {
184 rdcount++;
185 }
186
187
188 if (wait_for_pin(&status)) {
189 return -4;
190 }
191 }
192
193 mpc_reg_out(&regs->mcr, I2C_TXAK, I2C_TXAK);
194 buf[rdcount++] = mpc_reg_in(&regs->mdr);
195
196 if (wait_for_pin(&status)) {
197 return -5;
198 }
199
200 mpc_reg_out(&regs->mcr, 0, I2C_TXAK);
201
202 return 0;
203}
204
Eric Millbrandt5da71ef2009-09-03 08:09:44 -0500205#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
206
207#define FDR510(x) (u8) (((x & 0x20) >> 3) | (x & 0x3))
208#define FDR432(x) (u8) ((x & 0x1C) >> 2)
209/*
210 * Reset any i2c devices that may have been interrupted during a system reset.
211 * Normally this would be accomplished by clocking the line until SCL and SDA
212 * are released and then sending a start condtiion (From an Atmel datasheet).
213 * There is no direct access to the i2c pins so instead create start commands
214 * through the i2c interface. Send a start command then delay for the SDA Hold
215 * time, repeat this by disabling/enabling the bus a total of 9 times.
216 */
217static void send_reset(void)
218{
219 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
220 int i;
221 u32 delay;
222 u8 fdr;
223 int SDA_Tap[] = { 3, 3, 4, 4, 1, 1, 2, 2};
224 struct mpc5xxx_i2c_tap scltap[] = {
225 {4, 1},
226 {4, 2},
227 {6, 4},
228 {6, 8},
229 {14, 16},
230 {30, 32},
231 {62, 64},
232 {126, 128}
233 };
234
235 fdr = (u8)mpc_reg_in(&regs->mfdr);
236
237 delay = scltap[FDR432(fdr)].scl2tap + ((SDA_Tap[FDR510(fdr)] - 1) * \
238 scltap[FDR432(fdr)].tap2tap) + 3;
239
240 for (i = 0; i < 9; i++) {
241 mpc_reg_out(&regs->mcr, I2C_EN|I2C_STA|I2C_TX, I2C_INIT_MASK);
242 udelay(delay);
243 mpc_reg_out(&regs->mcr, 0, I2C_INIT_MASK);
244 udelay(delay);
245 }
246
247 mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
248}
249#endif /* CONFIG_SYS_I2c_INIT_MPC5XXX */
250
wdenk531716e2003-09-13 19:01:12 +0000251/**************** I2C API ****************/
252
253void i2c_init(int speed, int saddr)
254{
255 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
256
257 mpc_reg_out(&regs->mcr, 0, 0);
258 mpc_reg_out(&regs->madr, saddr << 1, 0);
259
260 /* Set clock
261 */
dzuab209d52003-09-30 14:08:43 +0000262 mpc_reg_out(&regs->mfdr, mpc_get_fdr(speed), 0);
wdenk531716e2003-09-13 19:01:12 +0000263
264 /* Enable module
265 */
266 mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
267 mpc_reg_out(&regs->msr, 0, I2C_IF);
268
Eric Millbrandt5da71ef2009-09-03 08:09:44 -0500269#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
270 send_reset();
271#endif
wdenk531716e2003-09-13 19:01:12 +0000272 return;
273}
274
dzuab209d52003-09-30 14:08:43 +0000275static int mpc_get_fdr(int speed)
276{
dzuab209d52003-09-30 14:08:43 +0000277 static int fdr = -1;
dzuab209d52003-09-30 14:08:43 +0000278
279 if (fdr == -1) {
wdenk5cf9da42003-11-07 13:42:26 +0000280 ulong best_speed = 0;
281 ulong divider;
dzuab209d52003-09-30 14:08:43 +0000282 ulong ipb, scl;
283 ulong bestmatch = 0xffffffffUL;
284 int best_i = 0, best_j = 0, i, j;
285 int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
286 struct mpc5xxx_i2c_tap scltap[] = {
287 {4, 1},
288 {4, 2},
289 {6, 4},
290 {6, 8},
291 {14, 16},
292 {30, 32},
293 {62, 64},
294 {126, 128}
295 };
296
Simon Glassb2877492012-12-13 20:48:53 +0000297 ipb = gd->arch.ipb_clk;
dzuab209d52003-09-30 14:08:43 +0000298 for (i = 7; i >= 0; i--) {
299 for (j = 7; j >= 0; j--) {
wdenk42d1f032003-10-15 23:53:47 +0000300 scl = 2 * (scltap[j].scl2tap +
dzuab209d52003-09-30 14:08:43 +0000301 (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2);
302 if (ipb <= speed*scl) {
303 if ((speed*scl - ipb) < bestmatch) {
304 bestmatch = speed*scl - ipb;
305 best_i = i;
306 best_j = j;
307 best_speed = ipb/scl;
308 }
309 }
310 }
311 }
wdenk5cf9da42003-11-07 13:42:26 +0000312 divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
313 if (gd->flags & GD_FLG_RELOC) {
314 fdr = divider;
315 } else {
Graeme Russe3e454c2011-08-29 02:14:05 +0000316 printf("%ld kHz, ", best_speed / 1000);
wdenk5cf9da42003-11-07 13:42:26 +0000317 return divider;
318 }
dzuab209d52003-09-30 14:08:43 +0000319 }
320
321 return fdr;
322}
323
wdenk531716e2003-09-13 19:01:12 +0000324int i2c_probe(uchar chip)
325{
326 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
327 int i;
328
329 for (i = 0; i < I2C_RETRIES; i++) {
330 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
331
332 if (! do_address(chip, 0)) {
333 mpc_reg_out(&regs->mcr, 0, I2C_STA);
wdenk697037f2004-06-09 15:29:49 +0000334 udelay(500);
wdenk531716e2003-09-13 19:01:12 +0000335 break;
336 }
337
338 mpc_reg_out(&regs->mcr, 0, I2C_STA);
339 udelay(500);
340 }
341
342 return (i == I2C_RETRIES);
343}
344
345int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
346{
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200347 char xaddr[4];
wdenk531716e2003-09-13 19:01:12 +0000348 struct mpc5xxx_i2c * regs = (struct mpc5xxx_i2c *)I2C_BASE;
349 int ret = -1;
350
351 xaddr[0] = (addr >> 24) & 0xFF;
352 xaddr[1] = (addr >> 16) & 0xFF;
353 xaddr[2] = (addr >> 8) & 0xFF;
354 xaddr[3] = addr & 0xFF;
355
356 if (wait_for_bb()) {
Graeme Russe3e454c2011-08-29 02:14:05 +0000357 printf("i2c_read: bus is busy\n");
wdenk531716e2003-09-13 19:01:12 +0000358 goto Done;
359 }
360
361 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
362 if (do_address(chip, 0)) {
Graeme Russe3e454c2011-08-29 02:14:05 +0000363 printf("i2c_read: failed to address chip\n");
wdenk531716e2003-09-13 19:01:12 +0000364 goto Done;
365 }
366
367 if (send_bytes(chip, &xaddr[4-alen], alen)) {
Graeme Russe3e454c2011-08-29 02:14:05 +0000368 printf("i2c_read: send_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000369 goto Done;
370 }
371
372 mpc_reg_out(&regs->mcr, I2C_RSTA, I2C_RSTA);
373 if (do_address(chip, 1)) {
Graeme Russe3e454c2011-08-29 02:14:05 +0000374 printf("i2c_read: failed to address chip\n");
wdenk531716e2003-09-13 19:01:12 +0000375 goto Done;
376 }
377
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200378 if (receive_bytes(chip, (char *)buf, len)) {
Graeme Russe3e454c2011-08-29 02:14:05 +0000379 printf("i2c_read: receive_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000380 goto Done;
381 }
382
383 ret = 0;
384Done:
385 mpc_reg_out(&regs->mcr, 0, I2C_STA);
386 return ret;
387}
388
389int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
390{
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200391 char xaddr[4];
wdenk531716e2003-09-13 19:01:12 +0000392 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
393 int ret = -1;
394
395 xaddr[0] = (addr >> 24) & 0xFF;
396 xaddr[1] = (addr >> 16) & 0xFF;
397 xaddr[2] = (addr >> 8) & 0xFF;
398 xaddr[3] = addr & 0xFF;
399
wdenk42d1f032003-10-15 23:53:47 +0000400 if (wait_for_bb()) {
Graeme Russe3e454c2011-08-29 02:14:05 +0000401 printf("i2c_write: bus is busy\n");
wdenk531716e2003-09-13 19:01:12 +0000402 goto Done;
403 }
404
wdenk42d1f032003-10-15 23:53:47 +0000405 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
406 if (do_address(chip, 0)) {
Graeme Russe3e454c2011-08-29 02:14:05 +0000407 printf("i2c_write: failed to address chip\n");
wdenk531716e2003-09-13 19:01:12 +0000408 goto Done;
409 }
410
411 if (send_bytes(chip, &xaddr[4-alen], alen)) {
Graeme Russe3e454c2011-08-29 02:14:05 +0000412 printf("i2c_write: send_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000413 goto Done;
414 }
415
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200416 if (send_bytes(chip, (char *)buf, len)) {
Graeme Russe3e454c2011-08-29 02:14:05 +0000417 printf("i2c_write: send_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000418 goto Done;
419 }
420
421 ret = 0;
422Done:
423 mpc_reg_out(&regs->mcr, 0, I2C_STA);
424 return ret;
425}
426
Heiko Schocher00913372010-11-10 08:57:55 +0100427#if defined(CONFIG_I2C_MULTI_BUS)
428int i2c_set_bus_num(unsigned int bus)
429{
430 if (bus > 1)
431 return -1;
432
433 i2c_bus_num = bus;
434 i2c_init(i2c_bus_speed[bus], CONFIG_SYS_I2C_SLAVE);
435 return 0;
436}
437
438int i2c_set_bus_speed(unsigned int speed)
439{
440 i2c_init(speed, CONFIG_SYS_I2C_SLAVE);
441 return 0;
442}
443
444unsigned int i2c_get_bus_num(void)
445{
446 return i2c_bus_num;
447}
448
449unsigned int i2c_get_bus_speed(void)
450{
451 return i2c_bus_speed[i2c_bus_num];
452}
453#endif
454
455
wdenk531716e2003-09-13 19:01:12 +0000456#endif /* CONFIG_HARD_I2C */