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Stefan Roese2bae75a2015-04-25 06:29:56 +02001/*
2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _CONFIG_DB_88F6820_GP_H
8#define _CONFIG_DB_88F6820_GP_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
Stefan Roese2bae75a2015-04-25 06:29:56 +020013
Stefan Roese2bae75a2015-04-25 06:29:56 +020014#define CONFIG_DISPLAY_BOARDINFO_LATE
15
Stefan Roese2923c2d2015-08-06 14:27:36 +020016/*
17 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
18 * for DDR ECC byte filling in the SPL before loading the main
19 * U-Boot into it.
20 */
21#define CONFIG_SYS_TEXT_BASE 0x00800000
Stefan Roese2bae75a2015-04-25 06:29:56 +020022#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
23
24/*
25 * Commands configuration
26 */
Stefan Roese2bae75a2015-04-25 06:29:56 +020027#define CONFIG_CMD_ENV
Stefan Roesece2cb1d2015-08-11 12:50:58 +020028#define CONFIG_CMD_PCI
Simon Glassc649e3c2016-05-01 11:36:02 -060029#define CONFIG_SCSI
Stefan Roese2bae75a2015-04-25 06:29:56 +020030
31/* I2C */
32#define CONFIG_SYS_I2C
33#define CONFIG_SYS_I2C_MVTWSI
34#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
35#define CONFIG_SYS_I2C_SLAVE 0x0
36#define CONFIG_SYS_I2C_SPEED 100000
37
38/* SPI NOR flash default params, used by sf commands */
39#define CONFIG_SF_DEFAULT_SPEED 1000000
40#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
Stefan Roese2bae75a2015-04-25 06:29:56 +020041
Stefan Roesee80f1e82015-06-29 14:58:11 +020042/*
43 * SDIO/MMC Card Configuration
44 */
Stefan Roesee80f1e82015-06-29 14:58:11 +020045#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
46
Stefan Roese7cbaff92015-06-29 14:58:14 +020047/*
48 * SATA/SCSI/AHCI configuration
49 */
50#define CONFIG_LIBATA
51#define CONFIG_SCSI_AHCI
52#define CONFIG_SCSI_AHCI_PLAT
53#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
54#define CONFIG_SYS_SCSI_MAX_LUN 1
55#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
56 CONFIG_SYS_SCSI_MAX_LUN)
57
Stefan Roesee80f1e82015-06-29 14:58:11 +020058/* Partition support */
Stefan Roesee80f1e82015-06-29 14:58:11 +020059
60/* Additional FS support/configuration */
61#define CONFIG_SUPPORT_VFAT
62
Stefan Roese59565732015-06-29 14:58:16 +020063/* USB/EHCI configuration */
Stefan Roese59565732015-06-29 14:58:16 +020064#define CONFIG_EHCI_IS_TDI
65
Stefan Roese2bae75a2015-04-25 06:29:56 +020066/* Environment in SPI NOR flash */
67#define CONFIG_ENV_IS_IN_SPI_FLASH
68#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
69#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
70#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
71
72#define CONFIG_PHY_MARVELL /* there is a marvell phy */
Stefan Roese2bae75a2015-04-25 06:29:56 +020073#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
74
Stefan Roesece2cb1d2015-08-11 12:50:58 +020075/* PCIe support */
Stefan Roese64512232015-11-25 07:37:00 +010076#ifndef CONFIG_SPL_BUILD
Stefan Roesece2cb1d2015-08-11 12:50:58 +020077#define CONFIG_PCI_MVEBU
Stefan Roesece2cb1d2015-08-11 12:50:58 +020078#define CONFIG_PCI_SCAN_SHOW
Stefan Roese64512232015-11-25 07:37:00 +010079#endif
Stefan Roesece2cb1d2015-08-11 12:50:58 +020080
Stefan Roese2bae75a2015-04-25 06:29:56 +020081#define CONFIG_SYS_ALT_MEMTEST
82
Kevin Smith3fd38af2015-05-18 16:09:46 +000083/* Keep device tree and initrd in lower memory so the kernel can access them */
84#define CONFIG_EXTRA_ENV_SETTINGS \
85 "fdt_high=0x10000000\0" \
86 "initrd_high=0x10000000\0"
87
Stefan Roese9e30b312015-03-25 13:35:15 +010088/* SPL */
Stefan Roese7853c502015-07-20 11:20:40 +020089/*
90 * Select the boot device here
91 *
92 * Currently supported are:
93 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
94 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
95 */
96#define SPL_BOOT_SPI_NOR_FLASH 1
97#define SPL_BOOT_SDIO_MMC_CARD 2
98#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
99
Stefan Roese9e30b312015-03-25 13:35:15 +0100100/* Defines for SPL */
101#define CONFIG_SPL_FRAMEWORK
102#define CONFIG_SPL_SIZE (140 << 10)
103#define CONFIG_SPL_TEXT_BASE 0x40000030
104#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
105
106#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
107#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
108
Stefan Roese64512232015-11-25 07:37:00 +0100109#ifdef CONFIG_SPL_BUILD
110#define CONFIG_SYS_MALLOC_SIMPLE
111#endif
Stefan Roese9e30b312015-03-25 13:35:15 +0100112
113#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
114#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
115
Stefan Roese7853c502015-07-20 11:20:40 +0200116#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
Stefan Roese9e30b312015-03-25 13:35:15 +0100117/* SPL related SPI defines */
Stefan Roese9e30b312015-03-25 13:35:15 +0100118#define CONFIG_SPL_SPI_LOAD
Stefan Roese09a54c02015-11-20 13:51:57 +0100119#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
Stefan Roese7853c502015-07-20 11:20:40 +0200120#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
121#endif
122
123#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
124/* SPL related MMC defines */
Stefan Roese7853c502015-07-20 11:20:40 +0200125#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
126#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
127#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
Stefan Roese7853c502015-07-20 11:20:40 +0200128#ifdef CONFIG_SPL_BUILD
129#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
130#endif
131#endif
Stefan Roese9e30b312015-03-25 13:35:15 +0100132
Stefan Roese2bae75a2015-04-25 06:29:56 +0200133/*
134 * mv-common.h should be defined after CMD configs since it used them
135 * to enable certain macros
136 */
137#include "mv-common.h"
138
139#endif /* _CONFIG_DB_88F6820_GP_H */