| Simon Glass | e85cbe8 | 2020-02-06 09:55:01 -0700 | [diff] [blame^] | 1 | * Intel Advanced Configuration and Power Interface General Purpose Events |
| 2 | |
| 3 | This describes an interrupt controller which provides access to GPEs supported |
| 4 | by the SoC. |
| 5 | |
| 6 | Required properties: |
| 7 | |
| 8 | - compatible : "intel,acpi-gpe" |
| 9 | - interrupt-controller : Identifies the node as an interrupt controller |
| 10 | - #interrupt-cells : The number of cells to define the interrupts. Must be 2: |
| 11 | cell 0: interrupt number (normally >=32 since GPEs below that are reserved) |
| 12 | cell 1: 0 (flags, but none are currently defined) |
| 13 | - reg : The register bank for the controller (set this to the ACPI base). |
| 14 | |
| 15 | Example: |
| 16 | |
| 17 | general-purpose-events { |
| 18 | reg = <IOMAP_ACPI_BASE IOMAP_ACPI_SIZE>; |
| 19 | compatible = "intel,acpi-gpe"; |
| 20 | interrupt-controller; |
| 21 | #interrupt-cells = <2>; |
| 22 | }; |
| 23 | |
| 24 | ... |
| 25 | tpm@50 { |
| 26 | reg = <0x50>; |
| 27 | compatible = "google,cr50"; |
| 28 | ready-gpio = <&gpio_n 0x1c GPIO_ACTIVE_LOW>; |
| 29 | interrupts-extended = <&acpi_gpe 0x3c 0>; |
| 30 | }; |