Michal Simek | 051a8ad | 2018-03-27 13:43:05 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 2 | /* |
Michal Simek | f5a122e | 2020-02-18 15:58:33 +0100 | [diff] [blame] | 3 | * Xilinx ZC770 XM011 board DTS |
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 4 | * |
Michal Simek | 051a8ad | 2018-03-27 13:43:05 +0200 | [diff] [blame] | 5 | * Copyright (C) 2013-2018 Xilinx, Inc. |
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 6 | */ |
7 | /dts-v1/; | ||||
8 | #include "zynq-7000.dtsi" | ||||
Michal Simek | b347c14 | 2016-04-07 15:24:08 +0200 | [diff] [blame] | 9 | |
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 10 | / { |
Luis Araneda | 9896dc6 | 2018-07-12 00:10:20 -0400 | [diff] [blame] | 11 | model = "Xilinx ZC770 XM011 board"; |
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 12 | compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000"; |
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 13 | |
14 | aliases { | ||||
15 | i2c0 = &i2c1; | ||||
16 | serial0 = &uart1; | ||||
17 | spi0 = &spi0; | ||||
18 | }; | ||||
19 | |||||
20 | chosen { | ||||
Michal Simek | 936bbc5 | 2016-04-07 11:15:00 +0200 | [diff] [blame] | 21 | bootargs = ""; |
Michal Simek | 4691941 | 2016-01-12 13:56:44 +0100 | [diff] [blame] | 22 | stdout-path = "serial0:115200n8"; |
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 23 | }; |
24 | |||||
Michal Simek | cc7978b | 2016-11-11 13:11:37 +0100 | [diff] [blame] | 25 | memory@0 { |
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 26 | device_type = "memory"; |
27 | reg = <0x0 0x40000000>; | ||||
28 | }; | ||||
29 | |||||
30 | usb_phy1: phy1 { | ||||
31 | compatible = "usb-nop-xceiv"; | ||||
32 | #phy-cells = <0>; | ||||
33 | }; | ||||
34 | }; | ||||
35 | |||||
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 36 | &can0 { |
37 | status = "okay"; | ||||
38 | }; | ||||
39 | |||||
40 | &i2c1 { | ||||
41 | status = "okay"; | ||||
42 | clock-frequency = <400000>; | ||||
43 | |||||
Michal Simek | 99a2e34 | 2018-03-27 13:48:51 +0200 | [diff] [blame] | 44 | eeprom: eeprom@52 { |
45 | compatible = "atmel,24c02"; | ||||
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 46 | reg = <0x52>; |
47 | }; | ||||
48 | }; | ||||
49 | |||||
Michael Walle | 03a8e82 | 2022-02-23 15:10:34 +0100 | [diff] [blame] | 50 | &nfc0 { |
Michal Simek | 4cd8bf4 | 2020-01-07 10:17:43 +0100 | [diff] [blame] | 51 | status = "okay"; |
52 | }; | ||||
53 | |||||
54 | &smcc { | ||||
55 | status = "okay"; | ||||
56 | }; | ||||
57 | |||||
Michal Simek | 7ebf67a | 2016-01-14 13:09:16 +0100 | [diff] [blame] | 58 | &spi0 { |
59 | status = "okay"; | ||||
60 | num-cs = <4>; | ||||
61 | is-decoded-cs = <0>; | ||||
62 | }; | ||||
63 | |||||
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 64 | &uart1 { |
Simon Glass | 8c103c3 | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 65 | bootph-all; |
Michal Simek | 6d6e3db | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 66 | status = "okay"; |
67 | }; | ||||
68 | |||||
69 | &usb1 { | ||||
70 | status = "okay"; | ||||
71 | dr_mode = "host"; | ||||
72 | usb-phy = <&usb_phy1>; | ||||
73 | }; |