blob: 87b4df5bf81accfe89610a88d2cf69bd09cbd595 [file] [log] [blame]
Michal Simek3f123b72021-07-30 08:00:10 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 Xilinx, Inc. - Michal Simek
4 */
5
6#define LOG_CATEGORY UCLASS_RESET
7
8#include <common.h>
9#include <dm.h>
10#include <dm/device_compat.h>
11#include <reset-uclass.h>
12#include <zynqmp_firmware.h>
13
14#define ZYNQMP_NR_RESETS (ZYNQMP_PM_RESET_END - ZYNQMP_PM_RESET_START)
15#define ZYNQMP_RESET_ID ZYNQMP_PM_RESET_START
16
17struct zynqmp_reset_priv {
18 u32 reset_id;
19 u32 nr_reset;
20};
21
22static int zynqmp_pm_reset_assert(const u32 reset,
23 const enum zynqmp_pm_reset_action assert_flag)
24{
25 return xilinx_pm_request(PM_RESET_ASSERT, reset, assert_flag, 0, 0,
26 NULL);
27}
28
29static int zynqmp_reset_assert(struct reset_ctl *rst)
30{
31 struct zynqmp_reset_priv *priv = dev_get_priv(rst->dev);
32
33 dev_dbg(rst->dev, "%s(rst=%p) (id=%lu)\n", __func__, rst, rst->id);
34
35 return zynqmp_pm_reset_assert(priv->reset_id + rst->id,
36 PM_RESET_ACTION_ASSERT);
37}
38
39static int zynqmp_reset_deassert(struct reset_ctl *rst)
40{
41 struct zynqmp_reset_priv *priv = dev_get_priv(rst->dev);
42
43 dev_dbg(rst->dev, "%s(rst=%p) (id=%lu)\n", __func__, rst, rst->id);
44
45 return zynqmp_pm_reset_assert(priv->reset_id + rst->id,
46 PM_RESET_ACTION_RELEASE);
47}
48
49static int zynqmp_reset_request(struct reset_ctl *rst)
50{
51 struct zynqmp_reset_priv *priv = dev_get_priv(rst->dev);
52
53 dev_dbg(rst->dev, "%s(rst=%p) (id=%lu) (nr_reset=%d)\n", __func__,
54 rst, rst->id, priv->nr_reset);
55
T Karthik Reddy9df50812022-07-20 03:59:57 -060056 if (priv->nr_reset && rst->id > priv->nr_reset)
Michal Simek3f123b72021-07-30 08:00:10 +020057 return -EINVAL;
58
59 return 0;
60}
61
Michal Simek3f123b72021-07-30 08:00:10 +020062static int zynqmp_reset_probe(struct udevice *dev)
63{
64 struct zynqmp_reset_priv *priv = dev_get_priv(dev);
65
T Karthik Reddy9df50812022-07-20 03:59:57 -060066 if (device_is_compatible(dev, "xlnx,zynqmp-reset")) {
67 priv->reset_id = ZYNQMP_RESET_ID;
68 priv->nr_reset = ZYNQMP_NR_RESETS;
69 }
70
Michal Simek3f123b72021-07-30 08:00:10 +020071 return 0;
72}
73
74const struct reset_ops zynqmp_reset_ops = {
75 .request = zynqmp_reset_request,
Michal Simek3f123b72021-07-30 08:00:10 +020076 .rst_assert = zynqmp_reset_assert,
77 .rst_deassert = zynqmp_reset_deassert,
78};
79
80static const struct udevice_id zynqmp_reset_ids[] = {
81 { .compatible = "xlnx,zynqmp-reset" },
T Karthik Reddy9df50812022-07-20 03:59:57 -060082 { .compatible = "xlnx,versal-reset" },
Jay Buddhabhattia41c3392022-09-19 14:21:08 +020083 { .compatible = "xlnx,versal-net-reset" },
Michal Simek3f123b72021-07-30 08:00:10 +020084 { }
85};
86
87U_BOOT_DRIVER(zynqmp_reset) = {
88 .name = "zynqmp_reset",
89 .id = UCLASS_RESET,
90 .of_match = zynqmp_reset_ids,
91 .ops = &zynqmp_reset_ops,
92 .probe = zynqmp_reset_probe,
93 .priv_auto = sizeof(struct zynqmp_reset_priv),
94};