blob: cfbcebfa37c1df95ef85bad5b520bf4a93a0100a [file] [log] [blame]
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +05301// SPDX-License-Identifier: GPL-2.0
2/*
Lokesh Vutlae4978762021-02-01 11:26:39 +05303 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +05304 */
5
6/dts-v1/;
7
8#include "k3-am654.dtsi"
Lokesh Vutlae4978762021-02-01 11:26:39 +05309#include <dt-bindings/input/input.h>
10#include <dt-bindings/net/ti-dp83867.h>
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +053011
12/ {
13 compatible = "ti,am654-evm", "ti,am654";
14 model = "Texas Instruments AM654 Base Board";
15
16 chosen {
17 stdout-path = "serial2:115200n8";
18 bootargs = "earlycon=ns16550a,mmio32,0x02800000";
19 };
20
21 memory@80000000 {
22 device_type = "memory";
23 /* 4G RAM */
24 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
25 <0x00000008 0x80000000 0x00000000 0x80000000>;
26 };
27
28 reserved-memory {
29 #address-cells = <2>;
30 #size-cells = <2>;
31 ranges;
Lokesh Vutlae4978762021-02-01 11:26:39 +053032
33 secure_ddr: secure-ddr@9e800000 {
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +053034 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
35 alignment = <0x1000>;
36 no-map;
37 };
Lokesh Vutlae4978762021-02-01 11:26:39 +053038
39 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
40 compatible = "shared-dma-pool";
41 reg = <0 0xa0000000 0 0x100000>;
42 no-map;
43 };
44
45 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
46 compatible = "shared-dma-pool";
47 reg = <0 0xa0100000 0 0xf00000>;
48 no-map;
49 };
50
51 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
52 compatible = "shared-dma-pool";
53 reg = <0 0xa1000000 0 0x100000>;
54 no-map;
55 };
56
57 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
58 compatible = "shared-dma-pool";
59 reg = <0 0xa1100000 0 0xf00000>;
60 no-map;
61 };
62
63 rtos_ipc_memory_region: ipc-memories@a2000000 {
64 reg = <0x00 0xa2000000 0x00 0x00100000>;
65 alignment = <0x1000>;
66 no-map;
67 };
68 };
69
70 gpio-keys {
71 compatible = "gpio-keys";
72 autorepeat;
73 pinctrl-names = "default";
74 pinctrl-0 = <&push_button_pins_default>;
75
76 sw5 {
77 label = "GPIO Key USER1";
78 linux,code = <BTN_0>;
79 gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
80 };
81
82 sw6 {
83 label = "GPIO Key USER2";
84 linux,code = <BTN_1>;
85 gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
86 };
87 };
88
Tom Rinifa09b122021-09-10 17:37:43 -040089 evm_12v0: fixedregulator-evm12v0 {
90 /* main supply */
91 compatible = "regulator-fixed";
92 regulator-name = "evm_12v0";
93 regulator-min-microvolt = <12000000>;
94 regulator-max-microvolt = <12000000>;
95 regulator-always-on;
96 regulator-boot-on;
97 };
98
99 vcc3v3_io: fixedregulator-vcc3v3io {
100 /* Output of TPS54334 */
101 compatible = "regulator-fixed";
102 regulator-name = "vcc3v3_io";
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
105 regulator-always-on;
106 regulator-boot-on;
107 vin-supply = <&evm_12v0>;
108 };
109
110 vdd_mmc1_sd: fixedregulator-sd {
111 compatible = "regulator-fixed";
112 regulator-name = "vdd_mmc1_sd";
113 regulator-min-microvolt = <3300000>;
114 regulator-max-microvolt = <3300000>;
115 regulator-boot-on;
116 enable-active-high;
117 vin-supply = <&vcc3v3_io>;
118 gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
Lokesh Vutlae4978762021-02-01 11:26:39 +0530119 };
120};
121
122&wkup_pmx0 {
123 wkup_i2c0_pins_default: wkup-i2c0-pins-default {
124 pinctrl-single,pins = <
125 AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
126 AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
127 >;
128 };
129
130 push_button_pins_default: push-button-pins-default {
131 pinctrl-single,pins = <
132 AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
133 AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
134 >;
135 };
136
137 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
138 pinctrl-single,pins = <
139 AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
140 AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
141 AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */
142 AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */
143 AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */
144 AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
145 AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */
146 AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */
147 AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
148 AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
149 AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
150 >;
151 };
152
153 wkup_pca554_default: wkup-pca554-default {
154 pinctrl-single,pins = <
155 AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
156 >;
157 };
158
159 mcu_cpsw_pins_default: mcu-cpsw-pins-default {
160 pinctrl-single,pins = <
161 AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
162 AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
163 AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
164 AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
165 AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
166 AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
167 AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
168 AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
169 AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
170 AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
Tom Rinifa09b122021-09-10 17:37:43 -0400171 AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */
Lokesh Vutlae4978762021-02-01 11:26:39 +0530172 AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
173 >;
174 };
175
176 mcu_mdio_pins_default: mcu-mdio1-pins-default {
177 pinctrl-single,pins = <
178 AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
179 AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
180 >;
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +0530181 };
182};
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530183
184&main_pmx0 {
Lokesh Vutlae4978762021-02-01 11:26:39 +0530185 main_uart0_pins_default: main-uart0-pins-default {
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530186 pinctrl-single,pins = <
Lokesh Vutlae4978762021-02-01 11:26:39 +0530187 AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
188 AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
189 AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
190 AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
Vignesh Raghavendra60120072019-12-09 10:37:33 +0530191 >;
192 };
Vignesh Raghavendra360c86b2020-02-17 13:22:55 +0530193
194 main_i2c2_pins_default: main-i2c2-pins-default {
195 pinctrl-single,pins = <
196 AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
197 AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
198 >;
199 };
Lokesh Vutlae4978762021-02-01 11:26:39 +0530200
201 main_spi0_pins_default: main-spi0-pins-default {
202 pinctrl-single,pins = <
203 AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
204 AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
205 AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
206 AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
207 >;
208 };
209
210 main_mmc0_pins_default: main-mmc0-pins-default {
211 pinctrl-single,pins = <
212 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
213 AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
214 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
215 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
216 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
217 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
218 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
219 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
220 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
221 AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
222 AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
223 AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
224 >;
225 };
226
227 main_mmc1_pins_default: main-mmc1-pins-default {
228 pinctrl-single,pins = <
229 AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
230 AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
231 AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
232 AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
233 AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
234 AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
235 AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
236 AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
237 >;
238 };
239
240 usb1_pins_default: usb1-pins-default {
241 pinctrl-single,pins = <
242 AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
243 >;
244 };
Vignesh Raghavendra360c86b2020-02-17 13:22:55 +0530245};
246
247&main_pmx1 {
248 main_i2c0_pins_default: main-i2c0-pins-default {
249 pinctrl-single,pins = <
250 AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
251 AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
252 >;
253 };
254
255 main_i2c1_pins_default: main-i2c1-pins-default {
256 pinctrl-single,pins = <
257 AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
258 AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
259 >;
260 };
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530261
Lokesh Vutlae4978762021-02-01 11:26:39 +0530262 ecap0_pins_default: ecap0-pins-default {
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -0500263 pinctrl-single,pins = <
Lokesh Vutlae4978762021-02-01 11:26:39 +0530264 AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530265 >;
266 };
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -0500267};
268
Lokesh Vutlae4978762021-02-01 11:26:39 +0530269&wkup_uart0 {
270 /* Wakeup UART is used by System firmware */
271 status = "reserved";
Faiz Abbas3a1a0df2019-06-11 00:43:31 +0530272};
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -0500273
Lokesh Vutlae4978762021-02-01 11:26:39 +0530274&main_uart0 {
Faiz Abbas2121c7e2021-02-04 15:10:56 +0530275 pinctrl-names = "default";
Lokesh Vutlae4978762021-02-01 11:26:39 +0530276 pinctrl-0 = <&main_uart0_pins_default>;
277 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
Faiz Abbas2121c7e2021-02-04 15:10:56 +0530278};
279
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -0500280&wkup_i2c0 {
281 pinctrl-names = "default";
282 pinctrl-0 = <&wkup_i2c0_pins_default>;
283 clock-frequency = <400000>;
Andreas Dannenbergba7907c2019-06-04 18:08:18 -0500284
Lokesh Vutlae4978762021-02-01 11:26:39 +0530285 pca9554: gpio@39 {
Andreas Dannenbergba7907c2019-06-04 18:08:18 -0500286 compatible = "nxp,pca9554";
Lokesh Vutlae4978762021-02-01 11:26:39 +0530287 reg = <0x39>;
Andreas Dannenbergba7907c2019-06-04 18:08:18 -0500288 gpio-controller;
289 #gpio-cells = <2>;
Lokesh Vutlae4978762021-02-01 11:26:39 +0530290 pinctrl-names = "default";
291 pinctrl-0 = <&wkup_pca554_default>;
292 interrupt-parent = <&wkup_gpio0>;
293 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
294 interrupt-controller;
295 #interrupt-cells = <2>;
Andreas Dannenbergba7907c2019-06-04 18:08:18 -0500296 };
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -0500297};
Vignesh Raghavendra60120072019-12-09 10:37:33 +0530298
Vignesh Raghavendra360c86b2020-02-17 13:22:55 +0530299&main_i2c0 {
300 pinctrl-names = "default";
301 pinctrl-0 = <&main_i2c0_pins_default>;
302 clock-frequency = <400000>;
303
304 pca9555: gpio@21 {
305 compatible = "nxp,pca9555";
306 reg = <0x21>;
307 gpio-controller;
308 #gpio-cells = <2>;
309 };
310};
311
312&main_i2c1 {
313 pinctrl-names = "default";
314 pinctrl-0 = <&main_i2c1_pins_default>;
315 clock-frequency = <400000>;
316};
317
318&main_i2c2 {
319 pinctrl-names = "default";
320 pinctrl-0 = <&main_i2c2_pins_default>;
321 clock-frequency = <400000>;
322};
323
Lokesh Vutlae4978762021-02-01 11:26:39 +0530324&ecap0 {
325 pinctrl-names = "default";
326 pinctrl-0 = <&ecap0_pins_default>;
Vignesh Raghavendra60120072019-12-09 10:37:33 +0530327};
328
Lokesh Vutlae4978762021-02-01 11:26:39 +0530329&main_spi0 {
330 pinctrl-names = "default";
331 pinctrl-0 = <&main_spi0_pins_default>;
332 #address-cells = <1>;
333 #size-cells= <0>;
Tom Rinifa09b122021-09-10 17:37:43 -0400334 ti,pindir-d0-out-d1-in;
Lokesh Vutlae4978762021-02-01 11:26:39 +0530335
336 flash@0{
337 compatible = "jedec,spi-nor";
338 reg = <0x0>;
339 spi-tx-bus-width = <1>;
340 spi-rx-bus-width = <1>;
341 spi-max-frequency = <48000000>;
342 #address-cells = <1>;
343 #size-cells= <1>;
344 };
345};
346
347&sdhci0 {
348 pinctrl-names = "default";
349 pinctrl-0 = <&main_mmc0_pins_default>;
350 bus-width = <8>;
351 non-removable;
352 ti,driver-strength-ohm = <50>;
353 disable-wp;
354};
355
356/*
357 * Because of erratas i2025 and i2026 for silicon revision 1.0, the
358 * SD card interface might fail. Boards with sr1.0 are recommended to
359 * disable sdhci1
360 */
361&sdhci1 {
Tom Rinifa09b122021-09-10 17:37:43 -0400362 vmmc-supply = <&vdd_mmc1_sd>;
Lokesh Vutlae4978762021-02-01 11:26:39 +0530363 pinctrl-names = "default";
364 pinctrl-0 = <&main_mmc1_pins_default>;
365 ti,driver-strength-ohm = <50>;
Lokesh Vutlae4978762021-02-01 11:26:39 +0530366 disable-wp;
Vignesh Raghavendra60120072019-12-09 10:37:33 +0530367};
368
369&usb1 {
370 pinctrl-names = "default";
371 pinctrl-0 = <&usb1_pins_default>;
372 dr_mode = "otg";
373};
374
375&dwc3_0 {
376 status = "disabled";
377};
378
379&usb0_phy {
380 status = "disabled";
381};
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530382
Lokesh Vutlae4978762021-02-01 11:26:39 +0530383&tscadc0 {
384 adc {
385 ti,adc-channels = <0 1 2 3 4 5 6 7>;
386 };
387};
388
389&tscadc1 {
390 adc {
391 ti,adc-channels = <0 1 2 3 4 5 6 7>;
392 };
393};
394
395&serdes0 {
396 status = "disabled";
397};
398
399&serdes1 {
400 status = "disabled";
401};
402
403&pcie0_rc {
404 status = "disabled";
405};
406
407&pcie0_ep {
408 status = "disabled";
409};
410
411&pcie1_rc {
412 status = "disabled";
413};
414
415&pcie1_ep {
416 status = "disabled";
417};
418
419&mailbox0_cluster0 {
420 interrupts = <436>;
421
422 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
423 ti,mbox-tx = <1 0 0>;
424 ti,mbox-rx = <0 0 0>;
425 };
426};
427
428&mailbox0_cluster1 {
429 interrupts = <432>;
430
431 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
432 ti,mbox-tx = <1 0 0>;
433 ti,mbox-rx = <0 0 0>;
434 };
435};
436
437&mailbox0_cluster2 {
438 status = "disabled";
439};
440
441&mailbox0_cluster3 {
442 status = "disabled";
443};
444
445&mailbox0_cluster4 {
446 status = "disabled";
447};
448
449&mailbox0_cluster5 {
450 status = "disabled";
451};
452
453&mailbox0_cluster6 {
454 status = "disabled";
455};
456
457&mailbox0_cluster7 {
458 status = "disabled";
459};
460
461&mailbox0_cluster8 {
462 status = "disabled";
463};
464
465&mailbox0_cluster9 {
466 status = "disabled";
467};
468
469&mailbox0_cluster10 {
470 status = "disabled";
471};
472
473&mailbox0_cluster11 {
474 status = "disabled";
475};
476
477&mcu_r5fss0_core0 {
478 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
479 <&mcu_r5fss0_core0_memory_region>;
480 mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
481};
482
483&mcu_r5fss0_core1 {
484 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
485 <&mcu_r5fss0_core1_memory_region>;
486 mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
487};
488
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530489&ospi0 {
490 pinctrl-names = "default";
491 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
492
493 flash@0{
494 compatible = "jedec,spi-nor";
495 reg = <0x0>;
Tom Rinifa09b122021-09-10 17:37:43 -0400496 spi-tx-bus-width = <8>;
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530497 spi-rx-bus-width = <8>;
Tom Rinifa09b122021-09-10 17:37:43 -0400498 spi-max-frequency = <25000000>;
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530499 cdns,tshsl-ns = <60>;
500 cdns,tsd2d-ns = <60>;
501 cdns,tchsh-ns = <60>;
502 cdns,tslch-ns = <60>;
503 cdns,read-delay = <0>;
504 #address-cells = <1>;
505 #size-cells = <1>;
506 };
507};
Lokesh Vutlae4978762021-02-01 11:26:39 +0530508
Lokesh Vutlae4978762021-02-01 11:26:39 +0530509&mcu_cpsw {
510 pinctrl-names = "default";
511 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
512};
513
514&davinci_mdio {
515 phy0: ethernet-phy@0 {
516 reg = <0>;
517 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
518 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
519 };
520};
521
522&cpsw_port1 {
523 phy-mode = "rgmii-rxid";
524 phy-handle = <&phy0>;
525};
526
527&mcasp0 {
528 status = "disabled";
529};
530
531&mcasp1 {
532 status = "disabled";
533};
534
535&mcasp2 {
536 status = "disabled";
537};
538
539&dss {
540 status = "disabled";
541};
Tom Rinifa09b122021-09-10 17:37:43 -0400542
543&icssg0_mdio {
544 status = "disabled";
545};
546
547&icssg1_mdio {
548 status = "disabled";
549};
550
551&icssg2_mdio {
552 status = "disabled";
553};