blob: 501e9cab8f7c20662d0cdc018628116a80605317 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Stephen Warrenfe60f062016-09-13 10:45:58 -06002/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warrenfe60f062016-09-13 10:45:58 -06004 */
5
6#include <common.h>
7#include <dm.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -06008#include <log.h>
Simon Glass336d4612020-02-03 07:36:16 -07009#include <malloc.h>
Stephen Warrenfe60f062016-09-13 10:45:58 -060010#include <reset-uclass.h>
11#include <asm/arch/clock.h>
12#include <asm/arch-tegra/clk_rst.h>
13
14static int tegra_car_reset_request(struct reset_ctl *reset_ctl)
15{
16 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
17 reset_ctl->dev, reset_ctl->id);
18
19 /* PERIPH_ID_COUNT varies per SoC */
20 if (reset_ctl->id >= PERIPH_ID_COUNT)
21 return -EINVAL;
22
23 return 0;
24}
25
Stephen Warrenfe60f062016-09-13 10:45:58 -060026static int tegra_car_reset_assert(struct reset_ctl *reset_ctl)
27{
28 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
29 reset_ctl->dev, reset_ctl->id);
30
31 reset_set_enable(reset_ctl->id, 1);
32
33 return 0;
34}
35
36static int tegra_car_reset_deassert(struct reset_ctl *reset_ctl)
37{
38 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
39 reset_ctl->dev, reset_ctl->id);
40
41 reset_set_enable(reset_ctl->id, 0);
42
43 return 0;
44}
45
46struct reset_ops tegra_car_reset_ops = {
47 .request = tegra_car_reset_request,
Stephen Warrenfe60f062016-09-13 10:45:58 -060048 .rst_assert = tegra_car_reset_assert,
49 .rst_deassert = tegra_car_reset_deassert,
50};
51
Stephen Warrenfe60f062016-09-13 10:45:58 -060052U_BOOT_DRIVER(tegra_car_reset) = {
53 .name = "tegra_car_reset",
54 .id = UCLASS_RESET,
Stephen Warrenfe60f062016-09-13 10:45:58 -060055 .ops = &tegra_car_reset_ops,
56};