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Daniel Hellstrom1e9a1642008-03-26 22:51:29 +01001/* Interface for accessing Gaisler AMBA Plug&Play Bus.
2 * The AHB bus can be interfaced with a simpler bus -
3 * the APB bus, also freely available in GRLIB at
4 * www.gaisler.com.
5 *
6 * (C) Copyright 2007
7 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 *
27 */
28
29#ifndef __AMBAPP_H__
30#define __AMBAPP_H__
31
32/* Default location of Plug&Play info
33 * normally 0xfffff000 for AHB masters
34 * and 0xfffff800 for AHB slaves.
35 * Normally no need to change this.
36 */
37#define LEON3_IO_AREA 0xfff00000
38#define LEON3_CONF_AREA 0xff000
39#define LEON3_AHB_SLAVE_CONF_AREA (1 << 11)
40
41/* Max devices this software will support */
42#define LEON3_AHB_MASTERS 16
43#define LEON3_AHB_SLAVES 16
Wolfgang Denk1aeed8d2008-04-13 09:59:26 -070044/*#define LEON3_APB_MASTERS 1*/ /* Number of APB buses that has Plug&Play */
Daniel Hellstrom1e9a1642008-03-26 22:51:29 +010045#define LEON3_APB_SLAVES 16 /* Total number of APB slaves per APB bus */
46
47/* Vendor codes */
48#define VENDOR_GAISLER 1
49#define VENDOR_PENDER 2
50#define VENDOR_ESA 4
51#define VENDOR_ASTRIUM 6
52#define VENDOR_OPENCHIP 7
53#define VENDOR_OPENCORES 8
54#define VENDOR_CONTRIB 9
55#define VENDOR_EONIC 11
56#define VENDOR_RADIONOR 15
57#define VENDOR_GLEICHMANN 16
58#define VENDOR_MENTA 17
59#define VENDOR_SUN 19
60#define VENDOR_EMBEDDIT 234
61#define VENDOR_CAL 202
62
63/* Gaisler Research device id's */
64#define GAISLER_LEON3 0x003
65#define GAISLER_LEON3DSU 0x004
66#define GAISLER_ETHAHB 0x005
67#define GAISLER_APBMST 0x006
68#define GAISLER_AHBUART 0x007
69#define GAISLER_SRCTRL 0x008
70#define GAISLER_SDCTRL 0x009
71#define GAISLER_APBUART 0x00C
72#define GAISLER_IRQMP 0x00D
73#define GAISLER_AHBRAM 0x00E
74#define GAISLER_GPTIMER 0x011
75#define GAISLER_PCITRG 0x012
76#define GAISLER_PCISBRG 0x013
77#define GAISLER_PCIFBRG 0x014
78#define GAISLER_PCITRACE 0x015
79#define GAISLER_PCIDMA 0x016
80#define GAISLER_AHBTRACE 0x017
81#define GAISLER_ETHDSU 0x018
82#define GAISLER_PIOPORT 0x01A
83#define GAISLER_AHBJTAG 0x01c
84#define GAISLER_SPW 0x01f
85#define GAISLER_ATACTRL 0x024
86#define GAISLER_VGA 0x061
87#define GAISLER_KBD 0X060
88#define GAISLER_ETHMAC 0x01D
89#define GAISLER_DDRSPA 0x025
90#define GAISLER_EHCI 0x026
91#define GAISLER_UHCI 0x027
92#define GAISLER_SPW2 0x029
93#define GAISLER_DDR2SPA 0x02E
94#define GAISLER_AHBSTAT 0x052
95#define GAISLER_FTMCTRL 0x054
96
97#define GAISLER_L2TIME 0xffd /* internal device: leon2 timer */
98#define GAISLER_L2C 0xffe /* internal device: leon2compat */
99#define GAISLER_PLUGPLAY 0xfff /* internal device: plug & play configarea */
100
101/* European Space Agency device id's */
102#define ESA_LEON2 0x2
103#define ESA_MCTRL 0xF
104
105/* Opencores device id's */
106#define OPENCORES_PCIBR 0x4
107#define OPENCORES_ETHMAC 0x5
108
109/* Vendor codes */
110
111/*
112 *
113 * Macros for manipulating Configuration registers
114 *
115 */
116
117#define amba_vendor(x) (((x) >> 24) & 0xff)
118
119#define amba_device(x) (((x) >> 12) & 0xfff)
120
121#define amba_membar_start(mbar) \
122 (((mbar) & 0xfff00000) & (((mbar) & 0xfff0) << 16))
123
124#define amba_iobar_start(base, iobar) \
125 ((base) | ((((iobar) & 0xfff00000)>>12) & (((iobar) & 0xfff0)<<4)) )
126
127#define amba_irq(conf) ((conf) & 0xf)
128
129#define amba_ver(conf) (((conf)>>5) & 0x1f)
130
131#define amba_membar_type(mbar) ((mbar) & 0xf)
132
133#define amba_membar_mask(mbar) (((mbar)>>4) & 0xfff)
134
135#define AMBA_TYPE_APBIO 0x1
136#define AMBA_TYPE_MEM 0x2
137#define AMBA_TYPE_AHBIO 0x3
138
139#define AMBA_TYPE_AHBIO_ADDR(addr) (LEON3_IO_AREA | ((addr) >> 12))
140
141#ifndef __ASSEMBLER__
142
Daniel Hellstrom2a2fa792008-03-26 23:00:38 +0100143#ifdef CONFIG_CMD_AMBAPP
144
145/* AMBA Plug&Play relocation & initialization */
146int ambapp_init_reloc(void);
147
148/* AMBA Plug&Play Name of Vendors and devices */
149
150/* Return name of device */
151char *ambapp_device_id2str(int vendor, int id);
152
153/* Return name of vendor */
154char *ambapp_vendor_id2str(int vendor);
155#endif
156
Daniel Hellstrom1e9a1642008-03-26 22:51:29 +0100157/*
158 * Types and structure used for AMBA Plug & Play bus scanning
159 */
160
161/* AMBA Plug&Play AHB information layout */
162typedef struct {
163 unsigned int conf;
164 unsigned int userdef[3];
165 unsigned int bars[4];
166} ahbctrl_pp_dev;
167
168/* Prototypes for scanning AMBA Plug&Play bus for AMBA
169 * i) AHB Masters
170 * ii) AHB Slaves
171 * iii) APB Slaves (APB MST is a AHB Slave)
172 */
173
174typedef struct {
175 unsigned char irq;
176 unsigned char ver;
177 unsigned int address;
178} ambapp_apbdev;
179
180typedef struct {
181 unsigned char irq;
182 unsigned char ver;
183 unsigned int userdef[3];
184 unsigned int address[4];
185} ambapp_ahbdev;
186
187/* AMBA Plug&Play AHB Masters & Slaves information locations
188 * Max devices is 64 supported by HW, however often only 8
189 * are used.
190 */
191typedef struct {
192 ahbctrl_pp_dev masters[64];
193 ahbctrl_pp_dev slaves[64];
194} ahbctrl_info;
195
196/* AMBA Plug&Play AHB information layout */
197typedef struct {
198 unsigned int conf;
199 unsigned int bar;
200} apbctrl_pp_dev;
201
202/* All functions return the number of found devices
203 * 0 = no devices found
204 */
205
206/****************************** APB SLAVES ******************************/
207int ambapp_apb_count(unsigned int vendor, unsigned int driver);
208
209int ambapp_apb_first(unsigned int vendor,
210 unsigned int driver, ambapp_apbdev * dev);
211
212int ambapp_apb_next(unsigned int vendor,
213 unsigned int driver, ambapp_apbdev * dev, int index);
214
215int ambapp_apbs_first(unsigned int vendor,
216 unsigned int driver, ambapp_apbdev * dev, int max_cnt);
217
218/****************************** AHB MASTERS ******************************/
219int ambapp_ahbmst_count(unsigned int vendor, unsigned int driver);
220
221int ambapp_ahbmst_first(unsigned int vendor,
222 unsigned int driver, ambapp_ahbdev * dev);
223
224int ambapp_ahbmst_next(unsigned int vendor,
225 unsigned int driver, ambapp_ahbdev * dev, int index);
226
227int ambapp_ahbmsts_first(unsigned int vendor,
228 unsigned int driver, ambapp_ahbdev * dev, int max_cnt);
229
230/****************************** AHB SLAVES ******************************/
231int ambapp_ahbslv_count(unsigned int vendor, unsigned int driver);
232
233int ambapp_ahbslv_first(unsigned int vendor,
234 unsigned int driver, ambapp_ahbdev * dev);
235
236int ambapp_ahbslv_next(unsigned int vendor,
237 unsigned int driver, ambapp_ahbdev * dev, int index);
238
239int ambapp_ahbslvs_first(unsigned int vendor,
240 unsigned int driver, ambapp_ahbdev * dev, int max_cnt);
241
242/*************************** AHB/APB only regs functions *************************
243 * During start up, no memory is available we can use the simplified functions
244 * to get to the memory controller.
245 *
246 * Functions uses no stack/memory, only registers.
247 */
248unsigned int ambapp_apb_next_nomem(register unsigned int vendor, /* Plug&Play Vendor ID */
249 register unsigned int driver, /* Plug&Play Device ID */
250 register int index);
251
252ahbctrl_pp_dev *ambapp_ahb_next_nomem(register unsigned int vendor, /* Plug&Play Vendor ID */
253 register unsigned int driver, /* Plug&Play Device ID */
254 register unsigned int opts, /* scan for AHB 1=slave, 0=masters */
255 register int index);
256
257unsigned int ambapp_ahb_get_info(ahbctrl_pp_dev * ahb, int info);
258
259/*************************** AMBA Plug&Play device register MAPS *****************/
260
261/*
262 * The following defines the bits in the LEON UART Status Registers.
263 */
264
265#define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
266#define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
267#define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
268#define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
269#define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
270#define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
271#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
272#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
273
274/*
275 * The following defines the bits in the LEON UART Ctrl Registers.
276 */
277
278#define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
279#define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
280#define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
281#define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */
282#define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */
283#define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */
284#define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
285#define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
286#define LEON_REG_UART_CTRL_DBG (1<<11) /* Debug Bit used by GRMON */
287
288#define LEON3_GPTIMER_EN 1
289#define LEON3_GPTIMER_RL 2
290#define LEON3_GPTIMER_LD 4
291#define LEON3_GPTIMER_IRQEN 8
292
293/*
294 * The following defines the bits in the LEON PS/2 Status Registers.
295 */
296
297#define LEON_REG_PS2_STATUS_DR 0x00000001 /* Data Ready */
298#define LEON_REG_PS2_STATUS_PE 0x00000002 /* Parity error */
299#define LEON_REG_PS2_STATUS_FE 0x00000004 /* Framing error */
300#define LEON_REG_PS2_STATUS_KI 0x00000008 /* Keyboard inhibit */
301
302/*
303 * The following defines the bits in the LEON PS/2 Ctrl Registers.
304 */
305
306#define LEON_REG_PS2_CTRL_RE 0x00000001 /* Receiver enable */
307#define LEON_REG_PS2_CTRL_TE 0x00000002 /* Transmitter enable */
308#define LEON_REG_PS2_CTRL_RI 0x00000004 /* Keyboard receive interrupt */
309#define LEON_REG_PS2_CTRL_TI 0x00000008 /* Keyboard transmit interrupt */
310
311typedef struct {
312 volatile unsigned int ilevel;
313 volatile unsigned int ipend;
314 volatile unsigned int iforce;
315 volatile unsigned int iclear;
316 volatile unsigned int mstatus;
317 volatile unsigned int notused[11];
318 volatile unsigned int cpu_mask[16];
319 volatile unsigned int cpu_force[16];
320} ambapp_dev_irqmp;
321
322typedef struct {
323 volatile unsigned int data;
324 volatile unsigned int status;
325 volatile unsigned int ctrl;
326 volatile unsigned int scaler;
327} ambapp_dev_apbuart;
328
329typedef struct {
330 volatile unsigned int val;
331 volatile unsigned int rld;
332 volatile unsigned int ctrl;
333 volatile unsigned int unused;
334} ambapp_dev_gptimer_element;
335
336#define LEON3_GPTIMER_CTRL_EN 0x1 /* Timer enable */
337#define LEON3_GPTIMER_CTRL_RS 0x2 /* Timer reStart */
338#define LEON3_GPTIMER_CTRL_LD 0x4 /* Timer reLoad */
339#define LEON3_GPTIMER_CTRL_IE 0x8 /* interrupt enable */
340#define LEON3_GPTIMER_CTRL_IP 0x10 /* interrupt flag/pending */
341#define LEON3_GPTIMER_CTRL_CH 0x20 /* Chain with previous timer */
342
343typedef struct {
344 volatile unsigned int scalar;
345 volatile unsigned int scalar_reload;
346 volatile unsigned int config;
347 volatile unsigned int unused;
348 volatile ambapp_dev_gptimer_element e[8];
349} ambapp_dev_gptimer;
350
351typedef struct {
352 volatile unsigned int iodata;
353 volatile unsigned int ioout;
354 volatile unsigned int iodir;
355 volatile unsigned int irqmask;
356 volatile unsigned int irqpol;
357 volatile unsigned int irqedge;
358} ambapp_dev_ioport;
359
360typedef struct {
361 volatile unsigned int write;
362 volatile unsigned int dummy;
363 volatile unsigned int txcolor;
364 volatile unsigned int bgcolor;
365} ambapp_dev_textvga;
366
367typedef struct {
368 volatile unsigned int data;
369 volatile unsigned int status;
370 volatile unsigned int ctrl;
371} ambapp_dev_apbps2;
372
373typedef struct {
374 unsigned int mcfg1, mcfg2, mcfg3;
375} ambapp_dev_mctrl;
376
377typedef struct {
378 unsigned int sdcfg;
379} ambapp_dev_sdctrl;
380
381typedef struct {
382 unsigned int cfg1;
383 unsigned int cfg2;
384 unsigned int cfg3;
385} ambapp_dev_ddr2spa;
386
387typedef struct {
388 unsigned int ctrl;
389 unsigned int cfg;
390} ambapp_dev_ddrspa;
391
392#endif
393
394#endif