blob: ac17c4723a13a4827b2131b93e28963864d93647 [file] [log] [blame]
Michal Simek44303df2015-10-30 15:39:18 +01001/*
2 * dts file for Xilinx ZynqMP
3 *
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
5 *
6 * Michal Simek <michal.simek@xilinx.com>
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10/ {
11 compatible = "xlnx,zynqmp";
12 #address-cells = <2>;
Michal Simek85d11422016-04-07 15:07:38 +020013 #size-cells = <2>;
Michal Simek44303df2015-10-30 15:39:18 +010014
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 cpu@0 {
20 compatible = "arm,cortex-a53", "arm,armv8";
21 device_type = "cpu";
22 enable-method = "psci";
23 reg = <0x0>;
24 };
25
26 cpu@1 {
27 compatible = "arm,cortex-a53", "arm,armv8";
28 device_type = "cpu";
29 enable-method = "psci";
30 reg = <0x1>;
31 };
32
33 cpu@2 {
34 compatible = "arm,cortex-a53", "arm,armv8";
35 device_type = "cpu";
36 enable-method = "psci";
37 reg = <0x2>;
38 };
39
40 cpu@3 {
41 compatible = "arm,cortex-a53", "arm,armv8";
42 device_type = "cpu";
43 enable-method = "psci";
44 reg = <0x3>;
45 };
46 };
47
Soren Brinkmann8f4e3972016-01-11 15:34:42 -080048 power-domains {
49 compatible = "xlnx,zynqmp-genpd";
50
51 pd_usb0: pd-usb0 {
52 #power-domain-cells = <0x0>;
53 pd-id = <0x16>;
54 };
55
56 pd_usb1: pd-usb1 {
57 #power-domain-cells = <0x0>;
58 pd-id = <0x17>;
59 };
60
61 pd_sata: pd-sata {
62 #power-domain-cells = <0x0>;
63 pd-id = <0x1c>;
64 };
65
66 pd_spi0: pd-spi0 {
67 #power-domain-cells = <0x0>;
68 pd-id = <0x23>;
69 };
70
71 pd_spi1: pd-spi1 {
72 #power-domain-cells = <0x0>;
73 pd-id = <0x24>;
74 };
75
76 pd_uart0: pd-uart0 {
77 #power-domain-cells = <0x0>;
78 pd-id = <0x21>;
79 };
80
81 pd_uart1: pd-uart1 {
82 #power-domain-cells = <0x0>;
83 pd-id = <0x22>;
84 };
85
86 pd_eth0: pd-eth0 {
87 #power-domain-cells = <0x0>;
88 pd-id = <0x1d>;
89 };
90
91 pd_eth1: pd-eth1 {
92 #power-domain-cells = <0x0>;
93 pd-id = <0x1e>;
94 };
95
96 pd_eth2: pd-eth2 {
97 #power-domain-cells = <0x0>;
98 pd-id = <0x1f>;
99 };
100
101 pd_eth3: pd-eth3 {
102 #power-domain-cells = <0x0>;
103 pd-id = <0x20>;
104 };
105
106 pd_i2c0: pd-i2c0 {
107 #power-domain-cells = <0x0>;
108 pd-id = <0x25>;
109 };
110
111 pd_i2c1: pd-i2c1 {
112 #power-domain-cells = <0x0>;
113 pd-id = <0x26>;
114 };
115
116 pd_dp: pd-dp {
117 /* fixme: what to attach to */
118 #power-domain-cells = <0x0>;
119 pd-id = <0x29>;
120 };
121
122 pd_gdma: pd-gdma {
123 #power-domain-cells = <0x0>;
124 pd-id = <0x2a>;
125 };
126
127 pd_adma: pd-adma {
128 #power-domain-cells = <0x0>;
129 pd-id = <0x2b>;
130 };
131
132 pd_ttc0: pd-ttc0 {
133 #power-domain-cells = <0x0>;
134 pd-id = <0x18>;
135 };
136
137 pd_ttc1: pd-ttc1 {
138 #power-domain-cells = <0x0>;
139 pd-id = <0x19>;
140 };
141
142 pd_ttc2: pd-ttc2 {
143 #power-domain-cells = <0x0>;
144 pd-id = <0x1a>;
145 };
146
147 pd_ttc3: pd-ttc3 {
148 #power-domain-cells = <0x0>;
149 pd-id = <0x1b>;
150 };
151
152 pd_sd0: pd-sd0 {
153 #power-domain-cells = <0x0>;
154 pd-id = <0x27>;
155 };
156
157 pd_sd1: pd-sd1 {
158 #power-domain-cells = <0x0>;
159 pd-id = <0x28>;
160 };
161
162 pd_nand: pd-nand {
163 #power-domain-cells = <0x0>;
164 pd-id = <0x2c>;
165 };
166
167 pd_qspi: pd-qspi {
168 #power-domain-cells = <0x0>;
169 pd-id = <0x2d>;
170 };
171
172 pd_gpio: pd-gpio {
173 #power-domain-cells = <0x0>;
174 pd-id = <0x2e>;
175 };
176
177 pd_can0: pd-can0 {
178 #power-domain-cells = <0x0>;
179 pd-id = <0x2f>;
180 };
181
182 pd_can1: pd-can1 {
183 #power-domain-cells = <0x0>;
184 pd-id = <0x30>;
185 };
186
187 pd_ddr: pd-ddr {
188 #power-domain-cells = <0x0>;
189 pd-id = <0x37>;
190 };
191
192 pd_apll: pd-apll {
193 #power-domain-cells = <0x0>;
194 pd-id = <0x32>;
195 };
196
197 pd_vpll: pd-vpll {
198 #power-domain-cells = <0x0>;
199 pd-id = <0x33>;
200 };
201
202 pd_dpll: pd-dpll {
203 #power-domain-cells = <0x0>;
204 pd-id = <0x34>;
205 };
206
207 pd_rpll: pd-rpll {
208 #power-domain-cells = <0x0>;
209 pd-id = <0x35>;
210 };
211
212 pd_iopll: pd-iopll {
213 #power-domain-cells = <0x0>;
214 pd-id = <0x36>;
215 };
216 };
217
Michal Simek44303df2015-10-30 15:39:18 +0100218 pmu {
219 compatible = "arm,armv8-pmuv3";
Michal Simek14cd9ea2016-04-07 15:28:33 +0200220 interrupt-parent = <&gic>;
Michal Simek44303df2015-10-30 15:39:18 +0100221 interrupts = <0 143 4>,
222 <0 144 4>,
223 <0 145 4>,
224 <0 146 4>;
225 };
226
227 psci {
228 compatible = "arm,psci-0.2";
229 method = "smc";
230 };
231
232 firmware {
233 compatible = "xlnx,zynqmp-pm";
234 method = "smc";
235 };
236
237 timer {
238 compatible = "arm,armv8-timer";
239 interrupt-parent = <&gic>;
240 interrupts = <1 13 0xf01>,
241 <1 14 0xf01>,
242 <1 11 0xf01>,
243 <1 10 0xf01>;
244 };
245
Michal Simekc926e6f2016-11-11 13:21:04 +0100246 amba_apu: amba_apu@0 {
Michal Simek44303df2015-10-30 15:39:18 +0100247 compatible = "simple-bus";
248 #address-cells = <2>;
249 #size-cells = <1>;
Michal Simek85d11422016-04-07 15:07:38 +0200250 ranges = <0 0 0 0 0xffffffff>;
Michal Simek44303df2015-10-30 15:39:18 +0100251
252 gic: interrupt-controller@f9010000 {
253 compatible = "arm,gic-400", "arm,cortex-a15-gic";
254 #interrupt-cells = <3>;
255 reg = <0x0 0xf9010000 0x10000>,
Alexander Graf0a8c4f62016-05-12 13:44:01 +0200256 <0x0 0xf9020000 0x20000>,
Michal Simek44303df2015-10-30 15:39:18 +0100257 <0x0 0xf9040000 0x20000>,
Alexander Graf0a8c4f62016-05-12 13:44:01 +0200258 <0x0 0xf9060000 0x20000>;
Michal Simek44303df2015-10-30 15:39:18 +0100259 interrupt-controller;
260 interrupt-parent = <&gic>;
261 interrupts = <1 9 0xf04>;
262 };
263 };
264
Michal Simekc926e6f2016-11-11 13:21:04 +0100265 amba: amba@0 {
Michal Simek44303df2015-10-30 15:39:18 +0100266 compatible = "simple-bus";
Michal Simekc9811e12016-02-22 09:57:27 +0100267 u-boot,dm-pre-reloc;
Michal Simek44303df2015-10-30 15:39:18 +0100268 #address-cells = <2>;
269 #size-cells = <1>;
Michal Simek85d11422016-04-07 15:07:38 +0200270 ranges = <0 0 0 0 0xffffffff>;
Michal Simek44303df2015-10-30 15:39:18 +0100271
272 can0: can@ff060000 {
273 compatible = "xlnx,zynq-can-1.0";
274 status = "disabled";
275 clock-names = "can_clk", "pclk";
276 reg = <0x0 0xff060000 0x1000>;
277 interrupts = <0 23 4>;
278 interrupt-parent = <&gic>;
279 tx-fifo-depth = <0x40>;
280 rx-fifo-depth = <0x40>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800281 power-domains = <&pd_can0>;
Michal Simek44303df2015-10-30 15:39:18 +0100282 };
283
284 can1: can@ff070000 {
285 compatible = "xlnx,zynq-can-1.0";
286 status = "disabled";
287 clock-names = "can_clk", "pclk";
288 reg = <0x0 0xff070000 0x1000>;
289 interrupts = <0 24 4>;
290 interrupt-parent = <&gic>;
291 tx-fifo-depth = <0x40>;
292 rx-fifo-depth = <0x40>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800293 power-domains = <&pd_can1>;
Michal Simek44303df2015-10-30 15:39:18 +0100294 };
295
Michal Simekff50d212015-11-26 11:21:25 +0100296 cci: cci@fd6e0000 {
297 compatible = "arm,cci-400";
298 reg = <0x0 0xfd6e0000 0x9000>;
299 ranges = <0x0 0x0 0xfd6e0000 0x10000>;
300 #address-cells = <1>;
301 #size-cells = <1>;
302
303 pmu@9000 {
304 compatible = "arm,cci-400-pmu,r1";
305 reg = <0x9000 0x5000>;
306 interrupt-parent = <&gic>;
307 interrupts = <0 123 4>,
308 <0 123 4>,
309 <0 123 4>,
310 <0 123 4>,
311 <0 123 4>;
312 };
313 };
314
Michal Simek44303df2015-10-30 15:39:18 +0100315 /* GDMA */
316 fpd_dma_chan1: dma@fd500000 {
317 status = "disabled";
318 compatible = "xlnx,zynqmp-dma-1.0";
319 reg = <0x0 0xfd500000 0x1000>;
320 interrupt-parent = <&gic>;
321 interrupts = <0 124 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530322 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100323 xlnx,id = <0>;
324 xlnx,bus-width = <128>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800325 power-domains = <&pd_gdma>;
Michal Simek44303df2015-10-30 15:39:18 +0100326 };
327
328 fpd_dma_chan2: dma@fd510000 {
329 status = "disabled";
330 compatible = "xlnx,zynqmp-dma-1.0";
331 reg = <0x0 0xfd510000 0x1000>;
332 interrupt-parent = <&gic>;
333 interrupts = <0 125 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530334 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100335 xlnx,id = <1>;
336 xlnx,bus-width = <128>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800337 power-domains = <&pd_gdma>;
Michal Simek44303df2015-10-30 15:39:18 +0100338 };
339
340 fpd_dma_chan3: dma@fd520000 {
341 status = "disabled";
342 compatible = "xlnx,zynqmp-dma-1.0";
343 reg = <0x0 0xfd520000 0x1000>;
344 interrupt-parent = <&gic>;
345 interrupts = <0 126 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530346 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100347 xlnx,id = <2>;
348 xlnx,bus-width = <128>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800349 power-domains = <&pd_gdma>;
Michal Simek44303df2015-10-30 15:39:18 +0100350 };
351
352 fpd_dma_chan4: dma@fd530000 {
353 status = "disabled";
354 compatible = "xlnx,zynqmp-dma-1.0";
355 reg = <0x0 0xfd530000 0x1000>;
356 interrupt-parent = <&gic>;
357 interrupts = <0 127 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530358 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100359 xlnx,id = <3>;
360 xlnx,bus-width = <128>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800361 power-domains = <&pd_gdma>;
Michal Simek44303df2015-10-30 15:39:18 +0100362 };
363
364 fpd_dma_chan5: dma@fd540000 {
365 status = "disabled";
366 compatible = "xlnx,zynqmp-dma-1.0";
367 reg = <0x0 0xfd540000 0x1000>;
368 interrupt-parent = <&gic>;
369 interrupts = <0 128 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530370 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100371 xlnx,id = <4>;
372 xlnx,bus-width = <128>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800373 power-domains = <&pd_gdma>;
Michal Simek44303df2015-10-30 15:39:18 +0100374 };
375
376 fpd_dma_chan6: dma@fd550000 {
377 status = "disabled";
378 compatible = "xlnx,zynqmp-dma-1.0";
379 reg = <0x0 0xfd550000 0x1000>;
380 interrupt-parent = <&gic>;
381 interrupts = <0 129 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530382 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100383 xlnx,id = <5>;
384 xlnx,bus-width = <128>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800385 power-domains = <&pd_gdma>;
Michal Simek44303df2015-10-30 15:39:18 +0100386 };
387
388 fpd_dma_chan7: dma@fd560000 {
389 status = "disabled";
390 compatible = "xlnx,zynqmp-dma-1.0";
391 reg = <0x0 0xfd560000 0x1000>;
392 interrupt-parent = <&gic>;
393 interrupts = <0 130 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530394 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100395 xlnx,id = <6>;
396 xlnx,bus-width = <128>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800397 power-domains = <&pd_gdma>;
Michal Simek44303df2015-10-30 15:39:18 +0100398 };
399
400 fpd_dma_chan8: dma@fd570000 {
401 status = "disabled";
402 compatible = "xlnx,zynqmp-dma-1.0";
403 reg = <0x0 0xfd570000 0x1000>;
404 interrupt-parent = <&gic>;
405 interrupts = <0 131 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530406 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100407 xlnx,id = <7>;
408 xlnx,bus-width = <128>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800409 power-domains = <&pd_gdma>;
Michal Simek44303df2015-10-30 15:39:18 +0100410 };
411
412 gpu: gpu@fd4b0000 {
413 status = "disabled";
414 compatible = "arm,mali-400", "arm,mali-utgard";
415 reg = <0x0 0xfd4b0000 0x30000>;
416 interrupt-parent = <&gic>;
417 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
418 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
419 };
420
421 /* ADMA */
422 lpd_dma_chan1: dma@ffa80000 {
423 status = "disabled";
424 compatible = "xlnx,zynqmp-dma-1.0";
425 reg = <0x0 0xffa80000 0x1000>;
426 interrupt-parent = <&gic>;
427 interrupts = <0 77 4>;
428 xlnx,id = <0>;
429 xlnx,bus-width = <64>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800430 power-domains = <&pd_adma>;
Michal Simek44303df2015-10-30 15:39:18 +0100431 };
432
433 lpd_dma_chan2: dma@ffa90000 {
434 status = "disabled";
435 compatible = "xlnx,zynqmp-dma-1.0";
436 reg = <0x0 0xffa90000 0x1000>;
437 interrupt-parent = <&gic>;
438 interrupts = <0 78 4>;
439 xlnx,id = <1>;
440 xlnx,bus-width = <64>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800441 power-domains = <&pd_adma>;
Michal Simek44303df2015-10-30 15:39:18 +0100442 };
443
444 lpd_dma_chan3: dma@ffaa0000 {
445 status = "disabled";
446 compatible = "xlnx,zynqmp-dma-1.0";
447 reg = <0x0 0xffaa0000 0x1000>;
448 interrupt-parent = <&gic>;
449 interrupts = <0 79 4>;
450 xlnx,id = <2>;
451 xlnx,bus-width = <64>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800452 power-domains = <&pd_adma>;
Michal Simek44303df2015-10-30 15:39:18 +0100453 };
454
455 lpd_dma_chan4: dma@ffab0000 {
456 status = "disabled";
457 compatible = "xlnx,zynqmp-dma-1.0";
458 reg = <0x0 0xffab0000 0x1000>;
459 interrupt-parent = <&gic>;
460 interrupts = <0 80 4>;
461 xlnx,id = <3>;
462 xlnx,bus-width = <64>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800463 power-domains = <&pd_adma>;
Michal Simek44303df2015-10-30 15:39:18 +0100464 };
465
466 lpd_dma_chan5: dma@ffac0000 {
467 status = "disabled";
468 compatible = "xlnx,zynqmp-dma-1.0";
469 reg = <0x0 0xffac0000 0x1000>;
470 interrupt-parent = <&gic>;
471 interrupts = <0 81 4>;
472 xlnx,id = <4>;
473 xlnx,bus-width = <64>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800474 power-domains = <&pd_adma>;
Michal Simek44303df2015-10-30 15:39:18 +0100475 };
476
477 lpd_dma_chan6: dma@ffad0000 {
478 status = "disabled";
479 compatible = "xlnx,zynqmp-dma-1.0";
480 reg = <0x0 0xffad0000 0x1000>;
481 interrupt-parent = <&gic>;
482 interrupts = <0 82 4>;
483 xlnx,id = <5>;
484 xlnx,bus-width = <64>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800485 power-domains = <&pd_adma>;
Michal Simek44303df2015-10-30 15:39:18 +0100486 };
487
488 lpd_dma_chan7: dma@ffae0000 {
489 status = "disabled";
490 compatible = "xlnx,zynqmp-dma-1.0";
491 reg = <0x0 0xffae0000 0x1000>;
492 interrupt-parent = <&gic>;
493 interrupts = <0 83 4>;
494 xlnx,id = <6>;
495 xlnx,bus-width = <64>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800496 power-domains = <&pd_adma>;
Michal Simek44303df2015-10-30 15:39:18 +0100497 };
498
499 lpd_dma_chan8: dma@ffaf0000 {
500 status = "disabled";
501 compatible = "xlnx,zynqmp-dma-1.0";
502 reg = <0x0 0xffaf0000 0x1000>;
503 interrupt-parent = <&gic>;
504 interrupts = <0 84 4>;
505 xlnx,id = <7>;
506 xlnx,bus-width = <64>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800507 power-domains = <&pd_adma>;
Michal Simek44303df2015-10-30 15:39:18 +0100508 };
509
Naga Sureshkumar Relli90869002016-03-11 13:10:26 +0530510 mc: memory-controller@fd070000 {
511 compatible = "xlnx,zynqmp-ddrc-2.40a";
512 reg = <0x0 0xfd070000 0x30000>;
513 interrupt-parent = <&gic>;
514 interrupts = <0 112 4>;
515 };
516
Michal Simek44303df2015-10-30 15:39:18 +0100517 nand0: nand@ff100000 {
518 compatible = "arasan,nfc-v3p10";
519 status = "disabled";
520 reg = <0x0 0xff100000 0x1000>;
521 clock-names = "clk_sys", "clk_flash";
522 interrupt-parent = <&gic>;
523 interrupts = <0 14 4>;
524 #address-cells = <2>;
525 #size-cells = <1>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800526 power-domains = <&pd_nand>;
Michal Simek44303df2015-10-30 15:39:18 +0100527 };
528
529 gem0: ethernet@ff0b0000 {
Michal Simekda2ad782016-02-11 15:26:46 +0100530 compatible = "cdns,zynqmp-gem";
Michal Simek44303df2015-10-30 15:39:18 +0100531 status = "disabled";
532 interrupt-parent = <&gic>;
533 interrupts = <0 57 4>, <0 57 4>;
534 reg = <0x0 0xff0b0000 0x1000>;
535 clock-names = "pclk", "hclk", "tx_clk";
536 #address-cells = <1>;
537 #size-cells = <0>;
Edgar E. Iglesias7f1d7d92015-11-26 14:12:20 +0100538 #stream-id-cells = <1>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800539 power-domains = <&pd_eth0>;
Michal Simek44303df2015-10-30 15:39:18 +0100540 };
541
542 gem1: ethernet@ff0c0000 {
Michal Simekda2ad782016-02-11 15:26:46 +0100543 compatible = "cdns,zynqmp-gem";
Michal Simek44303df2015-10-30 15:39:18 +0100544 status = "disabled";
545 interrupt-parent = <&gic>;
546 interrupts = <0 59 4>, <0 59 4>;
547 reg = <0x0 0xff0c0000 0x1000>;
548 clock-names = "pclk", "hclk", "tx_clk";
549 #address-cells = <1>;
550 #size-cells = <0>;
Edgar E. Iglesias7f1d7d92015-11-26 14:12:20 +0100551 #stream-id-cells = <1>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800552 power-domains = <&pd_eth1>;
Michal Simek44303df2015-10-30 15:39:18 +0100553 };
554
555 gem2: ethernet@ff0d0000 {
Michal Simekda2ad782016-02-11 15:26:46 +0100556 compatible = "cdns,zynqmp-gem";
Michal Simek44303df2015-10-30 15:39:18 +0100557 status = "disabled";
558 interrupt-parent = <&gic>;
559 interrupts = <0 61 4>, <0 61 4>;
560 reg = <0x0 0xff0d0000 0x1000>;
561 clock-names = "pclk", "hclk", "tx_clk";
562 #address-cells = <1>;
563 #size-cells = <0>;
Edgar E. Iglesias7f1d7d92015-11-26 14:12:20 +0100564 #stream-id-cells = <1>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800565 power-domains = <&pd_eth2>;
Michal Simek44303df2015-10-30 15:39:18 +0100566 };
567
568 gem3: ethernet@ff0e0000 {
Michal Simekda2ad782016-02-11 15:26:46 +0100569 compatible = "cdns,zynqmp-gem";
Michal Simek44303df2015-10-30 15:39:18 +0100570 status = "disabled";
571 interrupt-parent = <&gic>;
572 interrupts = <0 63 4>, <0 63 4>;
573 reg = <0x0 0xff0e0000 0x1000>;
574 clock-names = "pclk", "hclk", "tx_clk";
575 #address-cells = <1>;
576 #size-cells = <0>;
Edgar E. Iglesias7f1d7d92015-11-26 14:12:20 +0100577 #stream-id-cells = <1>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800578 power-domains = <&pd_eth3>;
Michal Simek44303df2015-10-30 15:39:18 +0100579 };
580
581 gpio: gpio@ff0a0000 {
582 compatible = "xlnx,zynqmp-gpio-1.0";
583 status = "disabled";
584 #gpio-cells = <0x2>;
Michal Simek7c38ca32015-11-23 13:26:15 +0100585 #interrupt-cells = <2>;
586 interrupt-controller;
Michal Simek44303df2015-10-30 15:39:18 +0100587 interrupt-parent = <&gic>;
588 interrupts = <0 16 4>;
589 reg = <0x0 0xff0a0000 0x1000>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800590 power-domains = <&pd_gpio>;
Michal Simek44303df2015-10-30 15:39:18 +0100591 };
592
593 i2c0: i2c@ff020000 {
594 compatible = "cdns,i2c-r1p10";
595 status = "disabled";
596 interrupt-parent = <&gic>;
597 interrupts = <0 17 4>;
598 reg = <0x0 0xff020000 0x1000>;
599 #address-cells = <1>;
600 #size-cells = <0>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800601 power-domains = <&pd_i2c0>;
Michal Simek44303df2015-10-30 15:39:18 +0100602 };
603
604 i2c1: i2c@ff030000 {
605 compatible = "cdns,i2c-r1p10";
606 status = "disabled";
607 interrupt-parent = <&gic>;
608 interrupts = <0 18 4>;
609 reg = <0x0 0xff030000 0x1000>;
610 #address-cells = <1>;
611 #size-cells = <0>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800612 power-domains = <&pd_i2c1>;
Michal Simek44303df2015-10-30 15:39:18 +0100613 };
614
615 pcie: pcie@fd0e0000 {
616 compatible = "xlnx,nwl-pcie-2.11";
617 status = "disabled";
618 #address-cells = <3>;
619 #size-cells = <2>;
620 #interrupt-cells = <1>;
621 device_type = "pci";
622 interrupt-parent = <&gic>;
Michal Simek91a8b0e2016-01-20 12:59:23 +0100623 interrupts = <0 118 4>,
624 <0 116 4>,
625 <0 115 4>, /* MSI_1 [63...32] */
626 <0 114 4>; /* MSI_0 [31...0] */
Michal Simek44303df2015-10-30 15:39:18 +0100627 interrupt-names = "misc", "intx", "msi_1", "msi_0";
628 reg = <0x0 0xfd0e0000 0x1000>,
629 <0x0 0xfd480000 0x1000>,
630 <0x0 0xe0000000 0x1000000>;
631 reg-names = "breg", "pcireg", "cfg";
632 ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
Bharat Kumar Gogada33aec512016-02-15 21:18:58 +0530633 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
634 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
635 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
636 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
637 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
638 pcie_intc: legacy-interrupt-controller {
639 interrupt-controller;
640 #address-cells = <0>;
641 #interrupt-cells = <1>;
642 };
Michal Simek44303df2015-10-30 15:39:18 +0100643 };
644
645 qspi: spi@ff0f0000 {
646 compatible = "xlnx,zynqmp-qspi-1.0";
647 status = "disabled";
648 clock-names = "ref_clk", "pclk";
649 interrupts = <0 15 4>;
650 interrupt-parent = <&gic>;
651 num-cs = <1>;
Michal Simekc588d152016-04-07 15:01:33 +0200652 reg = <0x0 0xff0f0000 0x1000>,
653 <0x0 0xc0000000 0x8000000>;
Michal Simek44303df2015-10-30 15:39:18 +0100654 #address-cells = <1>;
655 #size-cells = <0>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800656 power-domains = <&pd_qspi>;
Michal Simek44303df2015-10-30 15:39:18 +0100657 };
658
659 rtc: rtc@ffa60000 {
660 compatible = "xlnx,zynqmp-rtc";
661 status = "disabled";
662 reg = <0x0 0xffa60000 0x100>;
663 interrupt-parent = <&gic>;
664 interrupts = <0 26 4>, <0 27 4>;
665 interrupt-names = "alarm", "sec";
666 };
667
668 sata: ahci@fd0c0000 {
669 compatible = "ceva,ahci-1v84";
670 status = "disabled";
671 reg = <0x0 0xfd0c0000 0x2000>;
672 interrupt-parent = <&gic>;
673 interrupts = <0 133 4>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800674 power-domains = <&pd_sata>;
Michal Simek44303df2015-10-30 15:39:18 +0100675 };
676
677 sdhci0: sdhci@ff160000 {
Michal Simekc9811e12016-02-22 09:57:27 +0100678 u-boot,dm-pre-reloc;
Michal Simek44303df2015-10-30 15:39:18 +0100679 compatible = "arasan,sdhci-8.9a";
680 status = "disabled";
681 interrupt-parent = <&gic>;
682 interrupts = <0 48 4>;
683 reg = <0x0 0xff160000 0x1000>;
684 clock-names = "clk_xin", "clk_ahb";
P L Sai Krishnabd750e72016-01-19 19:01:10 +0530685 broken-tuning;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800686 power-domains = <&pd_sd0>;
Michal Simek44303df2015-10-30 15:39:18 +0100687 };
688
689 sdhci1: sdhci@ff170000 {
Michal Simekc9811e12016-02-22 09:57:27 +0100690 u-boot,dm-pre-reloc;
Michal Simek44303df2015-10-30 15:39:18 +0100691 compatible = "arasan,sdhci-8.9a";
692 status = "disabled";
693 interrupt-parent = <&gic>;
694 interrupts = <0 49 4>;
695 reg = <0x0 0xff170000 0x1000>;
696 clock-names = "clk_xin", "clk_ahb";
P L Sai Krishnabd750e72016-01-19 19:01:10 +0530697 broken-tuning;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800698 power-domains = <&pd_sd1>;
Michal Simek44303df2015-10-30 15:39:18 +0100699 };
700
701 smmu: smmu@fd800000 {
702 compatible = "arm,mmu-500";
703 reg = <0x0 0xfd800000 0x20000>;
704 #global-interrupts = <1>;
705 interrupt-parent = <&gic>;
Edgar E. Iglesias88a85aa2015-11-26 14:12:19 +0100706 interrupts = <0 155 4>,
707 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
708 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
709 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
710 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
Edgar E. Iglesias7f1d7d92015-11-26 14:12:20 +0100711 mmu-masters = < &gem0 0x874
712 &gem1 0x875
713 &gem2 0x876
714 &gem3 0x877 >;
Michal Simek44303df2015-10-30 15:39:18 +0100715 };
716
717 spi0: spi@ff040000 {
718 compatible = "cdns,spi-r1p6";
719 status = "disabled";
720 interrupt-parent = <&gic>;
721 interrupts = <0 19 4>;
722 reg = <0x0 0xff040000 0x1000>;
723 clock-names = "ref_clk", "pclk";
724 #address-cells = <1>;
725 #size-cells = <0>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800726 power-domains = <&pd_spi0>;
Michal Simek44303df2015-10-30 15:39:18 +0100727 };
728
729 spi1: spi@ff050000 {
730 compatible = "cdns,spi-r1p6";
731 status = "disabled";
732 interrupt-parent = <&gic>;
733 interrupts = <0 20 4>;
734 reg = <0x0 0xff050000 0x1000>;
735 clock-names = "ref_clk", "pclk";
736 #address-cells = <1>;
737 #size-cells = <0>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800738 power-domains = <&pd_spi1>;
Michal Simek44303df2015-10-30 15:39:18 +0100739 };
740
741 ttc0: timer@ff110000 {
742 compatible = "cdns,ttc";
743 status = "disabled";
744 interrupt-parent = <&gic>;
745 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
746 reg = <0x0 0xff110000 0x1000>;
747 timer-width = <32>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800748 power-domains = <&pd_ttc0>;
Michal Simek44303df2015-10-30 15:39:18 +0100749 };
750
751 ttc1: timer@ff120000 {
752 compatible = "cdns,ttc";
753 status = "disabled";
754 interrupt-parent = <&gic>;
755 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
756 reg = <0x0 0xff120000 0x1000>;
757 timer-width = <32>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800758 power-domains = <&pd_ttc1>;
Michal Simek44303df2015-10-30 15:39:18 +0100759 };
760
761 ttc2: timer@ff130000 {
762 compatible = "cdns,ttc";
763 status = "disabled";
764 interrupt-parent = <&gic>;
765 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
766 reg = <0x0 0xff130000 0x1000>;
767 timer-width = <32>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800768 power-domains = <&pd_ttc2>;
Michal Simek44303df2015-10-30 15:39:18 +0100769 };
770
771 ttc3: timer@ff140000 {
772 compatible = "cdns,ttc";
773 status = "disabled";
774 interrupt-parent = <&gic>;
775 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
776 reg = <0x0 0xff140000 0x1000>;
777 timer-width = <32>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800778 power-domains = <&pd_ttc3>;
Michal Simek44303df2015-10-30 15:39:18 +0100779 };
780
781 uart0: serial@ff000000 {
Michal Simekc9811e12016-02-22 09:57:27 +0100782 u-boot,dm-pre-reloc;
Michal Simekca2f5872015-11-27 13:22:58 +0100783 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
Michal Simek44303df2015-10-30 15:39:18 +0100784 status = "disabled";
785 interrupt-parent = <&gic>;
786 interrupts = <0 21 4>;
787 reg = <0x0 0xff000000 0x1000>;
788 clock-names = "uart_clk", "pclk";
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800789 power-domains = <&pd_uart0>;
Michal Simek44303df2015-10-30 15:39:18 +0100790 };
791
792 uart1: serial@ff010000 {
Michal Simekc9811e12016-02-22 09:57:27 +0100793 u-boot,dm-pre-reloc;
Michal Simekca2f5872015-11-27 13:22:58 +0100794 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
Michal Simek44303df2015-10-30 15:39:18 +0100795 status = "disabled";
796 interrupt-parent = <&gic>;
797 interrupts = <0 22 4>;
798 reg = <0x0 0xff010000 0x1000>;
799 clock-names = "uart_clk", "pclk";
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800800 power-domains = <&pd_uart1>;
Michal Simek44303df2015-10-30 15:39:18 +0100801 };
802
Michal Simekc926e6f2016-11-11 13:21:04 +0100803 usb0: usb0 {
Michal Simeka84de482016-04-07 15:06:07 +0200804 #address-cells = <2>;
805 #size-cells = <1>;
Michal Simek44303df2015-10-30 15:39:18 +0100806 status = "disabled";
Michal Simeka84de482016-04-07 15:06:07 +0200807 compatible = "xlnx,zynqmp-dwc3";
808 clock-names = "bus_clk", "ref_clk";
809 clocks = <&clk125>, <&clk125>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800810 power-domains = <&pd_usb0>;
Michal Simeka84de482016-04-07 15:06:07 +0200811 ranges;
812
813 dwc3_0: dwc3@fe200000 {
814 compatible = "snps,dwc3";
815 status = "disabled";
816 reg = <0x0 0xfe200000 0x40000>;
817 interrupt-parent = <&gic>;
818 interrupts = <0 65 4>;
819 /* snps,quirk-frame-length-adjustment = <0x20>; */
820 snps,refclk_fladj;
821 };
Michal Simek44303df2015-10-30 15:39:18 +0100822 };
823
Michal Simekc926e6f2016-11-11 13:21:04 +0100824 usb1: usb1 {
Michal Simeka84de482016-04-07 15:06:07 +0200825 #address-cells = <2>;
826 #size-cells = <1>;
Michal Simek44303df2015-10-30 15:39:18 +0100827 status = "disabled";
Michal Simeka84de482016-04-07 15:06:07 +0200828 compatible = "xlnx,zynqmp-dwc3";
829 clock-names = "bus_clk", "ref_clk";
830 clocks = <&clk125>, <&clk125>;
Soren Brinkmann8f4e3972016-01-11 15:34:42 -0800831 power-domains = <&pd_usb1>;
Michal Simeka84de482016-04-07 15:06:07 +0200832 ranges;
833
834 dwc3_1: dwc3@fe300000 {
835 compatible = "snps,dwc3";
836 status = "disabled";
837 reg = <0x0 0xfe300000 0x40000>;
838 interrupt-parent = <&gic>;
839 interrupts = <0 70 4>;
840 /* snps,quirk-frame-length-adjustment = <0x20>; */
841 snps,refclk_fladj;
842 };
Michal Simek44303df2015-10-30 15:39:18 +0100843 };
844
845 watchdog0: watchdog@fd4d0000 {
846 compatible = "cdns,wdt-r1p2";
847 status = "disabled";
848 interrupt-parent = <&gic>;
Punnaiah Choudary Kallurid3fd4332015-11-04 12:34:17 +0530849 interrupts = <0 113 1>;
Michal Simek44303df2015-10-30 15:39:18 +0100850 reg = <0x0 0xfd4d0000 0x1000>;
851 timeout-sec = <10>;
852 };
853
854 xilinx_drm: xilinx_drm {
855 compatible = "xlnx,drm";
856 status = "disabled";
857 xlnx,encoder-slave = <&xlnx_dp>;
858 xlnx,connector-type = "DisplayPort";
859 xlnx,dp-sub = <&xlnx_dp_sub>;
860 planes {
861 xlnx,pixel-format = "rgb565";
862 plane0 {
863 dmas = <&xlnx_dpdma 3>;
864 dma-names = "dma";
865 };
866 plane1 {
867 dmas = <&xlnx_dpdma 0>;
868 dma-names = "dma";
869 };
870 };
871 };
872
Hyun Kwon695d75a2015-11-23 17:12:54 -0800873 xlnx_dp: dp@fd4a0000 {
Michal Simek44303df2015-10-30 15:39:18 +0100874 compatible = "xlnx,v-dp";
875 status = "disabled";
Michal Simek786db822016-01-27 19:02:37 +0100876 reg = <0x0 0xfd4a0000 0x1000>,
877 <0x0 0xfd400000 0x20000>;
Michal Simek44303df2015-10-30 15:39:18 +0100878 interrupts = <0 119 4>;
879 interrupt-parent = <&gic>;
880 clock-names = "aclk", "aud_clk";
881 xlnx,dp-version = "v1.2";
882 xlnx,max-lanes = <2>;
883 xlnx,max-link-rate = <540000>;
884 xlnx,max-bpc = <16>;
885 xlnx,enable-ycrcb;
886 xlnx,colormetry = "rgb";
887 xlnx,bpc = <8>;
888 xlnx,audio-chan = <2>;
889 xlnx,dp-sub = <&xlnx_dp_sub>;
Hyun Kwon939cfea2015-11-23 17:12:55 -0800890 xlnx,max-pclock-frequency = <300000>;
Michal Simek44303df2015-10-30 15:39:18 +0100891 };
892
893 xlnx_dp_snd_card: dp_snd_card {
894 compatible = "xlnx,dp-snd-card";
895 status = "disabled";
896 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
897 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
898 };
899
900 xlnx_dp_snd_codec0: dp_snd_codec0 {
901 compatible = "xlnx,dp-snd-codec";
902 status = "disabled";
903 clock-names = "aud_clk";
904 };
905
906 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
907 compatible = "xlnx,dp-snd-pcm";
908 status = "disabled";
909 dmas = <&xlnx_dpdma 4>;
910 dma-names = "tx";
911 };
912
913 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
914 compatible = "xlnx,dp-snd-pcm";
915 status = "disabled";
916 dmas = <&xlnx_dpdma 5>;
917 dma-names = "tx";
918 };
919
Hyun Kwon695d75a2015-11-23 17:12:54 -0800920 xlnx_dp_sub: dp_sub@fd4aa000 {
Michal Simek44303df2015-10-30 15:39:18 +0100921 compatible = "xlnx,dp-sub";
922 status = "disabled";
Michal Simekc588d152016-04-07 15:01:33 +0200923 reg = <0x0 0xfd4aa000 0x1000>,
924 <0x0 0xfd4ab000 0x1000>,
925 <0x0 0xfd4ac000 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100926 reg-names = "blend", "av_buf", "aud";
927 xlnx,output-fmt = "rgb";
Hyun Kwon939cfea2015-11-23 17:12:55 -0800928 xlnx,vid-fmt = "yuyv";
929 xlnx,gfx-fmt = "rgb565";
Michal Simek44303df2015-10-30 15:39:18 +0100930 };
931
932 xlnx_dpdma: dma@fd4c0000 {
933 compatible = "xlnx,dpdma";
934 status = "disabled";
935 reg = <0x0 0xfd4c0000 0x1000>;
936 interrupts = <0 122 4>;
937 interrupt-parent = <&gic>;
938 clock-names = "axi_clk";
939 dma-channels = <6>;
940 #dma-cells = <1>;
Michal Simekc926e6f2016-11-11 13:21:04 +0100941 dma-video0channel {
Michal Simek44303df2015-10-30 15:39:18 +0100942 compatible = "xlnx,video0";
943 };
Michal Simekc926e6f2016-11-11 13:21:04 +0100944 dma-video1channel {
Michal Simek44303df2015-10-30 15:39:18 +0100945 compatible = "xlnx,video1";
946 };
Michal Simekc926e6f2016-11-11 13:21:04 +0100947 dma-video2channel {
Michal Simek44303df2015-10-30 15:39:18 +0100948 compatible = "xlnx,video2";
949 };
Michal Simekc926e6f2016-11-11 13:21:04 +0100950 dma-graphicschannel {
Michal Simek44303df2015-10-30 15:39:18 +0100951 compatible = "xlnx,graphics";
952 };
Michal Simekc926e6f2016-11-11 13:21:04 +0100953 dma-audio0channel {
Michal Simek44303df2015-10-30 15:39:18 +0100954 compatible = "xlnx,audio0";
955 };
Michal Simekc926e6f2016-11-11 13:21:04 +0100956 dma-audio1channel {
Michal Simek44303df2015-10-30 15:39:18 +0100957 compatible = "xlnx,audio1";
958 };
959 };
960 };
961};