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Priyanka Jain58c3e622018-11-28 13:04:27 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Yangbo Lu34f39ce2021-06-03 10:51:19 +08003 * Copyright 2018-2021 NXP
Priyanka Jain58c3e622018-11-28 13:04:27 +00004 */
5
6#ifndef __LX2_COMMON_H
7#define __LX2_COMMON_H
8
9#include <asm/arch/stream_id_lsch3.h>
10#include <asm/arch/config.h>
11#include <asm/arch/soc.h>
12
Priyanka Jain58c3e622018-11-28 13:04:27 +000013#define CONFIG_FSL_MEMAC
14
Priyanka Jain58c3e622018-11-28 13:04:27 +000015#define CONFIG_SYS_FLASH_BASE 0x20000000
16
Priyanka Jain58c3e622018-11-28 13:04:27 +000017/* DDR */
Priyanka Jain58c3e622018-11-28 13:04:27 +000018#define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */
19#define CONFIG_VERY_BIG_RAM
20#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
21#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
22#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
23#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
24#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL
Priyanka Jain58c3e622018-11-28 13:04:27 +000025#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
26#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
27#define SPD_EEPROM_ADDRESS1 0x51
28#define SPD_EEPROM_ADDRESS2 0x52
29#define SPD_EEPROM_ADDRESS3 0x53
30#define SPD_EEPROM_ADDRESS4 0x54
31#define SPD_EEPROM_ADDRESS5 0x55
32#define SPD_EEPROM_ADDRESS6 0x56
33#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1
34#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */
Priyanka Jain58c3e622018-11-28 13:04:27 +000035#define CONFIG_SYS_MONITOR_LEN (936 * 1024)
36
37/* Miscellaneous configurable options */
Priyanka Jain58c3e622018-11-28 13:04:27 +000038
39/* SMP Definitinos */
Michael Walle3d3fe8b2020-06-01 21:53:26 +020040#define CPU_RELEASE_ADDR secondary_boot_addr
Priyanka Jain58c3e622018-11-28 13:04:27 +000041
42/* Generic Timer Definitions */
43/*
44 * This is not an accurate number. It is used in start.S. The frequency
45 * will be udpated later when get_bus_freq(0) is available.
46 */
47
Priyanka Jain58c3e622018-11-28 13:04:27 +000048
Priyanka Jain58c3e622018-11-28 13:04:27 +000049/* Serial Port */
Priyanka Jain58c3e622018-11-28 13:04:27 +000050#define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4)
51#define CONFIG_SYS_SERIAL0 0x21c0000
52#define CONFIG_SYS_SERIAL1 0x21d0000
53#define CONFIG_SYS_SERIAL2 0x21e0000
54#define CONFIG_SYS_SERIAL3 0x21f0000
55/*below might needs to be removed*/
56#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
57 (void *)CONFIG_SYS_SERIAL1, \
58 (void *)CONFIG_SYS_SERIAL2, \
59 (void *)CONFIG_SYS_SERIAL3 }
Priyanka Jain58c3e622018-11-28 13:04:27 +000060
61/* MC firmware */
62#define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000
63#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000
64#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000
65#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000
66#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
67
Priyanka Jain58c3e622018-11-28 13:04:27 +000068/*
69 * Carve out a DDR region which will not be used by u-boot/Linux
70 *
71 * It will be used by MC and Debug Server. The MC region must be
72 * 512MB aligned, so the min size to hide is 512MB.
73 */
74#ifdef CONFIG_FSL_MC_ENET
Meenakshi Aggarwal43ad41e2019-02-27 14:41:02 +053075#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024)
Priyanka Jain58c3e622018-11-28 13:04:27 +000076#endif
77
78/* I2C bus multiplexer */
79#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
80#define I2C_MUX_CH_DEFAULT 0x8
81
82/* RTC */
83#define RTC
84#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
85
86/* EEPROM */
Priyanka Jain58c3e622018-11-28 13:04:27 +000087#define CONFIG_SYS_I2C_EEPROM_NXID
88#define CONFIG_SYS_EEPROM_BUS_NUM 0
Priyanka Jain58c3e622018-11-28 13:04:27 +000089
90/* Qixis */
Priyanka Jain58c3e622018-11-28 13:04:27 +000091#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
92
93/* PCI */
94#ifdef CONFIG_PCI
Priyanka Jain58c3e622018-11-28 13:04:27 +000095#define CONFIG_PCI_SCAN_SHOW
96#endif
97
Priyanka Jain58c3e622018-11-28 13:04:27 +000098/* SATA */
99
100#ifdef CONFIG_SCSI
Priyanka Jain58c3e622018-11-28 13:04:27 +0000101#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
102#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2
Priyanka Jain58c3e622018-11-28 13:04:27 +0000103#endif
104
105/* USB */
Tom Rinie8d3eaa2021-07-09 10:11:55 -0400106#ifdef CONFIG_USB_HOST
Meenakshi Aggarwal9ed303d2020-12-04 20:17:28 +0530107#ifndef CONFIG_TARGET_LX2162AQDS
Priyanka Jain58c3e622018-11-28 13:04:27 +0000108#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
109#endif
Meenakshi Aggarwal9ed303d2020-12-04 20:17:28 +0530110#endif
Priyanka Jain58c3e622018-11-28 13:04:27 +0000111
Tom Rini2f8a6db2021-12-14 13:36:40 -0500112#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
Priyanka Jain58c3e622018-11-28 13:04:27 +0000113
114#define CONFIG_HWCONFIG
115#define HWCONFIG_BUFFER_SIZE 128
116
Priyanka Jain58c3e622018-11-28 13:04:27 +0000117#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
118
119/* Initial environment variables */
Kuldeep Singhb9804c32020-03-12 15:13:00 +0530120#define XSPI_MC_INIT_CMD \
121 "sf probe 0:0 && " \
122 "sf read 0x80640000 0x640000 0x80000 && " \
Priyanka Jain760ca922021-08-18 12:37:03 +0530123 "sf read $fdt_addr_r 0xf00000 0x100000 && " \
Kuldeep Singhb9804c32020-03-12 15:13:00 +0530124 "env exists secureboot && " \
125 "esbc_validate 0x80640000 && " \
126 "esbc_validate 0x80680000; " \
127 "sf read 0x80a00000 0xa00000 0x300000 && " \
128 "sf read 0x80e00000 0xe00000 0x100000; " \
129 "fsl_mc start mc 0x80a00000 0x80e00000\0"
Priyanka Jain58c3e622018-11-28 13:04:27 +0000130
131#define SD_MC_INIT_CMD \
Pankaj Bansalf002b3f2019-07-17 10:33:54 +0000132 "mmc read 0x80a00000 0x5000 0x1200;" \
133 "mmc read 0x80e00000 0x7000 0x800;" \
Priyanka Jain760ca922021-08-18 12:37:03 +0530134 "mmc read $fdt_addr_r 0x7800 0x800;" \
Udit Agarwal19e97e42018-12-14 04:43:32 +0000135 "env exists secureboot && " \
Priyanka Singh20858a22020-01-22 10:31:22 +0000136 "mmc read 0x80640000 0x3200 0x20 && " \
137 "mmc read 0x80680000 0x3400 0x20 && " \
138 "esbc_validate 0x80640000 && " \
139 "esbc_validate 0x80680000 ;" \
Pankaj Bansalf002b3f2019-07-17 10:33:54 +0000140 "fsl_mc start mc 0x80a00000 0x80e00000\0"
Priyanka Jain58c3e622018-11-28 13:04:27 +0000141
Meenakshi Aggarwal3a67cbf2020-04-27 19:56:40 +0530142#define SD2_MC_INIT_CMD \
143 "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \
144 "mmc read 0x80e00000 0x7000 0x800;" \
Priyanka Jain760ca922021-08-18 12:37:03 +0530145 "mmc read $fdt_addr_r 0x7800 0x800;" \
Meenakshi Aggarwal3a67cbf2020-04-27 19:56:40 +0530146 "env exists secureboot && " \
147 "mmc read 0x80640000 0x3200 0x20 && " \
148 "mmc read 0x80680000 0x3400 0x20 && " \
149 "esbc_validate 0x80640000 && " \
150 "esbc_validate 0x80680000 ;" \
151 "fsl_mc start mc 0x80a00000 0x80e00000\0"
152
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000153#define EXTRA_ENV_SETTINGS \
154 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
155 "ramdisk_addr=0x800000\0" \
156 "ramdisk_size=0x2000000\0" \
157 "fdt_high=0xa0000000\0" \
158 "initrd_high=0xffffffffffffffff\0" \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000159 "kernel_start=0x1000000\0" \
Priyanka Singh20858a22020-01-22 10:31:22 +0000160 "kernelheader_start=0x600000\0" \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000161 "scriptaddr=0x80000000\0" \
162 "scripthdraddr=0x80080000\0" \
163 "fdtheader_addr_r=0x80100000\0" \
164 "kernelheader_addr_r=0x80200000\0" \
165 "kernel_addr_r=0x81000000\0" \
166 "kernelheader_size=0x40000\0" \
167 "fdt_addr_r=0x90000000\0" \
168 "load_addr=0xa0000000\0" \
169 "kernel_size=0x2800000\0" \
170 "kernel_addr_sd=0x8000\0" \
Priyanka Singh20858a22020-01-22 10:31:22 +0000171 "kernelhdr_addr_sd=0x3000\0" \
Manish Tomar4ed00652020-11-05 14:08:56 +0530172 "kernel_size_sd=0x14000\0" \
Udit Agarwald749bf92019-11-20 08:49:06 +0000173 "kernelhdr_size_sd=0x20\0" \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000174 "console=ttyAMA0,38400n8\0" \
175 BOOTENV \
176 "mcmemsize=0x70000000\0" \
177 XSPI_MC_INIT_CMD \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000178 "scan_dev_for_boot_part=" \
179 "part list ${devtype} ${devnum} devplist; " \
180 "env exists devplist || setenv devplist 1; " \
181 "for distro_bootpart in ${devplist}; do " \
182 "if fstype ${devtype} " \
183 "${devnum}:${distro_bootpart} " \
184 "bootfstype; then " \
185 "run scan_dev_for_boot; " \
186 "fi; " \
187 "done\0" \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000188 "boot_a_script=" \
189 "load ${devtype} ${devnum}:${distro_bootpart} " \
190 "${scriptaddr} ${prefix}${script}; " \
191 "env exists secureboot && load ${devtype} " \
192 "${devnum}:${distro_bootpart} " \
193 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
194 "&& esbc_validate ${scripthdraddr};" \
195 "source ${scriptaddr}\0"
196
197#define XSPI_NOR_BOOTCOMMAND \
Kuldeep Singhb9804c32020-03-12 15:13:00 +0530198 "sf probe 0:0; " \
199 "sf read 0x806c0000 0x6c0000 0x40000; " \
200 "env exists mcinitcmd && env exists secureboot" \
201 " && esbc_validate 0x806c0000; " \
202 "sf read 0x80d00000 0xd00000 0x100000; " \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000203 "env exists mcinitcmd && " \
Kuldeep Singhb9804c32020-03-12 15:13:00 +0530204 "fsl_mc lazyapply dpl 0x80d00000; " \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000205 "run distro_bootcmd;run xspi_bootcmd; " \
206 "env exists secureboot && esbc_halt;"
207
208#define SD_BOOTCOMMAND \
209 "env exists mcinitcmd && mmcinfo; " \
Pankaj Bansalf002b3f2019-07-17 10:33:54 +0000210 "mmc read 0x80d00000 0x6800 0x800; " \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000211 "env exists mcinitcmd && env exists secureboot " \
Priyanka Singh20858a22020-01-22 10:31:22 +0000212 " && mmc read 0x806C0000 0x3600 0x20 " \
213 "&& esbc_validate 0x806C0000;env exists mcinitcmd " \
Pankaj Bansalf002b3f2019-07-17 10:33:54 +0000214 "&& fsl_mc lazyapply dpl 0x80d00000;" \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000215 "run distro_bootcmd;run sd_bootcmd;" \
216 "env exists secureboot && esbc_halt;"
217
Meenakshi Aggarwalb7e7a462020-02-19 23:30:45 +0530218#define SD2_BOOTCOMMAND \
Meenakshi Aggarwal3a67cbf2020-04-27 19:56:40 +0530219 "mmc dev 1; env exists mcinitcmd && mmcinfo; " \
Meenakshi Aggarwalb7e7a462020-02-19 23:30:45 +0530220 "mmc read 0x80d00000 0x6800 0x800; " \
221 "env exists mcinitcmd && env exists secureboot " \
Meenakshi Aggarwal3a67cbf2020-04-27 19:56:40 +0530222 " && mmc read 0x806C0000 0x3600 0x20 " \
223 "&& esbc_validate 0x806C0000;env exists mcinitcmd " \
Meenakshi Aggarwalb7e7a462020-02-19 23:30:45 +0530224 "&& fsl_mc lazyapply dpl 0x80d00000;" \
225 "run distro_bootcmd;run sd2_bootcmd;" \
226 "env exists secureboot && esbc_halt;"
227
Daniel Klauer453db602022-02-09 15:53:41 +0100228#ifdef CONFIG_CMD_USB
229#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
230#else
231#define BOOT_TARGET_DEVICES_USB(func)
232#endif
233
234#ifdef CONFIG_MMC
235#define BOOT_TARGET_DEVICES_MMC(func, instance) func(MMC, mmc, instance)
236#else
237#define BOOT_TARGET_DEVICES_MMC(func)
238#endif
239
240#ifdef CONFIG_SCSI
241#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
242#else
243#define BOOT_TARGET_DEVICES_SCSI(func)
244#endif
245
246#ifdef CONFIG_CMD_DHCP
247#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
248#else
249#define BOOT_TARGET_DEVICES_DHCP(func)
250#endif
251
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000252#define BOOT_TARGET_DEVICES(func) \
Daniel Klauer453db602022-02-09 15:53:41 +0100253 BOOT_TARGET_DEVICES_USB(func) \
254 BOOT_TARGET_DEVICES_MMC(func, 0) \
255 BOOT_TARGET_DEVICES_MMC(func, 1) \
256 BOOT_TARGET_DEVICES_SCSI(func) \
257 BOOT_TARGET_DEVICES_DHCP(func)
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000258#include <config_distro_bootcmd.h>
259
Priyanka Jain58c3e622018-11-28 13:04:27 +0000260#endif /* __LX2_COMMON_H */