blob: 556c749f92060c1c44c2bf674c8e7f91b039c4f8 [file] [log] [blame]
Daniel Hellstrom823edd82008-03-28 10:06:52 +01001/* Configuration header file for LEON3 GRSIM, trying to be similar
2 * to Gaisler's GR-XC3S-1500 board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom823edd82008-03-28 10:06:52 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 *
20 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
21 *
22 * TSIM command
23 * tsim-leon3 -sdram 0 -ram 32000 -rom 8192 -mmu
24 *
25 */
26
Daniel Hellstrom823edd82008-03-28 10:06:52 +010027#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
28#define CONFIG_TSIM 1 /* ... running on TSIM */
29
30/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020031#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010032
33/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020034#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstrom823edd82008-03-28 10:06:52 +010035
36/*
37 * Serial console configuration
38 */
39#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020040#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom823edd82008-03-28 10:06:52 +010041
42/* Partitions */
43#define CONFIG_DOS_PARTITION
44#define CONFIG_MAC_PARTITION
45#define CONFIG_ISO_PARTITION
46
47/*
48 * Supported commands
49 */
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020050#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */
51#define CONFIG_CMD_BDI /* bdinfo */
52#define CONFIG_CMD_CONSOLE /* coninfo */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010053#define CONFIG_CMD_DIAG
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020054#define CONFIG_CMD_ECHO /* echo arguments */
55#define CONFIG_CMD_FPGA /* FPGA configuration Support */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010056#define CONFIG_CMD_IRQ
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020057#define CONFIG_CMD_ITEST /* Integer (and string) test */
58#define CONFIG_CMD_LOADB /* loadb */
59#define CONFIG_CMD_LOADS /* loads */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010060#define CONFIG_CMD_MISC /* Misc functions like sleep etc */
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020061#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010062#define CONFIG_CMD_REGINFO
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020063#define CONFIG_CMD_RUN /* run command in env variable */
64#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
65#define CONFIG_CMD_SOURCE /* "source" command support */
66#define CONFIG_CMD_XIMG /* Load part of Multi Image */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010067
68/*
69 * Autobooting
70 */
71#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
72
73#define CONFIG_PREBOOT "echo;" \
74 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
75 "echo"
76
77#undef CONFIG_BOOTARGS
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078/*#define CONFIG_SYS_HUSH_PARSER 0*/
Daniel Hellstrom823edd82008-03-28 10:06:52 +010079
80#define CONFIG_EXTRA_ENV_SETTINGS \
81 "netdev=eth0\0" \
82 "nfsargs=setenv bootargs root=/dev/nfs rw " \
83 "nfsroot=${serverip}:${rootpath}\0" \
84 "ramargs=setenv bootargs root=/dev/ram rw\0" \
85 "addip=setenv bootargs ${bootargs} " \
86 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
87 ":${hostname}:${netdev}:off panic=1\0" \
88 "flash_nfs=run nfsargs addip;" \
89 "bootm ${kernel_addr}\0" \
90 "flash_self=run ramargs addip;" \
91 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
92 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
93 "rootpath=/export/roofs\0" \
94 "scratch=40000000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000095 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom823edd82008-03-28 10:06:52 +010096 "ethaddr=00:00:7A:CC:00:12\0" \
97 "bootargs=console=ttyS0,38400" \
98 ""
99#define CONFIG_NETMASK 255.255.255.0
100#define CONFIG_GATEWAYIP 192.168.0.1
101#define CONFIG_SERVERIP 192.168.0.81
102#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger8b3637c2011-10-13 13:03:47 +0000103#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100104#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +0000105#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100106
107#define CONFIG_BOOTCOMMAND "run flash_self"
108
109/* Memory MAP
110 *
111 * Flash:
112 * |--------------------------------|
113 * | 0x00000000 Text & Data & BSS | *
114 * | for Monitor | *
115 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
116 * | UNUSED / Growth | * 256kb
117 * |--------------------------------|
118 * | 0x00050000 Base custom area | *
119 * | kernel / FS | *
120 * | | * Rest of Flash
121 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
122 * | END-0x00008000 Environment | * 32kb
123 * |--------------------------------|
124 *
125 *
126 *
127 * Main Memory:
128 * |--------------------------------|
129 * | UNUSED / scratch area |
130 * | |
131 * | |
132 * | |
133 * | |
134 * |--------------------------------|
135 * | Monitor .Text / .DATA / .BSS | * 256kb
136 * | Relocated! | *
137 * |--------------------------------|
138 * | Monitor Malloc | * 128kb (contains relocated environment)
139 * |--------------------------------|
140 * | Monitor/kernel STACK | * 64kb
141 * |--------------------------------|
142 * | Page Table for MMU systems | * 2k
143 * |--------------------------------|
144 * | PROM Code accessed from Linux | * 6kb-128b
145 * |--------------------------------|
146 * | Global data (avail from kernel)| * 128b
147 * |--------------------------------|
148 *
149 */
150
151/*
152 * Flash configuration (8,16 or 32 MB)
153 * TEXT base always at 0xFFF00000
154 * ENV_ADDR always at 0xFFF40000
155 * FLASH_BASE at 0xFC000000 for 64 MB
156 * 0xFE000000 for 32 MB
157 * 0xFF000000 for 16 MB
158 * 0xFF800000 for 8 MB
159 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_NO_FLASH 1
161#define CONFIG_SYS_FLASH_BASE 0x00000000
162#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200163#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100164
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100166
167#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
169#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100170
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
172#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
173#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
174#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100175
176#ifdef ENABLE_FLASH_SUPPORT
177/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200178#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100179
180#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
181
182/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200184#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100186#endif
187
188/*
189 * Environment settings
190 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200191#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200192/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200193/*#define CONFIG_ENV_SIZE 0x8000*/
194#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100195#define CONFIG_ENV_OVERWRITE 1
196
197/*
198 * Memory map
199 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200#define CONFIG_SYS_SDRAM_BASE 0x40000000
201#define CONFIG_SYS_SDRAM_SIZE 0x02000000
202#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100203
204/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200205#undef CONFIG_SYS_SRAM_BASE
206#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100207
208/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200209#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
210#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
211#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100212
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200213#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100214
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200215#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200216#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100217
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
219#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100220
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200221#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
223# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100224#endif
225
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
227#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
228#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100229
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200230#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
231#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100232
233/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200234#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
235#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100236
237/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200238#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100239
240/*
241 * Ethernet configuration
242 */
243#define CONFIG_GRETH 1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100244
245/* Default HARDWARE address */
246#define GRETH_HWADDR_0 0x00
247#define GRETH_HWADDR_1 0x00
248#define GRETH_HWADDR_2 0x7A
249#define GRETH_HWADDR_3 0xcc
250#define GRETH_HWADDR_4 0x00
251#define GRETH_HWADDR_5 0x12
252
253#define CONFIG_ETHADDR 00:00:7a:cc:00:12
254
255/*
256 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
257 */
258/* #define CONFIG_GRETH_10MBIT 1 */
259#define CONFIG_PHY_ADDR 0x00
260
261/*
262 * Miscellaneous configurable options
263 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200264#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100265#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200266#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100267#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200268#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100269#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200270#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
271#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
272#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100273
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200274#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
275#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100276
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200277#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100278
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100279/***** Gaisler GRLIB IP-Cores Config ********/
280
281/* AMBA Plug & Play info display on startup */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200282/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100283
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200284#define CONFIG_SYS_GRLIB_SDRAM 0
285#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100286#if CONFIG_GRSIM
287/* GRSIM configuration */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200288#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100289#else
290/* TSIM configuration */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200291#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100292#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200293#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100294
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200295#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11))
296#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
297#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100298
299/* no DDR controller */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200300#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100301
302/* no DDR2 Controller */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200303#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
304#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100305
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200306#define CONFIG_SYS_GRLIB_APBUART_SCALER \
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100307 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
308
309/* default kernel command line */
310#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
311
312#define CONFIG_IDENT_STRING "Gaisler GRSIM"
313
314#endif /* __CONFIG_H */