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Marcel Ziswilerbf78b272014-09-05 10:18:38 +02001/dts-v1/;
2
3#include "tegra30.dtsi"
4
5/ {
6 model = "Toradex Apalis T30";
7 compatible = "toradex,apalis_t30", "nvidia,tegra30";
8
Marcel Ziswiler9aafef42014-10-11 00:34:04 +02009 chosen {
10 stdout-path = &uarta;
11 };
12
Marcel Ziswilerbf78b272014-09-05 10:18:38 +020013 aliases {
14 i2c0 = "/i2c@7000d000";
15 i2c1 = "/i2c@7000c000";
16 i2c2 = "/i2c@7000c500";
17 i2c3 = "/i2c@7000c700";
18 sdhci0 = "/sdhci@78000600";
19 sdhci1 = "/sdhci@78000400";
20 sdhci2 = "/sdhci@78000000";
21 usb0 = "/usb@7d000000";
22 usb1 = "/usb@7d004000";
23 usb2 = "/usb@7d008000";
24 };
25
26 memory {
27 device_type = "memory";
28 reg = <0x80000000 0x40000000>;
29 };
30
31 pcie-controller@00003000 {
32 status = "okay";
33 avdd-pexa-supply = <&vdd2_reg>;
34 vdd-pexa-supply = <&vdd2_reg>;
35 avdd-pexb-supply = <&vdd2_reg>;
36 vdd-pexb-supply = <&vdd2_reg>;
37 avdd-pex-pll-supply = <&vdd2_reg>;
38 avdd-plle-supply = <&ldo6_reg>;
39 vddio-pex-ctl-supply = <&sys_3v3_reg>;
40 hvdd-pex-supply = <&sys_3v3_reg>;
41
42 pci@1,0 {
43 nvidia,num-lanes = <4>;
44 };
45
46 pci@2,0 {
47 nvidia,num-lanes = <1>;
48 };
49
50 pci@3,0 {
51 status = "okay";
52 nvidia,num-lanes = <1>;
53 };
54 };
55
56 /*
57 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
58 * board)
59 */
60 i2c@7000c000 {
61 status = "okay";
62 clock-frequency = <100000>;
63 };
64
65 /* GEN2_I2C: unused */
66
67 /*
68 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
69 * carrier board)
70 */
71 i2c@7000c500 {
72 status = "okay";
73 clock-frequency = <100000>;
74 };
75
76 /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
77 i2c@7000c700 {
78 status = "okay";
79 clock-frequency = <100000>;
80 };
81
82 /*
83 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
84 * touch screen controller
85 */
86 i2c@7000d000 {
87 status = "okay";
88 clock-frequency = <100000>;
89
90 pmic: tps65911@2d {
91 compatible = "ti,tps65911";
92 reg = <0x2d>;
93
94 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
95 #interrupt-cells = <2>;
96 interrupt-controller;
97
98 ti,system-power-controller;
99
100 #gpio-cells = <2>;
101 gpio-controller;
102
103 vcc1-supply = <&sys_3v3_reg>;
104 vcc2-supply = <&sys_3v3_reg>;
105 vcc3-supply = <&vio_reg>;
106 vcc4-supply = <&sys_3v3_reg>;
107 vcc5-supply = <&sys_3v3_reg>;
108 vcc6-supply = <&vio_reg>;
109 vcc7-supply = <&charge_pump_5v0_reg>;
110 vccio-supply = <&sys_3v3_reg>;
111
112 regulators {
113 #address-cells = <1>;
114 #size-cells = <0>;
115
116 /* SW1: +V1.35_VDDIO_DDR */
117 vdd1_reg: vdd1 {
118 regulator-name = "vddio_ddr_1v35";
119 regulator-min-microvolt = <1350000>;
120 regulator-max-microvolt = <1350000>;
121 regulator-always-on;
122 };
123
124 /* SW2: +V1.05 */
125 vdd2_reg: vdd2 {
126 regulator-name =
127 "vdd_pexa,vdd_pexb,vdd_sata";
128 regulator-min-microvolt = <1050000>;
129 regulator-max-microvolt = <1050000>;
130 };
131
132 /* SW CTRL: +V1.0_VDD_CPU */
133 vddctrl_reg: vddctrl {
134 regulator-name = "vdd_cpu,vdd_sys";
135 regulator-min-microvolt = <1150000>;
136 regulator-max-microvolt = <1150000>;
137 regulator-always-on;
138 };
139
140 /* SWIO: +V1.8 */
141 vio_reg: vio {
142 regulator-name = "vdd_1v8_gen";
143 regulator-min-microvolt = <1800000>;
144 regulator-max-microvolt = <1800000>;
145 regulator-always-on;
146 };
147
148 /* LDO1: unused */
149
150 /*
151 * EN_+V3.3 switching via FET:
152 * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
153 * see also v3_3 fixed supply
154 */
155 ldo2_reg: ldo2 {
156 regulator-name = "en_3v3";
157 regulator-min-microvolt = <3300000>;
158 regulator-max-microvolt = <3300000>;
159 regulator-always-on;
160 };
161
162 /* +V1.2_CSI */
163 ldo3_reg: ldo3 {
164 regulator-name =
165 "avdd_dsi_csi,pwrdet_mipi";
166 regulator-min-microvolt = <1200000>;
167 regulator-max-microvolt = <1200000>;
168 };
169
170 /* +V1.2_VDD_RTC */
171 ldo4_reg: ldo4 {
172 regulator-name = "vdd_rtc";
173 regulator-min-microvolt = <1200000>;
174 regulator-max-microvolt = <1200000>;
175 regulator-always-on;
176 };
177
178 /*
179 * +V2.8_AVDD_VDAC:
180 * only required for analog RGB
181 */
182 ldo5_reg: ldo5 {
183 regulator-name = "avdd_vdac";
184 regulator-min-microvolt = <2800000>;
185 regulator-max-microvolt = <2800000>;
186 regulator-always-on;
187 };
188
189 /*
190 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
191 * but LDO6 can't set voltage in 50mV
192 * granularity
193 */
194 ldo6_reg: ldo6 {
195 regulator-name = "avdd_plle";
196 regulator-min-microvolt = <1100000>;
197 regulator-max-microvolt = <1100000>;
198 };
199
200 /* +V1.2_AVDD_PLL */
201 ldo7_reg: ldo7 {
202 regulator-name = "avdd_pll";
203 regulator-min-microvolt = <1200000>;
204 regulator-max-microvolt = <1200000>;
205 regulator-always-on;
206 };
207
208 /* +V1.0_VDD_DDR_HS */
209 ldo8_reg: ldo8 {
210 regulator-name = "vdd_ddr_hs";
211 regulator-min-microvolt = <1000000>;
212 regulator-max-microvolt = <1000000>;
213 regulator-always-on;
214 };
215 };
216 };
217 };
218
219 /* SPI1: Apalis SPI1 */
220 spi@7000d400 {
221 status = "okay";
222 spi-max-frequency = <25000000>;
223 };
224
225 /* SPI4: CAN2 */
226 spi@7000da00 {
227 status = "okay";
228 spi-max-frequency = <25000000>;
229 };
230
231 /* SPI5: Apalis SPI2 */
232 spi@7000dc00 {
233 status = "okay";
234 spi-max-frequency = <25000000>;
235 };
236
237 /* SPI6: CAN1 */
238 spi@7000de00 {
239 status = "okay";
240 spi-max-frequency = <25000000>;
241 };
242
243 sdhci@78000000 {
244 status = "okay";
245 bus-width = <4>;
Simon Glass2b2b50b2015-01-05 20:05:41 -0700246 cd-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
Marcel Ziswilerbf78b272014-09-05 10:18:38 +0200247 };
248
249 sdhci@78000400 {
250 status = "okay";
251 bus-width = <8>;
Simon Glass2b2b50b2015-01-05 20:05:41 -0700252 cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
Marcel Ziswilerbf78b272014-09-05 10:18:38 +0200253 };
254
255 sdhci@78000600 {
256 status = "okay";
257 bus-width = <8>;
258 non-removable;
259 };
260
261 /* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
262 usb@7d000000 {
263 status = "okay";
264 dr_mode = "peripheral";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700265 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
Marcel Ziswilerbf78b272014-09-05 10:18:38 +0200266 };
267
268 /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
269 usb@7d004000 {
270 status = "okay";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700271 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
Marcel Ziswilerbf78b272014-09-05 10:18:38 +0200272 phy_type = "utmi";
273 };
274
275 /* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */
276 usb@7d008000 {
277 status = "okay";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700278 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
Marcel Ziswilerbf78b272014-09-05 10:18:38 +0200279 };
280
281 regulators {
282 compatible = "simple-bus";
283 #address-cells = <1>;
284 #size-cells = <0>;
285
286 sys_3v3_reg: regulator@100 {
287 compatible = "regulator-fixed";
288 reg = <100>;
289 regulator-name = "3v3";
290 regulator-min-microvolt = <3300000>;
291 regulator-max-microvolt = <3300000>;
292 regulator-always-on;
293 };
294
295 charge_pump_5v0_reg: regulator@101 {
296 compatible = "regulator-fixed";
297 reg = <101>;
298 regulator-name = "5v0";
299 regulator-min-microvolt = <5000000>;
300 regulator-max-microvolt = <5000000>;
301 regulator-always-on;
302 };
303 };
304};