| Giulio Benetti | 931edc6 | 2020-02-18 20:02:55 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2020 |
| 4 | * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> |
| 5 | */ |
| 6 | |
| 7 | #ifndef __IMXRT1020_EVK_H |
| 8 | #define __IMXRT1020_EVK_H |
| 9 | |
| 10 | #include <asm/arch/imx-regs.h> |
| 11 | |
| 12 | #define CONFIG_SYS_INIT_SP_ADDR 0x20240000 |
| 13 | |
| 14 | #ifdef CONFIG_SUPPORT_SPL |
| 15 | #define CONFIG_SYS_LOAD_ADDR 0x20209000 |
| 16 | #else |
| 17 | #define CONFIG_SYS_LOAD_ADDR 0x80000000 |
| 18 | #define CONFIG_LOADADDR 0x80000000 |
| 19 | #endif |
| 20 | |
| 21 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC135 1 |
| 22 | #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 |
| 23 | |
| 24 | #define PHYS_SDRAM 0x80000000 |
| 25 | #define PHYS_SDRAM_SIZE (32 * 1024 * 1024) |
| 26 | |
| 27 | #define DMAMEM_SZ_ALL (1 * 1024 * 1024) |
| 28 | #define DMAMEM_BASE (PHYS_SDRAM + PHYS_SDRAM_SIZE - \ |
| 29 | DMAMEM_SZ_ALL) |
| 30 | |
| 31 | #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ |
| 32 | |
| 33 | /* |
| 34 | * Configuration of the external SDRAM memory |
| 35 | */ |
| 36 | #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) |
| 37 | |
| 38 | /* For SPL */ |
| 39 | #ifdef CONFIG_SUPPORT_SPL |
| 40 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR |
| 41 | #define CONFIG_SYS_SPL_LEN 0x00008000 |
| 42 | #define CONFIG_SYS_UBOOT_START 0x800023FD |
| 43 | #endif |
| 44 | /* For SPL ends */ |
| 45 | |
| 46 | #endif /* __IMXRT1020_EVK_H */ |