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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +09002/*
3 * (C) Copyright 2009 Samsung Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 * HeungJun Kim <riverful.kim@samsung.com>
6 * Inki Dae <inki.dae@samsung.com>
7 *
8 * Configuation settings for the SAMSUNG SMDKC100 board.
Minkyu Kang8bc4ee92009-10-01 17:20:40 +09009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090018#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
Minkyu Kang889a2752010-08-23 19:52:03 +090019#define CONFIG_S5P 1 /* which is in a S5P Family */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090020#define CONFIG_S5PC100 1 /* which is in a S5PC100 */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090021
22#include <asm/arch/cpu.h> /* get chip and board defs */
23
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090024/* input clock of PLL: SMDKC100 has 12MHz input clock */
25#define CONFIG_SYS_CLK_FREQ 12000000
26
27/* DRAM Base */
28#define CONFIG_SYS_SDRAM_BASE 0x30000000
29
Minkyu Kang08bcbc42013-08-06 20:57:03 +090030/* Text Base */
Minkyu Kang08bcbc42013-08-06 20:57:03 +090031
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090032#define CONFIG_SETUP_MEMORY_TAGS
33#define CONFIG_CMDLINE_TAG
34#define CONFIG_INITRD_TAG
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090035
36/*
37 * Size of malloc() pool
38 * 1MB = 0x100000, 0x100000 = 1024 * 1024
39 */
40#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
Simon Glass2ecd7792014-10-07 22:01:52 -060041
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090042/*
43 * select serial console configuration
44 */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090045
Minkyu Kangdc795a82011-03-10 20:09:43 +090046/* PWM */
47#define CONFIG_PWM 1
48
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090049/* allow to overwrite serial and ethaddr */
50#define CONFIG_ENV_OVERWRITE
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090051
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090052#define CONFIG_BOOTCOMMAND "run ubifsboot"
53
54#define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \
55 " console=ttySAC0,115200n8" \
56 " mem=128M"
57
58#define CONFIG_COMMON_BOOT "console=ttySAC0,115200n8" \
59 " mem=128M " \
Tom Rini43ede0b2017-10-22 17:55:07 -040060 " " CONFIG_MTDPARTS_DEFAULT
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090061
Minkyu Kang8bc4ee92009-10-01 17:20:40 +090062#define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x40000;" \
63 " onenand write 0x32008000 0x0 0x40000\0"
64
65#define CONFIG_ENV_OVERWRITE
66#define CONFIG_EXTRA_ENV_SETTINGS \
67 CONFIG_UPDATEB \
68 "updatek=" \
69 "onenand erase 0x60000 0x300000;" \
70 "onenand write 0x31008000 0x60000 0x300000\0" \
71 "updateu=" \
72 "onenand erase block 147-4095;" \
73 "onenand write 0x32000000 0x1260000 0x8C0000\0" \
74 "bootk=" \
75 "onenand read 0x30007FC0 0x60000 0x300000;" \
76 "bootm 0x30007FC0\0" \
77 "flashboot=" \
78 "set bootargs root=/dev/mtdblock${bootblock} " \
79 "rootfstype=${rootfstype} " \
80 "ubi.mtd=${ubiblock} ${opts} " CONFIG_COMMON_BOOT ";" \
81 "run bootk\0" \
82 "ubifsboot=" \
83 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \
84 " ubi.mtd=${ubiblock} ${opts} " CONFIG_COMMON_BOOT "; " \
85 "run bootk\0" \
86 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
87 "android=" \
88 "set bootargs root=ubi0!ramdisk ubi.mtd=${ubiblock} " \
89 "rootfstype=ubifs init=/init.sh " CONFIG_COMMON_BOOT "; " \
90 "run bootk\0" \
91 "nfsboot=" \
92 "set bootargs root=/dev/nfs ubi.mtd=${ubiblock} " \
93 "nfsroot=${nfsroot},nolock " \
94 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
95 "${netmask}:nowplus:usb0:off " CONFIG_COMMON_BOOT "; " \
96 "run bootk\0" \
97 "ramboot=" \
98 "set bootargs " CONFIG_RAMDISK_BOOT \
99 " initrd=0x33000000,8M ramdisk=8192\0" \
100 "rootfstype=cramfs\0" \
Tom Rini43ede0b2017-10-22 17:55:07 -0400101 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900102 "meminfo=mem=128M\0" \
103 "nfsroot=/nfsroot/arm\0" \
104 "bootblock=5\0" \
105 "ubiblock=4\0" \
106 "ubi=enabled"
107
108/*
109 * Miscellaneous configurable options
110 */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900111#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900112/* memtest works on */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900113#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
114
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900115/* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900116#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
117#define PHYS_SDRAM_1_SIZE (128 << 20) /* 0x8000000, 128 MB Bank #1 */
118
119#define CONFIG_SYS_MONITOR_BASE 0x00000000
120
121/*-----------------------------------------------------------------------
122 * FLASH and environment organization
123 */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900124
125#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900126
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200127#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000)
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900128#define CONFIG_ENABLE_MMU
129#endif
130
131#ifdef CONFIG_ENABLE_MMU
132#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000
133#else
134#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE
135#endif
136
137/*-----------------------------------------------------------------------
138 * Boot configuration
139 */
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900140
141#define CONFIG_USE_ONENAND_BOARD_INIT
142#define CONFIG_SAMSUNG_ONENAND 1
143#define CONFIG_SYS_ONENAND_BASE 0xE7100000
144
Minkyu Kang98877c32010-11-22 20:26:46 +0900145#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
146
Naveen Krishna CH2528dc52010-03-05 17:16:05 +0900147/*
148 * Ethernet Contoller driver
149 */
150#ifdef CONFIG_CMD_NET
Naveen Krishna CH2528dc52010-03-05 17:16:05 +0900151#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/
152#endif /* CONFIG_CMD_NET */
153
Minkyu Kang8bc4ee92009-10-01 17:20:40 +0900154#endif /* __CONFIG_H */