| Simon Glass | d1de41d | 2015-08-03 08:19:37 -0600 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_EXYNOS=y |
| 3 | CONFIG_TARGET_SPRING=y |
| Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 4 | CONFIG_DM_I2C=y |
| Simon Glass | d1de41d | 2015-08-03 08:19:37 -0600 | [diff] [blame] | 5 | CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring" |
| 6 | CONFIG_SPL=y |
| Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 7 | CONFIG_SYS_PROMPT="spring # " |
| Simon Glass | d1de41d | 2015-08-03 08:19:37 -0600 | [diff] [blame] | 8 | # CONFIG_CMD_IMLS is not set |
| Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 9 | CONFIG_CMD_GPIO=y |
| Simon Glass | d1de41d | 2015-08-03 08:19:37 -0600 | [diff] [blame] | 10 | # CONFIG_CMD_SETEXPR is not set |
| 11 | CONFIG_CMD_SOUND=y |
| Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 12 | CONFIG_CMD_PMIC=y |
| 13 | CONFIG_CMD_REGULATOR=y |
| Simon Glass | 26468d5 | 2015-08-22 18:31:20 -0600 | [diff] [blame] | 14 | CONFIG_CMD_TPM=y |
| Simon Glass | eddb8cf | 2015-08-22 18:31:43 -0600 | [diff] [blame] | 15 | CONFIG_CMD_TPM_TEST=y |
| Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 16 | CONFIG_DM_I2C_COMPAT=y |
| 17 | CONFIG_I2C_CROS_EC_LDO=y |
| 18 | CONFIG_I2C_MUX=y |
| 19 | CONFIG_I2C_ARB_GPIO_CHALLENGE=y |
| Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 20 | CONFIG_CROS_EC_KEYB=y |
| 21 | CONFIG_CMD_CROS_EC=y |
| 22 | CONFIG_CROS_EC=y |
| 23 | CONFIG_CROS_EC_I2C=y |
| 24 | CONFIG_SPI_FLASH=y |
| Bin Meng | 68d5342 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 25 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| 26 | CONFIG_SPI_FLASH_WINBOND=y |
| Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 27 | CONFIG_DM_PMIC=y |
| 28 | CONFIG_DM_PMIC_MAX77686=y |
| 29 | CONFIG_PMIC_S5M8767=y |
| 30 | CONFIG_PMIC_TPS65090=y |
| 31 | CONFIG_DM_REGULATOR=y |
| 32 | CONFIG_DM_REGULATOR_MAX77686=y |
| 33 | CONFIG_REGULATOR_S5M8767=y |
| 34 | CONFIG_REGULATOR_TPS65090=y |
| Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 35 | CONFIG_DEBUG_UART=y |
| 36 | CONFIG_DEBUG_UART_S5P=y |
| 37 | CONFIG_DEBUG_UART_BASE=0x12c30000 |
| 38 | CONFIG_DEBUG_UART_CLOCK=100000000 |
| Simon Glass | d1de41d | 2015-08-03 08:19:37 -0600 | [diff] [blame] | 39 | CONFIG_SOUND=y |
| 40 | CONFIG_I2S=y |
| 41 | CONFIG_I2S_SAMSUNG=y |
| 42 | CONFIG_SOUND_MAX98095=y |
| 43 | CONFIG_SOUND_WM8994=y |
| Bin Meng | e5d5d44 | 2015-11-25 05:34:53 -0800 | [diff] [blame] | 44 | CONFIG_EXYNOS_SPI=y |
| Christophe Ricard | 0766ad2 | 2015-10-06 22:54:41 +0200 | [diff] [blame] | 45 | CONFIG_TPM_TIS_INFINEON=y |
| Simon Glass | d1de41d | 2015-08-03 08:19:37 -0600 | [diff] [blame] | 46 | CONFIG_USB=y |
| 47 | CONFIG_DM_USB=y |
| Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 48 | CONFIG_VIDEO_BRIDGE=y |
| 49 | CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y |
| Simon Glass | 26468d5 | 2015-08-22 18:31:20 -0600 | [diff] [blame] | 50 | CONFIG_TPM=y |
| Simon Glass | d1de41d | 2015-08-03 08:19:37 -0600 | [diff] [blame] | 51 | CONFIG_ERRNO_STR=y |