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Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +09001/*
2 * Configuation settings for the Alpha Project AP-SH4A-4A board
3 *
4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +09007 */
8
9#ifndef __AP_SH4A_4A_H
10#define __AP_SH4A_4A_H
11
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +090012#define CONFIG_CPU_SH7734 1
13#define CONFIG_AP_SH4A_4A 1
14#define CONFIG_400MHZ_MODE 1
15/* #define CONFIG_533MHZ_MODE 1 */
16
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +090017#define CONFIG_SYS_TEXT_BASE 0x8BFC0000
18
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +090019#define CONFIG_CMD_SDRAM
20#define CONFIG_CMD_ENV
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +090021
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +090022#define CONFIG_BOOTARGS "console=ttySC4,115200"
23
Vladimir Zapolskiy18a40e82016-11-28 00:15:30 +020024#define CONFIG_DISPLAY_BOARDINFO
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +090025#undef CONFIG_SHOW_BOOT_PROGRESS
26
27/* Ether */
28#define CONFIG_SH_ETHER 1
29#define CONFIG_SH_ETHER_USE_PORT (0)
30#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
31#define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
32#define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
33#define CONFIG_PHYLIB
34#define CONFIG_PHY_MICREL 1
35#define CONFIG_BITBANGMII
36#define CONFIG_BITBANGMII_MULTI
37
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +090038/* undef to save memory */
39#define CONFIG_SYS_LONGHELP
40/* Monitor Command Prompt */
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +090041/* Buffer size for input from the Console */
42#define CONFIG_SYS_CBSIZE 256
43/* Buffer size for Console output */
44#define CONFIG_SYS_PBSIZE 256
45/* max args accepted for monitor commands */
46#define CONFIG_SYS_MAXARGS 16
47/* Buffer size for Boot Arguments passed to kernel */
48#define CONFIG_SYS_BARGSIZE 512
49/* List of legal baudrate settings for this board */
50#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
51
52/* SCIF */
53#define CONFIG_SCIF_CONSOLE 1
54#define CONFIG_SCIF 1
55#define CONFIG_CONS_SCIF4 1
56
57/* Suppress display of console information at boot */
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +090058
59/* SDRAM */
60#define CONFIG_SYS_SDRAM_BASE (0x88000000)
61#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
62#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
63
64#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
65#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
66/* Enable alternate, more extensive, memory test */
67#undef CONFIG_SYS_ALT_MEMTEST
68/* Scratch address used by the alternate memory test */
69#undef CONFIG_SYS_MEMTEST_SCRATCH
70
71/* Enable temporary baudrate change while serial download */
72#undef CONFIG_SYS_LOADS_BAUD_CHANGE
73
74/* FLASH */
75#define CONFIG_FLASH_CFI_DRIVER 1
76#define CONFIG_SYS_FLASH_CFI
77#undef CONFIG_SYS_FLASH_QUIET_TEST
78#define CONFIG_SYS_FLASH_EMPTY_INFO
79#define CONFIG_SYS_FLASH_BASE (0xA0000000)
80#define CONFIG_SYS_MAX_FLASH_SECT 512
81
82/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
83#define CONFIG_SYS_MAX_FLASH_BANKS 1
84#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
85
86/* Timeout for Flash erase operations (in ms) */
87#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
88/* Timeout for Flash write operations (in ms) */
89#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
90/* Timeout for Flash set sector lock bit operations (in ms) */
91#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
92/* Timeout for Flash clear lock bit operations (in ms) */
93#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
94
95/*
96 * Use hardware flash sectors protection instead
97 * of U-Boot software protection
98 */
99#undef CONFIG_SYS_FLASH_PROTECTION
100#undef CONFIG_SYS_DIRECT_FLASH_TFTP
101
102/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
103#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
104/* Monitor size */
105#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
106/* Size of DRAM reserved for malloc() use */
107#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +0900108#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
109
110/* ENV setting */
111#define CONFIG_ENV_IS_IN_FLASH
112#define CONFIG_ENV_OVERWRITE 1
113#define CONFIG_ENV_SECT_SIZE (128 * 1024)
114#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
115#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
116/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
117#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
118#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
119
120/* Board Clock */
121#if defined(CONFIG_400MHZ_MODE)
122#define CONFIG_SYS_CLK_FREQ 50000000
123#else
124#define CONFIG_SYS_CLK_FREQ 44444444
125#endif
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +0900126#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
127#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +0900128#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsubfc93fb2012-05-09 15:59:30 +0900129
130#endif /* __AP_SH4A_4A_H */